JPH0514532Y2 - - Google Patents
Info
- Publication number
- JPH0514532Y2 JPH0514532Y2 JP1987110399U JP11039987U JPH0514532Y2 JP H0514532 Y2 JPH0514532 Y2 JP H0514532Y2 JP 1987110399 U JP1987110399 U JP 1987110399U JP 11039987 U JP11039987 U JP 11039987U JP H0514532 Y2 JPH0514532 Y2 JP H0514532Y2
- Authority
- JP
- Japan
- Prior art keywords
- housing
- conductive pattern
- outer lens
- voltage protection
- reverse voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987110399U JPH0514532Y2 (enrdf_load_html_response) | 1987-07-17 | 1987-07-17 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987110399U JPH0514532Y2 (enrdf_load_html_response) | 1987-07-17 | 1987-07-17 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6413755U JPS6413755U (enrdf_load_html_response) | 1989-01-24 |
| JPH0514532Y2 true JPH0514532Y2 (enrdf_load_html_response) | 1993-04-19 |
Family
ID=31347521
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1987110399U Expired - Lifetime JPH0514532Y2 (enrdf_load_html_response) | 1987-07-17 | 1987-07-17 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0514532Y2 (enrdf_load_html_response) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3990132B2 (ja) * | 2001-10-04 | 2007-10-10 | 株式会社小糸製作所 | 車輌用灯具 |
| WO2012115999A1 (en) * | 2011-02-25 | 2012-08-30 | Lumitex, Inc. | Flat optical fiber lighting assembly with integrated electrical circuitry |
-
1987
- 1987-07-17 JP JP1987110399U patent/JPH0514532Y2/ja not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6413755U (enrdf_load_html_response) | 1989-01-24 |