JPH05144856A - Collet - Google Patents

Collet

Info

Publication number
JPH05144856A
JPH05144856A JP30463291A JP30463291A JPH05144856A JP H05144856 A JPH05144856 A JP H05144856A JP 30463291 A JP30463291 A JP 30463291A JP 30463291 A JP30463291 A JP 30463291A JP H05144856 A JPH05144856 A JP H05144856A
Authority
JP
Japan
Prior art keywords
collet
semiconductor chip
pattern
opening
ridge
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP30463291A
Other languages
Japanese (ja)
Inventor
Satoshi Terayama
智 寺山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP30463291A priority Critical patent/JPH05144856A/en
Publication of JPH05144856A publication Critical patent/JPH05144856A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/75—Apparatus for connecting with bump connectors or layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7525—Means for applying energy, e.g. heating means
    • H01L2224/753—Means for applying energy, e.g. heating means by means of pressure
    • H01L2224/75301—Bonding head
    • H01L2224/75302—Shape
    • H01L2224/75303—Shape of the pressing surface

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Abstract

PURPOSE:To provide a collet which is able to house a plate-like semiconductor chip preventing a pattern located at the ridges of the semiconductor chip from separating off or falling off, where the collet picks up the plate-like semiconductor chip housing it in its pyramid-shaped opening which becomes gradually smaller from its ends in a tapered way in cross section. CONSTITUTION:A collet picks up a plate-like semiconductor chip 30 which is possessed of a pattern 33 formed on its surface as spreading over its ridge 32 making its surface 31 upward by housing it in its pyramid-shaped opening 21 which becomes gradually smaller from its ends in a tapered way in cross section, where a recess 22a is provided to a specific region of the inner circumferential surface 22 of the opening 21 which comes into contact with the pattern 33 of the semiconductor chip 30.

Description

【発明の詳細な説明】Detailed Description of the Invention

【０００１】[0001]

【産業上の利用分野】本発明は、一方の端部から断面が
テーパ状に小さくなる角錐状の開孔内に平板状のチッ
プ、例えば、半導体チップを収容してピックアップする
コレット、特に半導体チップの陵部に掛かるパターンの
剥離や剥落を防止することのできるコレットに関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a flat chip, for example, a collet for picking up and picking up a semiconductor chip in a pyramidal opening whose cross section tapers from one end. The present invention relates to a collet capable of preventing the peeling and peeling of a pattern hanging on the ridge portion of the.

【０００２】[0002]

【従来の技術】次に、半導体チップ等のピックアップと
その離脱とを交互に行なう従来のコレットについて図２
を参照して説明する。図２は、従来のコレットを説明す
るための図であって、同図(a) はコレットの要部側断面
図、同図(b) はコレットの下面図、同図(c) は半導体チ
ップの平面図、同図(d) は半導体チップのＡ−Ａ線断面
図である。2. Description of the Related Art Next, a conventional collet for alternately picking up and separating a semiconductor chip or the like is shown in FIG.
Will be described. 2A and 2B are views for explaining a conventional collet, where FIG. 2A is a side sectional view of a main part of the collet, FIG. 2B is a bottom view of the collet, and FIG. 2C is a semiconductor chip. 2D is a cross-sectional view of the semiconductor chip taken along the line AA.

【０００３】同図(a) 及び同図(b) に示すように半導体
チップ30を真空吸着するコレット10は、一方の端部から
断面がテーパ状に小さくなる角錐状の開孔11を設けて構
成されていた。As shown in FIGS. 1 (a) and 1 (b), a collet 10 for vacuum-sucking a semiconductor chip 30 is provided with a pyramidal opening 11 having a tapered cross section from one end. Was configured.

【０００４】このような従来のコレット10により表面を
上方にした半導体チップ30のピックアップは、同図(a)
に示すようにコレット10を矢印Ｄ方向に移動、すなわち
下降して半導体チップ30で開孔11の一端側を閉塞するよ
うにした後に、開孔11の他端側に連結した排気装置（図
示せず）によりこの開孔11内を減圧することにより行な
っていた。A pickup of a semiconductor chip 30 whose surface is raised by such a conventional collet 10 is shown in FIG.
As shown in FIG. 4, the collet 10 is moved in the direction of arrow D, that is, lowered to close one end of the opening 11 with the semiconductor chip 30, and then the exhaust device (not shown) connected to the other end of the opening 11. This is done by depressurizing the inside of this opening 11 by (1).

【０００５】そして、かかる状態で半導体チップ30をピ
ックアップしているコレット10の開孔11内を大気圧若し
くは大気圧より僅かに高い圧力にすると、半導体チップ
30はコレット10から離脱することとなる。When the inside of the opening 11 of the collet 10 picking up the semiconductor chip 30 is set to the atmospheric pressure or a pressure slightly higher than the atmospheric pressure in such a state, the semiconductor chip
30 will leave Collet 10.

【０００６】[0006]

【発明が解決しようとする課題】前述したような従来の
コレット10で半導体チップ30をピックアップすると、半
導体チップ30の表面31側の陵部32が、コレット10の開孔
11の内周面12に接触することとなる。When the semiconductor chip 30 is picked up by the conventional collet 10 as described above, the ridge 32 on the surface 31 side of the semiconductor chip 30 has an opening of the collet 10.
The inner peripheral surface 12 of 11 is contacted.

【０００７】したがって、従来のコレット10により、表
面31に形成したパターン33がチップ30の陵部32に部分的
に掛かる半導体チップ30のピックアップとその離脱とを
行なうと、半導体チップ30の陵部32に掛かるパターン33
の一部が剥離したり剥落する等の問題が時々発生してい
た。Therefore, by the conventional collet 10, when the pattern 33 formed on the surface 31 is partially picked up on the ridge 32 of the chip 30 and the semiconductor chip 30 is picked up and removed, the ridge 32 of the semiconductor chip 30 is removed. Hanging pattern 33
Occasionally, some problems such as peeling off and peeling off occurred.

【０００８】本発明は、このような問題を解消するため
になされたものであって、その目的は陵部32に掛かるパ
ターン33の剥離や剥落を発生させることなく半導体チッ
プ30をピックアップできるコレットを提供することにあ
る。The present invention has been made to solve such a problem, and its purpose is to provide a collet capable of picking up a semiconductor chip 30 without causing peeling or peeling of the pattern 33 hanging on the ridge 32. To provide.

【０００９】[0009]

【課題を解決するための手段】前記目的は図１に示すよ
うに、一方の端部から断面がテーパ状に小さくなる角錐
状の開孔21を有し、表面に形成されたパターン33が陵部
32の一部に掛かる平板状のチップ30をその表面31側から
開孔21内に収容してピックアップするコレットにおい
て、半導体チップ30のパターン33と接触する開孔21の内
周面22の特定領域に凹陥部22a が設けられていることを
特徴とするコレットにより達成される。As shown in FIG. 1, the object is to have a pyramidal opening 21 having a tapered cross section from one end and a pattern 33 formed on the surface. Department
In a collet for accommodating and picking up a flat chip 30 that hangs on a part of the surface 32 from the surface 31 side thereof, a specific region of the inner peripheral surface 22 of the opening 21 that contacts the pattern 33 of the semiconductor chip 30. This is achieved by a collet characterized in that a concave portion 22a is provided in the.

【００１０】[0010]

【作用】本発明のコレットは、半導体チップ30のパター
ン33と接触する開孔21の内周面22の特定領域に凹陥部22
a が設けられている。According to the collet of the present invention, the concave portion 22 is formed in a specific region of the inner peripheral surface 22 of the opening 21 which comes into contact with the pattern 33 of the semiconductor chip 30.
a is provided.

【００１１】したがって、本発明のコレットにより半導
体チップ30をピックアップしても、半導体チップ30の表
面31に形成されて陵部32に掛かっているパターン33にコ
レットの内周面22が接触することがない。Therefore, even if the semiconductor chip 30 is picked up by the collet of the present invention, the inner peripheral surface 22 of the collet may contact the pattern 33 formed on the surface 31 of the semiconductor chip 30 and hanging on the ridge 32. Absent.

【００１２】斯くして、パターン33は、半導体チップ30
の表面31から剥離することもまた剥落することもない。Thus, the pattern 33 corresponds to the semiconductor chip 30.
It neither peels off nor peels off from the surface 31 of the.

【００１３】[0013]

【実施例】以下、本発明の一実施例のコレットについて
図１を参照しながら説明する。図１は本発明の一実施例
のコレットを説明するための図であって、同図(a) はコ
レットの要部側断面図、同図(b) はコレットの裏面図で
ある。DESCRIPTION OF THE PREFERRED EMBODIMENTS A collet according to an embodiment of the present invention will be described below with reference to FIG. 1A and 1B are views for explaining a collet according to an embodiment of the present invention. FIG. 1A is a side sectional view of a main part of the collet, and FIG. 1B is a rear view of the collet.

【００１４】なお、本明細書においては、同一部品、同
一材料等に対しては全図をとおして同じ符号を付与して
ある。図１(a) 及び(b) に示すように本発明の一実施例
のコレット20は、図２により説明した従来のコレット10
の開孔11の内周面12の特定領域、すなわち、コレット10
の開孔11内に半導体チップ30を収容してピックアップし
た際にこの半導体チップ30の表面31に形成されて陵部32
に掛かるパターン33と接触する内周面22の特定領域に、
浅い凹陥部22a を設けて構成したものである。In the present specification, the same parts, the same materials and the like are designated by the same reference numerals throughout the drawings. As shown in FIGS. 1 (a) and 1 (b), a collet 20 according to an embodiment of the present invention is a conventional collet 10 described with reference to FIG.
A specific area of the inner peripheral surface 12 of the opening 11, namely, the collet 10
The semiconductor chip 30 is housed in the opening 11 of the semiconductor chip 30 and picked up on the surface 31 of the semiconductor chip 30 when picked up.
In a specific area of the inner peripheral surface 22 that contacts the pattern 33 hanging on
It is configured by providing a shallow recess 22a.

【００１５】したがって、本発明の一実施例のコレット
20の開孔21内に半導体チップ30をピックアップしても、
半導体チップ30の表面31に形成されて陵部32に掛かって
いるパターン33にコレット20の内周面22が接触すること
がない。Therefore, the collet of one embodiment of the present invention
Even if the semiconductor chip 30 is picked up in the opening 21 of 20,
The inner peripheral surface 22 of the collet 20 does not come into contact with the pattern 33 formed on the surface 31 of the semiconductor chip 30 and hanging on the ridge 32.

【００１６】斯くして、パターン33は、半導体チップ30
の表面31から剥離することもまた剥落することもない。Thus, the pattern 33 corresponds to the semiconductor chip 30.
It neither peels off nor peels off from the surface 31 of the.

【００１７】[0017]

【発明の効果】以上説明したように本発明は、半導体チ
ップをピックアップしてもその表面に形成されて縁部に
掛かっている導体パターンを剥離させることもまた剥落
させることもないピックアップを提供できる。As described above, the present invention can provide a pickup which does not peel off or peel off the conductor pattern formed on the surface and hanging on the edge even when the semiconductor chip is picked up. .

【図面の簡単な説明】[Brief description of drawings]

【図１】は、本発明の一実施例のコレットを説明するた
めの図、FIG. 1 is a view for explaining a collet according to an embodiment of the present invention,

【図２】は、従来のコレットを説明するための図であ
る。FIG. 2 is a diagram for explaining a conventional collet.

【符号の説明】[Explanation of symbols]

10は、従来のコレット、11は、開孔、12は、内周面、20
は、本発明のコレット、21は、開孔、22は、内周面、22
a は、凹陥部、30は、半導体チップ (チップ) 、31は、
表面、32は、陵部、33は、パターンをそれぞれ示す。10 is a conventional collet, 11 is an aperture, 12 is an inner peripheral surface, 20
Is a collet of the present invention, 21 is an opening, 22 is an inner peripheral surface, 22
a is a recess, 30 is a semiconductor chip (chip), 31 is
The surface, 32 is a ridge, and 33 is a pattern, respectively.

Claims (1)

【特許請求の範囲】[Claims] 【請求項１】 一方の端部から断面がテーパ状に小さく
なる角錐状の開孔(21)を有し、表面に形成されたパター
ン(33)が陵部(32)の一部に掛かる平板状のチップ(30)を
その表面(31)側から開孔(21)内に収容してピックアップ
するコレットにおいて、 前記半導体チップ(30)のパターン(33)と接触する前記開
孔(21)の内周面(22)の特定領域に凹陥部(22a) が設けら
れていることを特徴とするコレット。1. A flat plate having a pyramidal opening (21) having a tapered cross-section from one end, and a pattern (33) formed on the surface of the opening (21) hangs over a part of the ridge (32). In a collet for accommodating and picking up a chip (30) in the opening (21) from the surface (31) side, the opening (21) in contact with the pattern (33) of the semiconductor chip (30) A collet characterized in that a concave portion (22a) is provided in a specific region of the inner peripheral surface (22).
JP30463291A 1991-11-20 1991-11-20 Collet Withdrawn JPH05144856A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP30463291A JPH05144856A (en) 1991-11-20 1991-11-20 Collet

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP30463291A JPH05144856A (en) 1991-11-20 1991-11-20 Collet

Publications (1)

Publication Number Publication Date
JPH05144856A true JPH05144856A (en) 1993-06-11

Family

ID=17935375

Family Applications (1)

Application Number Title Priority Date Filing Date
JP30463291A Withdrawn JPH05144856A (en) 1991-11-20 1991-11-20 Collet

Country Status (1)

Country Link
JP (1) JPH05144856A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5516125A (en) * 1994-11-30 1996-05-14 Texas Instruments Incorporated Baffled collet for vacuum pick-up of a semiconductor die
JP2016015446A (en) * 2014-07-03 2016-01-28 日本電気株式会社 Suction head, mounting device and suction method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5516125A (en) * 1994-11-30 1996-05-14 Texas Instruments Incorporated Baffled collet for vacuum pick-up of a semiconductor die
JP2016015446A (en) * 2014-07-03 2016-01-28 日本電気株式会社 Suction head, mounting device and suction method

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Legal Events

Date Code Title Description
A300 Withdrawal of application because of no request for examination

Free format text: JAPANESE INTERMEDIATE CODE: A300

Effective date: 19990204