JPH0514361Y2 - - Google Patents
Info
- Publication number
- JPH0514361Y2 JPH0514361Y2 JP1983027462U JP2746283U JPH0514361Y2 JP H0514361 Y2 JPH0514361 Y2 JP H0514361Y2 JP 1983027462 U JP1983027462 U JP 1983027462U JP 2746283 U JP2746283 U JP 2746283U JP H0514361 Y2 JPH0514361 Y2 JP H0514361Y2
- Authority
- JP
- Japan
- Prior art keywords
- channel
- output
- recording
- reproducing device
- reproducing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 230000003111 delayed effect Effects 0.000 claims description 4
- 238000010586 diagram Methods 0.000 description 3
- 230000007774 longterm Effects 0.000 description 2
- 230000002159 abnormal effect Effects 0.000 description 1
Landscapes
- Signal Processing For Digital Recording And Reproducing (AREA)
- Transmission Systems Not Characterized By The Medium Used For Transmission (AREA)
Description
【考案の詳細な説明】
本考案はPCM記録再生装置に係り、特に4チ
ヤンネル用PCM記録再生装置を2チヤンネル用
記録再生装置として用いる場合の改良に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a PCM recording and reproducing device, and particularly to improvements in the case where a 4-channel PCM recording and reproducing device is used as a 2-channel recording and reproducing device.
従来、4チヤンネル用PCM記録再生装置で2
チヤンネルのデータを記録再生する場合には第1
図に示す様に4チヤンネル用PCM記録再生装置
1の入力端子2LI,2RI,3LI,3RIの内の入
力端子2LI,2RIのみに入力信号L及び入力信
号Rを加え出力端子2LO,2RO,3LO,3RO
の内の出力端子2LO,2ROのみから2チヤンネ
ルの出力信号L′R′を取り出して他の入出力端子は
遊ばせて置く用い方が一般的である。 Conventionally, a 4-channel PCM recording/playback device
When recording and reproducing channel data, the first
As shown in the figure, input signals L and R are applied to only the input terminals 2LI, 2RI of the input terminals 2LI, 2RI, 3LI, and 3RI of the 4-channel PCM recording/playback device 1, and the output terminals 2LO, 2RO, 3LO, 3RO
It is common practice to take out the two-channel output signal L'R' from only the output terminals 2LO and 2RO, and leave the other input/output terminals idle.
更に第2図に示す様に4チヤンネル用PCM記
録再生装置1の入力端子2LI,2RI,3LI,3
RIの内第1及び第3の入力端子2LI,3LIに入
力信号Lを第2及び第4の入力端子2RI,3RI
に入力信号Rを加え、PCM記録再生装置1の第
1の出力端子2LOと第3の出力端子3LOを第1
のスイツチ手段4Lの固定端子a,bに接続し、
第2の出力端子2ROと第4の出力端子3ROを
第2のスイツチ手段4Rの固定接点a,bに接続
し、上記第1及び第2の可動接点cより出力信号
L′,R′を出力する。 Furthermore, as shown in Fig. 2, the input terminals 2LI, 2RI, 3LI,
Input signal L to the first and third input terminals 2LI, 3LI of RI, and the input signal L to the second and fourth input terminals 2RI, 3RI.
The input signal R is applied to
Connect to the fixed terminals a and b of the switch means 4L,
The second output terminal 2RO and the fourth output terminal 3RO are connected to the fixed contacts a and b of the second switch means 4R, and the output signal is output from the first and second movable contacts c.
Output L′ and R′.
この際、PCM記録再生装置の正誤出力端子5,
6,7,8より取り出した出力をデータ選択制御
回路9,10に加えることで第1のスイツチ手段
が第1の出力2LOを選択するか第3の出力3LO
を選択するかを第1のデータ選択制御回路9が選
択し、第2のスイツチ手段が第2の出力2ROを
選択するか第4の出力3ROを選択するかを第2
のデータ選択制御回路10が選択する様になされ
ている。 At this time, the correct/incorrect output terminal 5 of the PCM recording/reproducing device,
By applying the outputs taken out from 6, 7, and 8 to the data selection control circuits 9 and 10, the first switching means selects the first output 2LO or the third output 3LO.
The first data selection control circuit 9 selects whether to select the second output 2RO or the fourth output 3RO.
The data selection control circuit 10 selects the data.
この様に構成することで主信号L,Rの誤り訂
正能力をある程度改善出来るが同期を失なつた時
に生ずる長時間(通常数十ミリ秒〜数百ミリ秒)
の連続したドロツプアウト等を充分に改善出来な
い問題があつた。 This configuration can improve the error correction ability of the main signals L and R to some extent, but it takes a long time (usually tens of milliseconds to hundreds of milliseconds) when synchronization is lost.
There was a problem that it was not possible to sufficiently improve problems such as continuous dropouts.
本考案は上記従来の欠点に鑑みなされたもので
あり、その目的とするところは長時間の連続した
誤りを充分に補正し得るPCM記録再生装置を提
供するにある。本考案の更に他の目的はアドバン
ス信号も同時に得られるPCM記録再生装置を得
るにある。 The present invention has been devised in view of the above-mentioned drawbacks of the conventional art, and its purpose is to provide a PCM recording and reproducing apparatus capable of sufficiently correcting long-term continuous errors. Still another object of the present invention is to obtain a PCM recording and reproducing apparatus which can also obtain advanced signals at the same time.
そして、上記目的は本考案によれば4チヤンネ
ル記録再生装置が可能なPCM記録再生装置にお
いて、該4チヤンネル記録再生装置を2チヤンネ
ル記録再生に用いる場合に該4チヤンネル記録再
生装置の2チヤンネル入力端に直接入力データを
入力し、他の2チヤンネル入力端に該入力データ
と同一のデータを遅延させて入力し、直接入力デ
ータを該PCM記録再生装置の出力端より直接取
り出してアドバンス信号とし、更に該出力端より
取り出した信号を遅延させた出力信号と上記他の
2チヤンネルを遅延させて入力したデータを
PCM記録再生装置の出力端より直接取り出した
出力信号を選択的に取り出して主出力信号とする
ことを特徴とするPCM記録再生装置を提供する
ことによつて達成される。 According to the present invention, the above object is to provide a PCM recording and reproducing device capable of a 4-channel recording and reproducing device, when the 4-channel recording and reproducing device is used for 2-channel recording and reproducing, the 2-channel input terminal of the 4-channel recording and reproducing device input data directly to the input terminal, input delayed data to the other two channel input terminals, extract the direct input data directly from the output terminal of the PCM recording/reproducing device as an advance signal, and further The output signal obtained by delaying the signal taken out from the output terminal and the data input by delaying the other two channels mentioned above are
This is achieved by providing a PCM recording and reproducing device characterized in that an output signal directly taken out from the output end of the PCM recording and reproducing device is selectively taken out and used as a main output signal.
以下、本考案の一実施例を第3図について詳記
する。 Hereinafter, one embodiment of the present invention will be described in detail with reference to FIG.
尚、第1図及び第2図と同一部分には同一符号
を付す。第3図に於て4チヤンネルPCM記録再
生装置の第1及び第2の入力端子2LI,2RIに
は入力信号L,Rを直接入力し、同じ入力信号
L,Rをデイスクカツテングに必要なアドバンス
信号を必要な程度の長時間遅延(例えば1.1秒)
等の遅延回路11,12を通して第3及び第4の
入力端子3LI,3RIに加える。一方4チヤンネ
ルPCM記録再生装置1の第1及び第2の出力端
2LO,2ROの出力を直接出力端に取り出してア
ドバンス出力AO1,AO2としてアドバンス用
信号を得る。更に第1及び第2の出力を遅延回路
11′,12′を通して第1及び第2のスイツチ手
段4L,4Rのそれぞれの固定接点bに接続す
る。4チヤンネルPCM記録再生装置1の第3及
び第4の出力端3LO,3ROを第1及び第2のス
イツチ手段4L,4Rのそれぞれの固定接点aに
接続し第1及び第2のスイツチ手段の可動接点c
を通してデータ選択制御回路9,10の切換に応
じた主出力信号L′,R′を取り出す様に成されてい
る。 Note that the same parts as in FIGS. 1 and 2 are given the same reference numerals. In Fig. 3, the input signals L and R are directly input to the first and second input terminals 2LI and 2RI of the 4-channel PCM recording and reproducing device, and the same input signals L and R are used to perform the advance processing necessary for disk cutting. Delay the signal as long as necessary (e.g. 1.1 seconds)
are applied to the third and fourth input terminals 3LI and 3RI through delay circuits 11 and 12 such as . On the other hand, the outputs from the first and second output terminals 2LO and 2RO of the 4-channel PCM recording and reproducing apparatus 1 are taken out directly to the output terminals to obtain advance signals as advance outputs AO1 and AO2. Furthermore, the first and second outputs are connected to respective fixed contacts b of the first and second switch means 4L, 4R through delay circuits 11', 12'. The third and fourth output ends 3LO and 3RO of the 4-channel PCM recording and reproducing device 1 are connected to fixed contacts a of the first and second switch means 4L and 4R, respectively, so that the first and second switch means are movable. Contact c
Main output signals L' and R' corresponding to switching of the data selection control circuits 9 and 10 are taken out through the data selection control circuits 9 and 10, respectively.
かくすることで再生時に遅延された信号と記録
時に遅延を与えそのまゝ再生された信号のうちで
誤りのない方の信号を出力することが出来るので
アドバンス信号が得られると共に主出力信号L′,
R′として同期を失なつた際に生ずる数十ミリ秒
〜数百ミリ秒の長時間の連続誤りを補正し得るた
めに異常音の発生が防止出来て主出力信号の信頼
性を著しく向上させることが可能と成る。 In this way, it is possible to output the error-free signal between the signal delayed during playback and the signal delayed during recording and reproduced as is, so that an advance signal is obtained and the main output signal L′ ,
Since it is possible to correct long-term continuous errors of tens to hundreds of milliseconds that occur when synchronization is lost as R', abnormal noise can be prevented and the reliability of the main output signal is significantly improved. It becomes possible.
一方アドバンス信号について考えてみるとアド
バンス信号はデイスクカツテング時の制御信号と
して用いられるので主出力信号L′,R′より信頼性
が劣つていても特に問題の無い点から考えて本考
案のPCM記録再生装置は理にかなつた構成であ
る。 On the other hand, considering the advance signal, since the advance signal is used as a control signal during disk cutting, there is no particular problem even if the reliability is lower than that of the main output signals L' and R'. The PCM recording and reproducing device has a logical configuration.
尚、上記実施例では録音側及び再生側で別々の
遅延回路11,12,11′,12′を用いる場合
について述べたが録音、再生時に切換えて使用す
ることで遅延回路を共通化することも可能であ
る。更に再生信号が即時に必要なときはアドバン
ス信号を用いることも出来る。 Although the above embodiment describes the case where separate delay circuits 11, 12, 11', and 12' are used on the recording side and the playback side, it is also possible to use a common delay circuit by switching between them during recording and playback. It is possible. Furthermore, when a reproduced signal is required immediately, an advance signal can be used.
第1図は従来の4チヤンネルPCM記録再生装
置を2チヤンネルPCM記録再生装置として用い
る場合の回路図、第2図は従来の第1図と同様の
他の実施例を示す4チヤンネルPCM記録再生装
置の回路図、第3図は本考案の4チヤンネル
PCM記録再生装置を2チヤンネルPCM記録再生
装置として用いる場合の回路図である。
図中、1……4チヤンネルPCM記録再生装置、
2LI,2RI,3LI,3RI……入力端子、2LO,
2RO,3LO,3RO……出力端子、4L,4R
……第1及び第2のスイツチ手段、5,6,7,
8……正誤信号出力端子、9,10……第1及び
第2のデータ選択制御回路、11,11′,12,
12′……遅延回路。
Fig. 1 is a circuit diagram when a conventional 4-channel PCM recording/reproducing device is used as a 2-channel PCM recording/reproducing device, and Fig. 2 is a 4-channel PCM recording/reproducing device showing another embodiment similar to the conventional 4-channel PCM recording/reproducing device. The circuit diagram, Figure 3 shows the 4 channels of this invention.
FIG. 2 is a circuit diagram when the PCM recording and reproducing device is used as a two-channel PCM recording and reproducing device. In the figure, 1...4 channel PCM recording and reproducing device,
2LI, 2RI, 3LI, 3RI...Input terminal, 2LO,
2RO, 3LO, 3RO...Output terminal, 4L, 4R
...first and second switch means, 5, 6, 7,
8... Correct/incorrect signal output terminal, 9, 10... First and second data selection control circuit, 11, 11', 12,
12'...Delay circuit.
Claims (1)
タを記録する第1のチヤンネルと、上記入力され
たデータを遅延回路を介して記録する第2のチヤ
ンネルと、記録された上記第1及び第2のチヤン
ネルを再生し上記第1のチヤンネルの再生データ
を遅延回路を介して遅延したデータと上記第2の
チヤンネルの再生データとから上記記録再生時に
生じたドロツプアウトを補正する制御回路と、上
記第1のチヤンネルの再生データを上記遅延回路
を介さずに出力する第1の再生チヤンネル出力
と、上記制御回路でドロツプアウトを補正したデ
ータを出力する第2の再生チヤンネル出力とを具
備し上記第1の再生チヤンネル出力を先行する制
御信号として出力すると共に上記第2の再生チヤ
ンネル出力を主出力として遅れて出力するように
したことを特徴とするPCM記録再生装置。 In a PCM recording and reproducing device, a first channel records input data, a second channel records the input data via a delay circuit, and the first and second channels record the input data via a delay circuit. a control circuit for reproducing the first channel and correcting a dropout occurring during the recording and reproducing from data delayed from the first channel reproduced data via a delay circuit and the second channel reproduced data; The first reproduction channel includes a first reproduction channel output that outputs reproduction data of the channel without going through the delay circuit, and a second reproduction channel output that outputs data whose dropout has been corrected by the control circuit. A PCM recording and reproducing apparatus characterized in that the output is outputted as a preceding control signal, and the output of the second reproduction channel is outputted as a main output with a delay.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2746283U JPS59135515U (en) | 1983-02-26 | 1983-02-26 | PCM recording/playback device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2746283U JPS59135515U (en) | 1983-02-26 | 1983-02-26 | PCM recording/playback device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS59135515U JPS59135515U (en) | 1984-09-10 |
JPH0514361Y2 true JPH0514361Y2 (en) | 1993-04-16 |
Family
ID=30158346
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2746283U Granted JPS59135515U (en) | 1983-02-26 | 1983-02-26 | PCM recording/playback device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59135515U (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4940533A (en) * | 1972-08-19 | 1974-04-16 |
-
1983
- 1983-02-26 JP JP2746283U patent/JPS59135515U/en active Granted
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4940533A (en) * | 1972-08-19 | 1974-04-16 |
Also Published As
Publication number | Publication date |
---|---|
JPS59135515U (en) | 1984-09-10 |
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