JPH0513623A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPH0513623A
JPH0513623A JP16476891A JP16476891A JPH0513623A JP H0513623 A JPH0513623 A JP H0513623A JP 16476891 A JP16476891 A JP 16476891A JP 16476891 A JP16476891 A JP 16476891A JP H0513623 A JPH0513623 A JP H0513623A
Authority
JP
Japan
Prior art keywords
resin
semiconductor device
pot
manufacturing
improving
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16476891A
Other languages
Japanese (ja)
Inventor
Toshihiro Arai
利浩 新井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP16476891A priority Critical patent/JPH0513623A/en
Publication of JPH0513623A publication Critical patent/JPH0513623A/en
Pending legal-status Critical Current

Links

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

PURPOSE:To solve the problem where a trade-off relation exists between molding resins, one desirable for improving voltage characteristics and another desirable for improving moisture resistance. CONSTITUTION:The first resin member 7 for improving voltage characteristics is placed in a pot, and the second resin member 8 for improving moisture resistance is put on the first resin member, on which a semiconductor chip is placed. Then, transfer molding is performed in such a manner that molding resin is applied from above the chip in the cavity 3 between the two resin members. As a result, the chip is enclosed by both the resin for improving voltage characteristics and the resin for improving moisture resistance, and thus a highly reliable device is realized owing to the respective properties of both resin. This device is fabricated in a single transfer molding process.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、半導体素体を性質の異
なる2層の樹脂で被覆して樹脂封止する半導体装置の製
造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device in which a semiconductor element body is covered with two layers of resin having different properties and resin-encapsulated.

【0002】[0002]

【従来の技術】半導体素体を外部の雰囲気より遮断して
安定した特性を得るためにエポキシ樹脂系などの樹脂で
封止した半導体装置はよく知られている。その場合、樹
脂の性質により半導体素体に及ぼす影響が異なることも
知られている。例えば、耐湿製を向上させるには、エポ
キシ樹脂にりん系の触媒を添加したものがよく、電圧印
加に対する安定性を向上させるにはエポキシ樹脂にイミ
ダゾール系の触媒を添加したものがよい。しかし、耐湿
性向上に適した樹脂で封止すれば電圧印加特性が悪く、
印加特性向上に適した樹脂で封止すれば耐湿性が悪くな
ってしまうと言うトレードオフの関係があることが知ら
れている。このため、従来の樹脂封止半導体装置はその
中間の性質をもった樹脂が使われていた。別の対策とし
て、双方の樹脂を二重に被覆した半導体装置がある。そ
の場合は、半導体素体上に一方の樹脂をポッティング
(注封) したのち、他方の樹脂をモールド (注型) 、例
えばトランスファモールドすることが行われていた。
2. Description of the Related Art A semiconductor device in which a semiconductor body is sealed with a resin such as an epoxy resin in order to obtain stable characteristics by shielding the semiconductor body from the outside atmosphere is well known. In that case, it is also known that the influence on the semiconductor body differs depending on the properties of the resin. For example, to improve the moisture resistance, it is preferable to add a phosphorus-based catalyst to an epoxy resin, and to improve the stability against voltage application, an epoxy resin to which an imidazole-based catalyst is added. However, if it is sealed with a resin suitable for improving moisture resistance, the voltage application characteristics will be poor,
It is known that there is a trade-off relationship that moisture resistance deteriorates if the resin is sealed with a resin suitable for improving the application characteristics. Therefore, the conventional resin-encapsulated semiconductor device uses a resin having an intermediate property. As another measure, there is a semiconductor device in which both resins are doubly coated. In that case, one resin is potted on the semiconductor body.
After (potting), the other resin was molded (cast), for example, transfer molded.

【0003】[0003]

【発明が解決しようとする課題】ところが、二重樹脂被
覆を行うため、ポッティングしたあと注型する方法はポ
ッティングとモールドの2回の工程が入り、手間がかか
る上にコスト面でも高くなってしまう欠点がある。それ
だからといって、両樹脂ともトランスファモールドをす
るとすればモールド型を2種類用意しなければならず、
やはり手間がかかり、コスト高になってしまう。
However, since a double resin coating is applied, the method of potting and then casting requires two steps of potting and molding, which is troublesome and costly. There are drawbacks. That being said, if you want to transfer mold both resins, you have to prepare two types of molds,
After all, it is time-consuming and costly.

【0004】本発明の目的は、上述の問題を解決し、半
導体素体を異なる樹脂で順次被覆して信頼性を向上させ
る場合に、手間もかからずコストの上昇も招かない半導
体装置の製造方法を提供することにある。
An object of the present invention is to manufacture a semiconductor device which solves the above-mentioned problems and does not cause trouble and cost increase when the semiconductor element body is sequentially coated with different resins to improve reliability. To provide a method.

【0005】[0005]

【課題を解決するための手段】上記の目的を達成するた
めに、本発明は、半導体素体が第一の樹脂からなる層と
その層の上の第二の樹脂からなる層とによって被覆され
た半導体装置を製造する方法であって、半導体素体を金
型のキャビティ内のゲートの直下に配置し、ポット内の
射出口に近い側に第一の樹脂、射出口より遠い側に第二
の樹脂を収容し、トランスファモールド法により注型す
るものとする。そして、ポットから各キャビティに至る
ランナの長さが均一であることが有効である。また、ポ
ット内に第一の樹脂からなる層と第二の樹脂からなる層
を積層してなるタブレットを収容することが有効であ
る。さらに、第一の樹脂がイミダゾール系触媒を添加し
たエポキシ樹脂であり、第二の樹脂がりん系触媒を添加
したエポキシ樹脂であることが有効である。
In order to achieve the above-mentioned object, according to the present invention, a semiconductor element is coated with a layer made of a first resin and a layer made of a second resin on the layer. In the method for manufacturing a semiconductor device, the semiconductor element body is arranged directly below the gate in the cavity of the mold, the first resin is on the side close to the injection port in the pot, and the second resin is on the side far from the injection port. The resin is stored and cast by the transfer molding method. Then, it is effective that the length of the runner from the pot to each cavity is uniform. Further, it is effective to accommodate a tablet formed by laminating a layer made of the first resin and a layer made of the second resin in the pot. Further, it is effective that the first resin is an epoxy resin added with an imidazole catalyst and the second resin is an epoxy resin added with a phosphorus catalyst.

【0006】[0006]

【作用】ポット内の樹脂を加圧すると、射出口に近い第
一の樹脂がキャビティ内の半導体素体の直上のゲートか
ら注入されるので、半導体素体の周りに第一の樹脂が供
給され、その後ポット内の射出口より遠い位置にあった
第二の樹脂がキャビティ内に注入されて、第一の樹脂層
の周りに充填される。このようにして半導体素体の周り
が、第一の樹脂によって被覆され、その周りが第二の樹
脂によって被覆された二重樹脂モールドの半導体装置が
1回のトランスファモールドショットにより製造するこ
とができる。
When the resin in the pot is pressurized, the first resin near the injection port is injected from the gate directly above the semiconductor body in the cavity, so that the first resin is supplied around the semiconductor body. After that, the second resin, which is located farther from the injection port in the pot, is injected into the cavity and filled around the first resin layer. In this way, a semiconductor device of a double resin mold in which the periphery of the semiconductor body is covered with the first resin and the periphery thereof is covered with the second resin can be manufactured by one transfer molding shot. .

【0007】[0007]

【実施例】図2は本発明の一実施例に用いるトランスフ
ァモールド金型を概念的に示す。図においてポット1の
下部に連結されたランナ2は同じ長さで各キャビティ3
に至っており、ゲート4で開口している。各キャビティ
3には、図1に示すように金属基板6に固着された半導
体チップ5が挿入されているが、ゲート4はそのチップ
の直上にある。図3はこの金型のポット1に供給される
タブレットを示し、このタブレットは第一の樹脂7の層
と第二の樹脂8の層とが積層されたものである。第一の
樹脂7としてはエポキシ樹脂にイミダゾール系触媒およ
び結晶性シリカあるいは溶融性シリカなどのフィラー等
を添加した、例えば信越化学工業 (株) 商品名KMC52
2,X−43−3029など、第二の樹脂8としてはエポキシ樹
脂にりん系触媒を添加した、例えば信越化学工業 (株)
商品名X−43−3039, X−43−3035などが用いられる。
タブレットの第一の樹脂7と第二の樹脂8の厚さの比
は、例えば15:85である。
EXAMPLE FIG. 2 conceptually shows a transfer mold die used in an example of the present invention. In the figure, the runner 2 connected to the lower portion of the pot 1 has the same length and has the respective cavity 3
The gate 4 opens. A semiconductor chip 5 fixed to a metal substrate 6 is inserted into each cavity 3 as shown in FIG. 1, but the gate 4 is directly above the chip. FIG. 3 shows a tablet supplied to the pot 1 of this mold, and this tablet is one in which a layer of a first resin 7 and a layer of a second resin 8 are laminated. As the first resin 7, an epoxy resin added with an imidazole catalyst and a filler such as crystalline silica or fusible silica, for example, Shin-Etsu Chemical Co., Ltd. trade name KMC52
The second resin 8 such as 2, X-43-3029 is obtained by adding a phosphorus-based catalyst to an epoxy resin, for example, Shin-Etsu Chemical Co., Ltd.
Product names X-43-3039, X-43-3035 and the like are used.
The thickness ratio of the first resin 7 and the second resin 8 of the tablet is, for example, 15:85.

【0008】このようにして2.8tの圧力で加圧してト
ランスファモールドを行うと、図1に示すようにチップ
5の周りが第一の樹脂7の層となりその周りを第二の樹
脂8が被覆する。各ランナ2の長さが均一であるため、
各キャビティ3内には、第一の樹脂7と第二の樹脂8が
同じ比率の量で供給され、各チップ5は同様に2層の樹
脂7, 8で被覆される。このようにして製造された半導
体装置は、イミダゾール系触媒の添加された第一の樹脂
7が半導体チップ5を直接被覆しているので、電圧印加
の際の特性の劣化が少なく、その上をりん系触媒の添加
された第二の樹脂8が覆って外部からの湿気の侵入を防
いでいるので耐湿性もすぐれている。なお、前記の第一
の樹脂7は金属基板6との密着性がよいという利点も持
っている。
When transfer molding is performed by applying a pressure of 2.8 tons in this manner, the periphery of the chip 5 becomes a layer of the first resin 7 and the second resin 8 surrounds the periphery thereof as shown in FIG. To cover. Since the length of each runner 2 is uniform,
The first resin 7 and the second resin 8 are supplied into the respective cavities 3 in the same proportion, and each chip 5 is similarly coated with two layers of the resins 7 and 8. In the semiconductor device manufactured in this manner, since the semiconductor chip 5 is directly coated with the first resin 7 to which the imidazole-based catalyst is added, the characteristics of the semiconductor device are not deteriorated when a voltage is applied, and the semiconductor device is covered with phosphorus. Since the second resin 8 to which the system catalyst is added covers the second resin 8 to prevent moisture from entering from the outside, the moisture resistance is also excellent. The first resin 7 also has the advantage that it has good adhesion to the metal substrate 6.

【0009】本発明は、上記の実施例に限定されず、樹
脂の組合わせ、モールドの形状などを任意に変えること
ができることはいうまでもない。
The present invention is not limited to the above embodiments, and it goes without saying that the combination of resins, the shape of the mold and the like can be arbitrarily changed.

【0010】[0010]

【発明の効果】本発明によれば、種類の異なる樹脂をポ
ット内に重ねて挿入することにより、1回のショットで
半導体素体を二重に樹脂で被覆するトランスファモール
ドすることが可能となり、樹脂の組合わせによって、例
えば半導体装置電圧印加特性を向上させると共に耐湿性
も向上させることができるので、要望の強い信頼性の高
い半導体装置の製造に極めて有効である。
According to the present invention, it is possible to perform transfer molding in which the semiconductor element body is doubly coated with the resin by one shot by inserting the different types of resins in the pot while stacking them. By combining the resins, for example, the voltage application characteristics of the semiconductor device can be improved and the moisture resistance can also be improved, and therefore it is extremely effective in manufacturing a highly demanded and highly reliable semiconductor device.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例のトランスファモールド時に
おける金型キャビティの断面図
FIG. 1 is a sectional view of a mold cavity during transfer molding according to an embodiment of the present invention.

【図2】本発明の一実施例に用いるトランスファモール
ド金型の概念的平面図
FIG. 2 is a conceptual plan view of a transfer mold die used in one embodiment of the present invention.

【図3】本発明の一実施例に用いる樹脂タブレットの斜
視図
FIG. 3 is a perspective view of a resin tablet used in one embodiment of the present invention.

【符号の説明】[Explanation of symbols]

1 ポット 2 ランナ 3 キャビティ 4 ゲート 5 半導体チップ 7 第一の樹脂 8 第二の樹脂 1 pot 2 runners 3 cavities 4 gates 5 semiconductor chips 7 First resin 8 Second resin

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】半導体素体が第一の樹脂からなる層とその
層の上の第二の樹脂からなる層によって被覆された半導
体装置を製造する方法であって、半導体素体を金型のキ
ャビティ内のゲートの直下に配置し、ポット内の射出口
に近い側に第一の樹脂、射出口より遠い側に第二の樹脂
を収容し、トランスファモールド法により注型すること
を特徴とする半導体装置の製造方法。
1. A method of manufacturing a semiconductor device in which a semiconductor body is covered with a layer made of a first resin and a layer made of a second resin on the layer, the method comprising: It is arranged directly below the gate in the cavity, the first resin is accommodated in the pot near the injection port, the second resin is accommodated in the side farther from the injection port, and the mold is cast by the transfer molding method. Manufacturing method of semiconductor device.
【請求項2】ポットより各キャビティに至るランナの長
さが均一である請求項1記載の半導体装置の製造方法。
2. The method of manufacturing a semiconductor device according to claim 1, wherein the runners extending from the pot to each cavity have a uniform length.
【請求項3】ポット内に第一の樹脂からなる層と第二の
樹脂からなる層を積層してなるタブレットを収容する請
求項1あるいは2記載の半導体装置の製造方法。
3. The method for manufacturing a semiconductor device according to claim 1, wherein a tablet formed by laminating a layer made of the first resin and a layer made of the second resin is housed in the pot.
【請求項4】第一の樹脂がイミダゾール系触媒を添加し
たエポキシ樹脂であり、第二の樹脂がりん系触媒を添加
したエポキシ樹脂である請求項1, 2あるいは3記載の
半導体装置の製造方法。
4. The method of manufacturing a semiconductor device according to claim 1, wherein the first resin is an epoxy resin containing an imidazole catalyst and the second resin is an epoxy resin containing a phosphorus catalyst. .
JP16476891A 1991-07-05 1991-07-05 Manufacture of semiconductor device Pending JPH0513623A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16476891A JPH0513623A (en) 1991-07-05 1991-07-05 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16476891A JPH0513623A (en) 1991-07-05 1991-07-05 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPH0513623A true JPH0513623A (en) 1993-01-22

Family

ID=15799566

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16476891A Pending JPH0513623A (en) 1991-07-05 1991-07-05 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPH0513623A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001261941A (en) * 2000-03-14 2001-09-26 Sumitomo Bakelite Co Ltd Tablet and semiconductor device
JP2016162767A (en) * 2015-02-26 2016-09-05 株式会社デンソー Manufacturing method of mold package
US9443779B2 (en) 2013-09-13 2016-09-13 Fuji Electric Co., Ltd. Semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001261941A (en) * 2000-03-14 2001-09-26 Sumitomo Bakelite Co Ltd Tablet and semiconductor device
US9443779B2 (en) 2013-09-13 2016-09-13 Fuji Electric Co., Ltd. Semiconductor device
JP2016162767A (en) * 2015-02-26 2016-09-05 株式会社デンソー Manufacturing method of mold package

Similar Documents

Publication Publication Date Title
US4663833A (en) Method for manufacturing IC plastic package with window
KR100640580B1 (en) Semiconductor package covered with a encapsulant in a side portion and method of manufacturing the same
JP2702012B2 (en) IC chip support
US6951981B2 (en) Asymmetric transfer molding method and an asymmetric encapsulation made therefrom
US5750423A (en) Method for encapsulation of semiconductor devices with resin and leadframe therefor
JPH0316144A (en) Manufacture of electronic module and electronic module obtained through said manufacture
US5252783A (en) Semiconductor package
US5578871A (en) Integrated circuit package and method of making the same
JPH0575565B2 (en)
JPH0513623A (en) Manufacture of semiconductor device
JP4184333B2 (en) Distortion prevention package and manufacturing method thereof
JP2000329632A (en) Pressure sensor module and method for manufacture it
US5714799A (en) Resin-sealed type semiconductor device having an unoccupied second die pad
US6696006B2 (en) Mold for flashless injection molding to encapsulate an integrated circuit chip
US6596212B1 (en) Method and apparatus for increasing thickness of molded body on semiconductor package
US5083193A (en) Semiconductor package, method of manufacturing the same, apparatus for carrying out the method, and assembly facility
US20230068273A1 (en) Leadframe with varying thicknesses and method of manufacturing semiconductor packages
CN107369656A (en) A kind of window-type ball grid array package assembling
JP3317346B2 (en) Method for manufacturing resin-encapsulated semiconductor device
JPH0629338A (en) Resin sealing die for manufacturing semiconductor device and manufacturing method for the device using same
JPS6233329Y2 (en)
JPH02223418A (en) Package of electronic equipment
JPH0738027A (en) Resin-sealed semiconductor device
KR100653607B1 (en) Resin-molding apparatus having a plural sub-runner for semiconductor chip package
JPS60119757A (en) Manufacture of semiconductor device