JPH05126754A - Pattern-defect inspecting apparatus - Google Patents

Abstract

PURPOSE:To improve the resolution in the detection of pattern defects and to prevent the elongation of the detection without the adverse effect on the processing time and without elongating the processing time. CONSTITUTION:The inspected image data are obtained with image sensing devices 3 and 4 over a body to be inspected, wherein a plurality of many specified pattern layers are formed. The image signals from the image sensing devices are delayed. Or reference image data are obtained with other image sensing devices. The position of the inspected image data and the position of the reference image data are aligned with a position aligning circuit 11 based on the deviation of the detected position of a position-deviation detecting circuit 15. Thereafter, the differential differentiated value between the differentiated value A and the maximum value of the differentiated value B is computed with an inspecting circuit 16. The differentiated value A is located in the direction, which is determined by the differentiated value of the pixel data in the reference image data corresponding to the pixel data of the object of the inspection in the inspected image data. The differentiated value B is located in the same direction of the pixel data around the pixel data of the reference image data. The presence or absence of the pattern defect is judged based on the differential differentiated values.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a pattern defect inspection apparatus for detecting a defect by comparing patterns of respective chips on a semiconductor wafer.

[0002]

2. Description of the Related Art A pattern defect inspection for a semiconductor wafer includes a method of comparing pattern shapes of respective chips formed on the semiconductor wafer, a pattern of chips formed on the semiconductor wafer, and a reference pattern generated from design data. It is roughly classified into the method of comparing. Among them, the method of comparing the patterns of each chip is to image the pattern of the semiconductor wafer by a line sensor or an area sensor to obtain inspection image data thereof, and at the same time, separately image the chip adjacent to the chip by a line sensor or the like. Then, this is used as reference image data. The reference image data may be created by delaying the inspection image data from the line sensor. Next, the inspection image data and the reference image data are aligned with each other, and thereafter, the pattern defect on the chip is inspected by the correlation between the inspection image data and the reference image data.

By the way, this pattern defect inspection is performed by the following methods. For example, the first defect inspection is a method of inspecting a pattern defect based on each gray level difference between inspection image data and reference image data. The second defect inspection is a local perturbation method for inspecting pattern defects by comparing the gray level difference with a minimum area of ± 1 pixel between the inspection image data and the reference image data. Next, the third defect inspection is a method of binarizing the gray level difference between the inspection image data and the reference image data, and then excluding the pseudo defect by enlarging / reducing (morphology) processing.

By the way, the second defect inspection can cancel the influence of the deterioration of the pattern shape due to the process and the stacking alignment between the multilayer patterns, and the third defect inspection can suppress the generation of the pseudo defects.

However, while the pseudo defects can be eliminated as described above, the sensitivity of pattern defect detection becomes twice or more worse than the pixel resolution of a line sensor or the like due to enlargement / reduction. Therefore, it is necessary to further reduce the resolution of the line sensor or the like in order to increase the pattern defect detection sensitivity.
However, if the resolution of the line sensor or the like is reduced, the data processing time becomes longer, and it also affects the speedup of image processing, and there is also the problem of the addition of lighting devices in relation to the improvement of the sensitivity of the line sensor or the like. Come out.

On the other hand, the method of comparing the chip with the reference pattern generated from the design data has the same problem as described above, and it is necessary to generate the reference pattern data from the pattern data stored in the database.

[0007]

As described above, when the resolution of the line sensor or the like is reduced, the data processing time becomes longer and the speed of image processing is affected, and further the sensitivity of the line sensor or the like is improved. In connection with, there is a problem of adding lighting equipment.

SUMMARY OF THE INVENTION It is therefore an object of the present invention to provide a pattern defect inspection apparatus which improves the resolution of pattern defect detection, does not affect the processing time, and does not lengthen the processing time.

[0009]

SUMMARY OF THE INVENTION According to the present invention, at least one image pickup device disposed above an object to be inspected in which a plurality of predetermined patterns are formed in a multilayer, and inspection image data from image signals from the image pickup device. And an image creating unit that obtains reference image data from the image signal from the other imaging device by delaying the image signal from the imaging device, and inspection image data and reference image data obtained by the image creating unit. Displacement detecting means for detecting the positional displacement of the inspection image, the aligning means for aligning the inspection image data and the reference image data on the basis of the positional displacement detected by the positional shift detecting means, and the alignment by the aligning means. The differential value in the direction determined by the differential value of the pixel data in the reference image data corresponding to the pixel data of the inspection target in the subsequent inspection image data, and And an inspection determination unit that determines a difference differential value with respect to the maximum value of differential values in the same direction of pixel data existing around the pixel data of the reference image data, and determines the presence or absence of a pattern defect by the difference differential value. The pattern defect inspection apparatus is intended to achieve the above object.

[0010]

By providing such means, the inspection image data is obtained from the image signal from the image pickup device arranged above the object to be inspected in which a plurality of predetermined patterns are formed in multiple layers, and the image pickup device outputs the image data. The reference image data is obtained by delaying the image signal or from the image signal from another imaging device.
The inspection image data and the reference image data are aligned with each other on the basis of the positional deviation between the inspection image data and the reference image data, and thereafter, the pixel data in the reference image data corresponding to the inspection target pixel data in the inspection image data The differential value between the differential value determined by the differential value and the maximum differential value in the same direction of the pixel data existing around the pixel data of the reference image data is calculated. Is determined.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram of a pattern defect inspection apparatus. A semiconductor wafer 2 is placed on the XY table 1. A plurality of chips are regularly arranged on the semiconductor wafer 2. Two image sensors 3 and 4 are arranged above the XY table 1. These imaging sensors 3 and 4 are composed of sensor bodies 5 and 6 and objective lenses 7 and 8. Of these, the sensor bodies 5 and 6 are connected to the alignment circuit 11 and the binarization circuit 12 via A / D converters 9 and 10, respectively. Here, the A / D converter 9 is connected to the alignment circuit 11 and the binarization circuit 12 through the delay circuit 13 and the changeover switch 14, and the A / D converter 10 is aligned through the changeover switch 14. It is connected to the circuit 11 and the binarization circuit 12. The binarization circuit 12 is connected to the position shift detection circuit 15. However, the image data obtained by the image pickup by the one image pickup sensor 3 is sent as the inspection image data to the alignment circuit 11 and the binarization circuit 12, and the image data obtained by the image pickup by the other image pickup sensor 4 is used as the reference image data. It is adapted to be sent to the alignment circuit 11 and the binarization circuit 12. Further, the image data obtained by the image pickup by one of the image pickup sensors 3 is passed through the delay circuit 13 and the changeover switch 14 as reference image data, and the alignment circuit 1 is provided.
It is adapted to be sent to the 1 and 2 binarization circuits 12.

The positional deviation detection circuit 15 has a function of detecting positional deviation between the inspection image data and the reference image data. Specifically, it has a known configuration shown in FIG. That is, the buffer 20 and the temporary delay circuits 21, 2
2 and a local small area buffer 2 of 7 × 9 pixels which is a cutting means
3, the buffer 24, the temporary delay circuit 25, the local small area buffer 26 of 4 × 3 pixels, and the exclusive logic of the number (63) corresponding to the number of pixels (7 × 9) of the local small area buffer 26. A sum (EXOR) circuit group 27, a number (49) of counter / addition circuit groups 28 corresponding to 7 × 7 peripheral pixels, a 49 × 6 stage shift register group 29, an addition circuit 30, and a minimum It is composed of a value detection circuit 31.

The buffer 20 inputs three pieces of reference image data in parallel for each input synchronization clock. Further, the local small area buffer 23 is composed of, for example, a serial-in / parallel-out shift register, and the output data from the buffer 20 and the temporary delay circuits 21 and 22 is input to the area where there is a positional deviation between two sets of image data. The local area of a larger area (for example, 7 × 9 pixels) is sequentially cut out.

On the other hand, the buffer 24 inputs the inspection image data in three parallels at each input synchronization clock. or,
The local small area buffer 26 is composed of, for example, a serial-in / parallel-out shift register, receives the output data from the temporary delay circuit 25, and receives an output data from an area (for example, 4 × 3 pixels) smaller than the above area (7 × 9 pixels). The local area is sequentially cut out.

The exclusive OR circuit group 27 outputs the output from the local small area buffer 26 and 7 × 9 = 63 of the local small area buffer 23.
The discrepancy with the output data of the book is obtained as a position correlation value for each pixel. The counter / addition circuit group 28 counts the output (the number of mismatches) from the exclusive OR circuit 27 for each of a plurality (N) lines (12 lines) in the scanning direction of the image data, and detects the position correlation value of each of the plurality of lines. It is to find the sum. The shift register 29 receives the output data from each counter / adder circuit 28 and stores the position correlation value for each 12 lines of the predetermined (M) sets (6 sets) in the past. The adder circuit 30 calculates the sum of the position correlation values stored in each shift register 29 for each 7 × 7 peripheral pixel (M−
2) It is calculated for each × N. Further, the minimum value detection circuit 31 outputs the minimum value of the total of the six sets of position correlation values calculated by the addition circuit 30 as the position shift amount.

The registration circuit 11 has a function of correcting the positions of the inspection image data and the reference image data to perform the registration. Specifically, as shown in FIG. 3, it has three parallel buffers 40 and 41, of which a Y-direction position correction circuit 42 and an X-direction position correction circuit 43 are connected in series to the buffer 40, and the buffer 41 has a Y direction. The delay circuit 44 is connected. These Y-direction and X-direction position correction circuits 21,
A function 22 obtains the read position of the buffer 20 based on the amount of positional deviation in each direction from the minimum value detection circuit 31, corrects the positional deviation, and aligns the image data for inspection and reference. have.

The inspection determination circuits 16 and 59 detect the differential value in the direction determined by the differential value of the pixel data in the reference image data corresponding to the pixel data to be inspected in the inspection image data after alignment, and the pixel of the reference image data. It has a function of calculating a differential differential value with respect to the maximum differential value in the same direction of pixel data existing around data, and determining the presence or absence of a pattern defect based on the differential differential value. Specifically, it has a known configuration shown in FIG. That is, the inspection image data is spatially differentiated by the first differentiating circuit 50 in each of the x direction, y direction, + 45 ° direction, and −45 ° direction, and the differential value in each direction is sent to the first selector 51. It will be sent.

On the other hand, the reference image data is the second differentiating circuit 5
2 is spatially differentiated in each direction similar to the above, and the differentiated value is sent to the minimum value direction detection circuit 53.

The minimum value direction detecting circuit 53 detects the differential direction corresponding to the smallest differential value of the absolute values of the differential values input in each of the four differential directions, and detects the first differential direction. It is sent to the second selector 54.

Further, the reference image data is the third differentiating circuit 55.
It is designed to be input to. This third differentiation circuit 5
Reference numeral 5 is in synchronization with the timing of inputting one pixel data to the second differentiating circuit 52, and takes in a total of 9 × 3 × 3 pieces of pixel data forming a local small area centered on this pixel data. , And has a function of calculating each differential value in four directions of eight pixel data in the periphery other than the center. The differential values of the eight pixel data output from the third differentiating circuit 55 in each direction are sent to the maximum value detecting circuit 56.

The maximum value detection circuit 56 has the largest absolute value of the absolute value of each differential value in each direction among the differential values of the eight pixel data output from the third differential circuit 55 in each direction. Is detected, and the four detected maximum differential values are sent to the next second selector 54.

The first selector 51 selects the differential value in the differential direction designated by the minimum value direction detection circuit 53 from the differential values in the four directions output from the first differential circuit 50 and subtracts it. It has a function of sending to 57. Also, the second
The selector 54 of 4 inputs from the maximum value detection circuit 53
Of the maximum differential values, the maximum differential value in the differential direction designated by the minimum value direction detection circuit 53 is selected and the subtraction circuit 5 is selected.
It has a function of sending to 7.

The subtraction circuit 57 has a function of subtracting the maximum differential value selected by the second selector 54 from the differential value selected by the first selector 51 and sending it to the negative value cancel circuit 58 as a differential differential value. Have. The negative value cancel circuit 58 replaces only the differential differential value having a negative differential differential value with “0” and sends it to the determination circuit 59.

The determination circuit 59 has a function of determining that the pixel data corresponding to the differential differential value is a pattern defect when the input differential differential value exceeds a preset threshold value. Next, the operation of the device configured as described above will be described.

The image sensor 3 images one chip of the semiconductor wafer 2 and outputs the image signal. This image signal is A
The data is digitized by the / D converter 9 and sent to the alignment circuit 11 as inspection image data, and also binarized by the binarization circuit 12 and sent to the misregistration detection circuit 15. Further, the image sensor 4 images the chip adjacent to the above chip and outputs the image signal. This image signal is A
It is digitized by the / D converter 10 and sent to the alignment circuit 11 as reference image data, and is also binarized by the binarization circuit 12 and sent to the misregistration detection circuit 15. Then, the positional deviation detection circuit 15 detects the positional deviation amounts of the inspection image data and the reference image data in the X direction and the Y direction and sends them to the alignment circuit 11. The alignment circuit 11 includes X-direction and Y-direction position correction circuits 43 and 42.
Then, the positional deviation of the inspection image data with respect to the reference image data is corrected and sent to the inspection circuit 16.

The inspection image data 60 is formed by a plurality of pixel data 61 as shown in FIG. 5, and a pattern 62 is formed by the level values of these pixel data 61.
In addition, a local small area 63 is formed by a total of 9 pixel data 61 of 3 × 3. For example, the local small area 63 at the position A is located at the edge portion of the pattern 62, the local small area 63 at the position B is located at the corner portion of the pattern 62, and the local small area 63 at the position C is a uniform portion other than the pattern 62. Located in.

Next, the operation of the inspection / decision circuits 16 and 59 will be described. The first differentiating circuit 50 is, for example, x shown in FIG.
Spatial differentiation is performed using the respective differential parameters 64a to 64d in the direction, the y direction, the + 45 ° direction, and the −45 ° direction. Figure 7
Indicates these spatial differentiation results, and when the original image has edges in the y direction, the differential value in the x direction is maximum and the differential value in the y direction is minimum “0”. Then, the differential values in the + 45 ° direction and the −45 ° direction also occur although they are smaller than the differential value in the x direction. In addition, as shown in FIG. 8A, if there is a defect G protruding in the x direction near the edge in the original image, x
The differential value of the direction has a discontinuous portion in the x direction at the defect G position. In addition, the differential value in the y direction is "0" corresponding to the defect G.
A value other than is generated. Also, + 45 ° direction and −45
A differential value due to the defect G also occurs in the differential value in the ° direction.
Then, as shown in FIG. 9, differential values 65a to 6 in four directions with respect to the pixel data of "5" at the center of the local small area 63 at the position A.
5d are "0", "4", "4", and "-4", respectively.

Similarly, the second differentiating circuit 52 spatially differentiates each pixel data forming the reference image data in four directions to obtain each differential value. Then, the position A in the reference image data
The absolute value of each differential value of is “0” “4” “4” “4”. Here, since the minimum value is “0”, the minimum value direction detection circuit 53 sets the first x-direction as the differential value 65a of “0”.
It is sent to the second selectors 51 and 54.

Next, the third differentiating circuit 55 obtains respective differential values in four directions with respect to eight pixel data around the pixel data spatially differentiated by the second differentiating circuit 52.
That is, in the pixel data at the center of the position A, the differential values in the x direction of the eight surrounding pixel data are all "0", as shown in FIG. Also, in the y direction, there are 6 "5" and 2 "4", and in the + 45 ° direction there are 6 "5" and 2 "4",
In the −45 ° direction, “−5” is 6 and “-4” is 2. Therefore, the maximum absolute value in each direction is “0” “5”
It becomes "5" and "5".

Therefore, at the edge portion of the position A, as shown in FIG.
As shown in 0, the minimum value direction detection circuit 53 selects the x direction. As a result, the first selector 51 selects the differential value “0” in the x direction from the differential values “0”, “4”, “4”, and “−4” of the first differentiating circuit 50. The second selector 54 selects the value "0" in the x direction out of the maximum absolute values "0", "5", "5", "5" of the third differentiating circuit 55 in each direction. As a result, the subtraction circuit 57 outputs the differential differential value “0”. In this case, naturally, the determination circuit 59 does not detect the pattern defect.

Next, in the corner portion at the position B, the difference differential value of the subtraction circuit 57 becomes "-4" by the same operation as shown in FIG. 10, and this value becomes "0" in the negative cancellation circuit 58. .. Therefore, the determination circuit 59 does not detect the pattern defect. Similarly, no pattern defect is output in the uniform portion at the position C. Next, a case where there is a defect and there is a shift of about one pixel between the inspection image data and the reference image data will be described.

First, as shown in FIG. 11, in the local small area 63 at the edge portion of the position A, the differential value in the x direction output from the first differentiating circuit 50 on the inspection image data side is a value corresponding to the defect. Have. On the other hand, since the differential value in the x direction of the pixel data around the relevant pixel data on the reference image data side is "0" as described above, the subtraction circuit 57 outputs the differential differential value corresponding to the defect scale. .. As a result, the determination circuit 59 determines that there is a pattern defect.

Next, in the local sub-region 63 of the corner portion of the position B,
As described above, the differentiation direction designated by the minimum value direction detection circuit 53 is not uniquely determined, but the first direction on the inspection image data side
The differential value in each direction including the −45 ° direction output from the differentiating circuit 50 has a value corresponding to the defect. Therefore, the differential value output from the first selector 51 becomes a value corresponding to the defect. On the other hand, since the differential value in each direction of the pixel data around the corresponding pixel data on the reference image data side does not correspond to the differential value due to the existence of the defect, the differential differential value of the subtraction circuit 57 is a value. Have. Then, the defect G is detected as shown in FIG.

When the semiconductor wafer 2 has a multilayer pattern as shown in FIG. 13, the differential value of the first differential circuit 50 of the inspection image data 70 and the third differential circuit 55 of the reference image data 71 are the same as above. The subtraction circuit 57 calculates the differential value of the difference between the differential value and the maximum value of the differential value, and thus the presence or absence of the pattern defect is determined from the differential value.

As described above, in the above-described embodiment, even if the coordinates of the inspection image data and the reference image data are slightly deviated due to the deterioration of the pattern or the alignment error between the patterns, etc., the defect 20 caused by the deviation is caused. It is possible to remove in advance the inclusion of the pseudo defect. Therefore,
Only the defect G can be detected accurately and surely. Moreover, the defect inspection of each chip of the semiconductor wafer 2 can be performed with a high S / N ratio, and even if the semiconductor wafer 2 has a multilayer pattern, it can be inspected with high accuracy.

[0037]

As described above in detail, according to the present invention, it is possible to provide a pattern defect inspection apparatus which improves the resolution of pattern defect detection and does not affect the processing time and lengthens it.

[Brief description of drawings]

FIG. 1 is a configuration diagram showing an embodiment of a pattern defect inspection apparatus according to the present invention.

FIG. 2 is a specific configuration diagram of a positional deviation detection circuit in the device.

FIG. 3 is a configuration diagram of an alignment circuit in the device.

FIG. 4 is a specific configuration diagram of an inspection circuit in the same device.

FIG. 5 is a schematic diagram showing inspection image data in the apparatus.

FIG. 6 is a schematic diagram showing each differential parameter of a differential circuit in the same device.

FIG. 7 is a diagram showing a differential value in each direction in the same apparatus when no defect exists.

FIG. 8 is a diagram showing differential values in each direction when a defect exists in the same device.

FIG. 9 is a diagram showing a differentiation result of a differentiation circuit in the same device.

FIG. 10 is a schematic diagram showing an operation of a minimum value direction detection circuit in the same device.

FIG. 11 is a diagram showing a defect detection result in the apparatus.

FIG. 12 is a diagram showing a defect detection result in the apparatus.

FIG. 13 is a view showing a defect detection result in the same device.

[Explanation of symbols]

1 ... XY table, 2 ... Semiconductor wafer, 3, 4 ... Image sensor, 9, 10 ... A / D converter, 11 ... Positioning circuit, 12 ... Binarization circuit, 13 ... Delay circuit, 14 ... Changeover switch, 15 ... Position shift detection circuit, 16 ... Inspection circuit.

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁵ Identification code Office reference number FI technical display location H01L 21/66 J 8406-4M

Claims (2)

[Claims] 1. An at least one image pickup device disposed above an object to be inspected in which a plurality of predetermined patterns are formed in multiple layers, and inspection image data is obtained from an image signal from this image pickup device, An image creating unit that obtains reference image data from an image signal delayed from the image signal or from another image pickup device, and detects a positional shift between the inspection image data obtained by the image creating unit and the reference image data. A positional deviation detecting means, a positioning means for positioning the inspection image data and the reference image data on the basis of the positional deviation detected by the positional deviation detecting means, and the inspection after the positional adjustment by the positioning means. A differential value in the direction determined by the differential value of the pixel data in the reference image data corresponding to the pixel data of the inspection target in the image data, An inspection determination unit that calculates a differential differential value with respect to the maximum differential value in the same direction of pixel data existing around the pixel data of the reference image data, and determines the presence or absence of a pattern defect by the differential differential value. A pattern defect inspection device characterized by being provided. 2. The inspection determining means comprises a first differentiating circuit for differentiating each pixel data of the inspection image data after alignment by the aligning means over a plurality of directions, and after alignment by the aligning means. Second differential circuit for differentiating each pixel data of the reference image data in a plurality of directions, and minimum value direction detection for detecting a differential direction in which the differential value obtained by the second differential circuit is the minimum value A circuit, a third differentiating circuit that differentiates each pixel data around the differentiating pixel data of the reference image data in a plurality of directions, and among the differentiating values obtained by the third differentiating circuit A maximum value detection circuit that detects the maximum differential value in each direction,
A first selector that selects a differential value in the direction detected by the minimum value direction detection circuit among differential values in each direction output from the first differential circuit, and is output from the maximum value detection circuit. A second selector that selects the maximum differential value in the direction detected by the minimum value direction detection circuit among the maximum differential values in each direction; the differential value output from the first selector; A subtraction circuit that outputs a differential differential value with respect to the maximum differential value output from the selector, and a determination circuit that determines the relevant pixel data as a pattern defect when the output differential differential value exceeds a predetermined threshold value. The pattern defect inspection apparatus according to claim 1, further comprising: