JPH05119463A - Method for inspecting defect in reticule - Google Patents

Abstract

PURPOSE:To improve the sensitivity of defect detection and to improve the efficiency in a defect inspection stage. CONSTITUTION:Reticules 1, 2 formed with circuit patterns to be an inspection object are set on a wafer stepper 3 and exposed at different exposing quantity onto a sample wafer 10 deposited with a resist film 11 on a surface, by which plural patterns are transferred. The respective patterns A0 to A5, B0 to B5 transferred onto the sample wafer 10 are compares and collated in arbitrary combinations by using a wafer defect inspection machine 20, by which the defects of the circuit patterns F1 on the reticule 1 are detected.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a reticle defect inspection method for inspecting a circuit pattern formed on a reticle using a wafer stepper for defects in a semiconductor integrated circuit forming process or the like.

[0002]

2. Description of the Related Art Conventionally, as a technique in such a field,
There was a thing as described in Japanese Patent Publication No. 2-58777. As the density of large-scale integrated circuits (LSIs) and ultra-large-scale integrated circuits (VLSIs) becomes higher and the scale becomes larger, circuit element figures become finer year by year, and the accompanying integrated circuits work normally, and integrated circuits For the purpose of not impairing the reliability of the circuit pattern, various efforts have been made to eliminate defects caused by a circuit pattern itself formed on a reticle, which is a master plate for forming a circuit, and foreign matters on the circuit pattern.

In the conventional reticle defect inspection method, the circuit pattern on the reticle is read in the form of an image by, for example, an image sensor, the circuit pattern is compared and determined by image processing using a computer, and the circuit pattern on the reticle itself is detected. It was designed to detect the presence or absence of defects.

However, with higher density and larger scale, for example, at the level of 4 Mbit DRAM (Dynamic Random Access Memory) or 16 Mbit DRAM, the problematic defect size becomes 1.0 μm or less. However, it cannot be detected as a defect by the method of inspecting the reticle itself. Therefore, it is often the case that the reticle is determined to have no defect and is passed to the wafer process, and the reticle is exposed to the reticle and the circuit element formed on the wafer is often found to have the defect on the reticle for the first time. Has occurred. As described above, the conventional method of inspecting the reticle itself cannot guarantee that the circuit element formation on the wafer is not affected due to the limit of the defect detection size.

Therefore, in the technique of the above-mentioned document, a reticle is used to expose a wafer having a resist film deposited on the surface thereof, and a resist pattern is formed (transferred) on the wafer by development. Then, a method of inspecting the presence or absence of a defect on the reticle by comparing and inspecting the patterns transferred on the wafer has been proposed.

[0006]

However, the conventional reticle defect inspection method has the following problems.
In the conventional method of inspecting the reticle itself, the circuit pattern on the reticle is read by the image sensor and image processed by the computer, so the defect detection size is limited in terms of resolution, and the circuit elements to be formed on the wafer are limited. It is not possible to detect all defects that affect the. In order to solve this, in the method of the above literature, the pattern transferred onto the wafer is inspected using the reticle to be inspected. However, the thickness of the resist film on the wafer used there, the resist Since the underlying shape of the film is different from the process of actually forming the circuit element, it cannot be said to be sufficient as a reticle defect inspection method.

Therefore, a method of preparing various sample wafers having different resist film thicknesses, conducting a transfer experiment for each, and inspecting each wafer is also conceivable. However, since this method requires a large number of processing steps, it cannot be said to be practical, and a reticle defect inspection method that is still technically satisfactory cannot be provided.

The present invention has problems in that the size of defect detection is limited, and the appearance of pattern defects differs depending on the thickness of the resist film on the wafer and the difference in the underlying shape. The present invention provides a reticle defect inspection method that solves the problem of low reticle defect.

[0009]

FIG. 2 is a characteristic diagram of exposure dose-resist size on a wafer for explaining the principle of the present invention. When a reticle with a circuit pattern to be inspected is used and the reticle is exposed on a sample wafer having a resist film deposited on the surface and transferred to the resist film, the exposure amount-the resist size on the wafer is shown in FIG. Shows a non-linear characteristic. Therefore, the present invention utilizes this non-linear characteristic to set a reticle to be inspected on a wafer stepper that can move in a stepwise manner on a plane, and perform different exposures on a sample wafer with a resist film deposited on the surface. A plurality of patterns are transferred by exposure under the condition, that is, by changing the exposure amount. Then, by using a wafer defect inspection machine, each pattern transferred onto the sample wafer is read and converted into the form of image data. By comparing and comparing each image data, the defect of the circuit pattern on the reticle is detected. I'm trying to detect.

[0010]

According to the present invention, since the reticle defect inspection method is configured as described above, when transferring a plurality of patterns with different exposure amounts when transferring onto a sample wafer using the reticle to be inspected, Due to the non-linear characteristics as shown in FIG. 2, a slight difference in shape called a pattern defect
The pattern appears amplified on the pattern transferred onto the sample wafer. Therefore, by reading this difference with a wafer defect inspection machine and comparing and contrasting it, it is possible to quickly and easily detect a defect having a slightly different shape, which is included in the formation of many millions of figures. Is possible. Therefore, the above problem can be solved.

[0011]

EXAMPLES First Embodiment FIG. 1 (a) ~ (d) is a process diagram of a reticle defect detection method of a first embodiment of the present invention. As shown in FIG. 1A, when the same circuit pattern is not repeatedly included on the reticle to be inspected and only a single circuit pattern exists, the same circuit patterns F1 and F2 are formed 2 A sheet of first and second reticles 1 and 2 is prepared. In FIG. 1B, the first reticle 1 is set on a wafer step 3 which can be moved stepwise on a plane. Then, the exposure condition (exposure amount) is changed on the sample wafer 10 having the resist film 11 deposited on the surface thereof, and the resist film 11 is sequentially exposed at predetermined vertical positions as shown in FIG. A plurality of latent images (A0 to A5) having different exposure amounts are formed in the film 11. Next, the second reticle 2 is set on the wafer stepper 3 and, similarly to the first reticle 1, the exposure conditions (exposure amount) are changed to sequentially expose the resist film 11 at a plurality of positions in the vertical and horizontal directions. A plurality of latent images (B0 to B5) having different exposure amounts are formed on the. After that, when the sample wafer 10 is developed with an organic solvent or the like, a plurality of resist patterns A0 to A5 and B0 to B5 to which the circuit patterns F1 and F2 are transferred are obtained.

Next, as shown in FIG. 1D, the defects of the reticles 1 and 2 are detected by using the wafer defect inspection machine 20. That is, the wafer defect inspection machine 20 is composed of an image input device such as an image sensor and a computer for processing the output of the image input device. Then, in the image input process 21, the resist patterns A0 to A5 and B0 to B5 on the sample wafer 10 are read by the image input device, and the read result is converted into the image data form by the image process 22, and these conversions are performed. The result is sent to the comparison target processing 23. In the comparison target process 23, based on the image data from the image process 22, for example, the sample wafer 10 of FIG.
The resist patterns A0, B0, B1,
The defects of the circuit patterns F1 and F2 on the reticles 1 and 2 are detected by comparing the shapes of B2 ,.

The first embodiment has the following advantages. The presence or absence of defects can be inspected as a result of being actually transferred onto the sample wafer 10, without being limited by the defect detection limit of the wafer defect inspection machine that inspects the reticle itself as in the conventional case. Furthermore, the sample wafer 10
Differences in the appearance of pattern defects due to the difference in the thickness of the upper resist film 11 and the shape of the underlying layer can also be simulated by amplifying the appearance of pattern defects by changing the exposure conditions (exposure amount). It will be possible.

As described above, in this embodiment, the reticles 1 and 2 used in the actual manufacturing of the device are targeted, and for example, the shapes slightly included in many figures of several million are formed. Different defects can be detected easily and accurately at high speed. Therefore, the efficiency of the defect inspection process in the semiconductor integrated circuit forming process can be improved.

Second Embodiment FIG. 3 is a block diagram of a reticle showing a second embodiment of the present invention. When a plurality of identical circuit patterns F1 and F2 are formed on the reticle 3 to be inspected, it is not necessary to use two reticles 1 and 2 as in the first embodiment.
That is, using the reticle 3, as shown in FIG. 1C, the exposure amount is changed with respect to the circuit pattern F1 and transferred onto the resist film 11 on the sample wafer 10, and the resist patterns A0 to A are transferred.
5 is formed. Further, the circuit pattern F2 is transferred to the resist film 11 by changing the exposure amount to form resist patterns B0 to B5. Then, the resist patterns A0 to A5 and B0 to B formed on the sample wafer 10
5 may be compared and contrasted in the horizontal direction using the wafer defect inspection machine 20 to detect defects in the circuit patterns F1 and F2 on the reticle 3.

In addition to the same advantages as the first embodiment, the second embodiment has the same reticle as the reticle 1 to be inspected for inspection in the first embodiment. Although it is necessary to make two, it is not necessary to make two reticle 3 in this second embodiment, so that the number of reticle manufacturing steps can be reduced and the inspection cost can be reduced, and efficient inspection can be performed. ..

Third Embodiment For example, when inspecting a reticle 1 on which a circuit pattern F1 is formed, as shown in FIG. 1A, two reticles 1 and 2 are used as in the first embodiment. Using sample wafer 10
Transferred onto the resist pattern A0 to A5
In addition to the method of comparing and inspecting B0 to B5 with each other, there is the following method as a method of inspecting more easily.

FIGS. 4A and 4B are diagrams of a normal circuit pattern and a defective circuit pattern showing a third embodiment of the present invention. For example, one reticle 1 as shown in FIG. 1 (a) is used, and it is attached to the wafer stepper 3 as shown in FIG. 1 (b).
Set to. Then, the sample wafer 1 is exposed to a degree lower than the standard exposure amount, and as shown in FIG.
A plurality of resist patterns A0 to A5 are formed on the substrate 0.
Further, the same reticle 1 is used to perform an exposure that is more than the standard exposure amount, and a plurality of register patterns B0 to B5 are formed on the sample wafer 10 as shown in FIG.

Next, as shown in FIG. 1D, the wafer defect inspection machine 20 is used, and in the image input process 21, the resist patterns A0 to A5 and B0 to B5 are read by the image input device.

As shown in FIG. 4, when the circuit pattern F1 on the reticle 1 is a normal circuit pattern and the defective circuit pattern is F1a, and the defective circuit pattern is F1b, the finished size of the resist pattern varies depending on the exposure amount. .. In the case of the normal circuit pattern F1a, the resist pattern Aa that is slightly exposed to the light is small, and the resist pattern Ba that is slightly exposed to the large is large. On the other hand, in the case of the defective circuit pattern F1b, both the resist pattern Ab underexposed and the resist pattern Bb overexposed are smaller than the normal circuit pattern.

Therefore, in the image processing 22 shown in FIG.
When converting the output of the image input processing 21 into the form of image data, the resist patterns Ba and B that are overexposed are exposed.
The image data of b is biased and normalized, and the normalized image data of the resist patterns Ba-1 and Bb-1 and the image data of the resist patterns Aa and Ab that are underexposed are compared. In process 23, comparison and comparison are performed to detect a difference in shape between the two. Thereby, the defect of the circuit pattern F1 on the reticle 1 can be detected with higher accuracy than in the first embodiment.

Further, in the third embodiment, the image input processing 21 is performed by the image processing 22 even though they have the same shape.
By normalizing the difference in the read signal level in the above step, the difference in the read signal level due to the pattern defect is highlighted, so that the inspection probability of the wafer defect inspection machine 20 can be increased.

The present invention is not limited to the above embodiment,
Various modifications are possible. Examples of such modifications include the following. The arrangement of the resist patterns A0 to A5 and B0 to B5 shown in FIG. 1C is an example, and
As shown in the figure, the combination of the exposure conditions is not limited to six levels, and various combinations of the exposure conditions of the resist patterns to be compared and inspected can be considered.

[0024]

As described in detail above, according to the present invention, the reticle to be inspected is set on the wafer stepper by utilizing the non-linear characteristic of the exposure amount-resist size on the wafer, and the circuit on the reticle is set. The pattern is transferred onto the sample wafer under different exposure conditions. As a result, a slight difference in shape called a pattern defect can be amplified and revealed on the sample wafer. Then, by comparing and contrasting each pattern transferred onto the sample wafer with a wafer defect inspection machine, defects having slightly different shapes, which are included in many figures such as several millions, are formed. It is possible to detect at high speed, easily and accurately.

That is, according to the method of the present invention, the presence or absence of a defect is inspected as a result of being actually transferred onto a sample wafer without being restricted by the defect detection limit of a wafer defect inspection machine for inspecting the reticle itself as in the conventional case. can do. Moreover, the difference in the appearance of pattern defects due to the difference in the thickness of the resist film on the sample wafer and the difference in the underlying shape can be simulated by amplifying the appearance of pattern defects by changing the exposure conditions. Therefore, the defect can be detected with high accuracy.

[Brief description of drawings]

FIG. 1 is a process step diagram of a reticle defect inspection method showing a first embodiment of the present invention.

FIG. 2 is a characteristic diagram of exposure amount-resist size on wafer for explaining the principle of the present invention.

FIG. 3 is a configuration diagram of a reticle showing a second embodiment of the present invention.

FIG. 4 is a diagram showing a normal circuit pattern and a defective circuit pattern for explaining a third embodiment of the present invention.

[Explanation of symbols]

1, Reticle 3 Wafer Stepper 10 Sample Wafer 11 Resist Film 20 Wafer Defect Inspector 21 Image Input Processing 22 Image Processing 23 Comparative Control Processing F1, F2, F1a, F1b Circuit Pattern A0-A5, Aa, Ab, B0-B5 Ba, Bb, B
a-1, Bb-1 resist pattern

Claims (1)

[Claims] 1. A reticle defect inspection method for detecting a defect in a circuit pattern on a reticle to be inspected, wherein the reticle is set on a wafer stepper which can be moved stepwise on a plane, and a resist film is deposited on the surface. A plurality of patterns are transferred by exposing under different exposure conditions on the prepared sample wafer, each pattern is read by using a wafer defect inspection machine, converted into the form of image data, and the respective image data are compared. A reticle defect inspection method characterized by detecting a defect in a circuit pattern on the reticle by making a comparison.