JPH05115018A - Video signal processor - Google Patents

Abstract

PURPOSE:To obtain a picture with excellent quality corresponding to the difference from a display device and the strength of an electric field by detecting how much a level of an input video signal is and allowing a central control circuit to set a high quality processing circuit due to white level expansion or the like to an optimum state. CONSTITUTION:A level discrimination circuit 14 analyzes into which range a level of an input video signal is distributed and the result of discrimination is inputted to a CPU 18. The CPU 18 controls the characteristic of a black level expansion circuit 2 in a video signal path, a DC transmission quantity correction circuit 3 and an ALC 5 or the like in response to the discrimination content to obtain an optimum video signal in response to the input path.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video signal processing device such as a television receiver, and more particularly to a device for detecting the level of a luminance signal or a color difference signal and controlling the input / output characteristics of the luminance signal. Is.

[0002]

2. Description of the Related Art FIG. 10A shows a conventional luminance signal processing circuit. A luminance (Y) signal is separated from the composite video signal demodulated by a video detection circuit (not shown) and supplied to the input terminal 80. This Y signal is input to the clamp circuit 81 via the coupling capacitance C1 and clamped. Clamp circuit 81
The luminance signal whose pedestal voltage is stabilized by is input to the black decompression circuit 82, and the luminance signal close to black is decompressed so as not to be blackened. Next, the DC transmission amount correction circuit 83
Is input to the APL (Average Picture)
Level: The direct current (DC) of the luminance signal in the screen display period is changed according to (Average luminance level). The contrast circuit 84 in the next stage controls the gain for amplifying the luminance signal to increase or decrease the luminance amplitude. Next-stage ACL (Automa
In the tic contrast limiter, the luminance signal is limited so that the white peak of the luminance signal does not exceed a certain value. The brightness signal subjected to the signal processing is clamped again by the bright circuit 86, the direct current level is stabilized, and the brightness signal is output to the output terminal 87.

In recent years, characteristic black expansion and ACL will be described with reference to FIG. The black expansion circuit 82 amplifies a DC voltage equal to or lower than a certain DC voltage of the input signal and adds it to the original signal.
As a result, the input / output characteristics are as shown by the dotted line in FIG. 9B, and the input signal near black is expanded. On the other hand, the ACL 85 non-linearly compresses the white peak level. When the luminance signal exceeds the white peak voltage, an attenuator circuit having a gamma characteristic is used for an input having a certain value or more so that the white peak does not exceed the set voltage. The input / output characteristics in this case are as shown by the dotted line in FIG. With these image quality improvement circuits, good received video can be obtained.

By the way, the same can be said for the black expansion circuit and the ACL, but since the start / stop of the circuit operation is determined by the external time constant, a shift due to charging / discharging, that is, an operation offset occurs.

For example, in the black expansion circuit, the blackest level of the input signal is detected, feedback is performed so that the level does not fall below the pedestal, and a feedback filter is externally attached. The capacitor C2 and the resistor R3 in FIG. 10A correspond to "the filter. When the blackest level of the input luminance signal does not reach the pedestal, the black expansion circuit charges C2 and R3 and starts the black expansion operation. When the black level of the input becomes equal to the pedestal, the charging current does not flow from the black expansion circuit and the potential of the capacitor C2 stabilizes, but even at this time, the electric charge is charged through the resistor R3, As a result, the black expansion circuit needs to supply the charging current, and therefore, the black expansion operation is performed even though the blackest level reaches the pedestal, so that FIG.
The blackout phenomenon as shown in (c) occurs. This is ACL
But the same is true.

In the recent black expansion circuits and ACLs, the black signal and the start voltage of the ACL compression operation are changed according to the APL to adaptively expand / compress the signal. Is complicated, and there is also a problem that this information alone cannot be sufficiently adaptively processed.

Further, when the dynamic range of the display is narrow, such as a liquid crystal display, the black extension and ACL cannot extend the signal of the average luminance level, and there is no judgment information for performing this.

Further, when weak electric field noise is mixed in the weak electric field, there is a problem in that it is impossible to distinguish between the luminance signal and the noise in the black extension and ACL, and there is a problem that the noise response also occurs.

[0009]

As described above, in the conventional system, the start / stop of the circuit operation in the black extension or ACL is determined by the external time constant. Therefore, the deviation due to charging / discharging, that is, the operation offset. Occurs.
Further, the information of the luminance signal waveform is complicated, and there is a problem that the black expansion and the white compression processing cannot be sufficiently adaptively processed only by the information of the APL. Furthermore, countermeasures are insufficient when the dynamic range of a display is narrow, such as in a liquid crystal display. When the weak electric field noise is mixed in the weak electric field, there is a problem in that it is impossible to distinguish between the luminance signal and the noise in the black expansion and the ACL, and there is a problem that the noise response also occurs.

Therefore, an object of the present invention is to detect how much the average level of the input luminance signal is in a certain period, and control means (for example, C
It is an object of the present invention to provide a video signal processing device capable of setting an image quality enhancement circuit such as black extension for PU) and adaptively obtaining an optimum display depending on the difference in display and the strength of electric field.

[0011]

According to the present invention, the level of an input video signal is divided, which zone is sampled in each line, and the sum of each field is counted to control the contents of the video signal. CPU) is analyzed and the operation of the image quality improving circuit is optimally set to achieve the above object. The image quality improving circuit is provided with a function of expanding the signal of the average brightness level and enables the image quality control corresponding to the display.

[0012]

By directly monitoring the level of the luminance signal as described above, it is possible to calculate the distribution for each field in which zone the level is high, and to set the luminance input / output characteristics accordingly. Will be possible for the first time. By utilizing this, and counting the level of the blanking period, it is possible to determine the amount of noise, that is, the weak electric field, and it is also possible to set the luminance input / output characteristics including the weak electric field information.

[0013]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows an embodiment of the present invention. The luminance signal Yin is input to the clamp circuit 1 via the input terminal 101 and the coupling capacitance C1. The luminance signal whose pedestal voltage is stabilized is input to the black expansion circuit 2. The output of the black expansion circuit 2 is input to the DC transmission amount correction circuit 3, and the corrected output is input to the contrast circuit 4 to increase or decrease the amplitude. The output luminance signal of the contrast circuit 4 is input to the automatic contrast limiter (ACL) 5, and white output or compression is performed and output. The output luminance signal is finally stabilized by the bright circuit 6 so that the DC level as the final output luminance signal is stabilized again and output to the output terminal 102.

The luminance signal clamped by the clamp circuit 1 is further input to the level discriminating circuit 14 which constitutes the level distribution detecting device to discriminate at which level it is. Here, an example in which the brightness level is divided into three will be described. The level of the luminance signal is divided into zones z1 to z3, and when the level discrimination circuit 14 is at that level, each zone counter 1
The determination signal is output to 5 to 17. The outputs of the counters 15 to 17 are input to the control circuit (eg CPU) 18.
From the black expansion circuit 2, the expanded luminance signal is supplied to the black crush detection circuit 7. The blackout condition detection circuit 7 outputs detection only when a blackout condition occurs. The latch circuit 12 latches this black crush detection signal, and the CPU 18
Supply to. From the ACL, the brightness signal after being expanded or compressed is input to the white crush detection circuit 8. The whiteout detection circuit 8 detects whether or not the whitest peak of the luminance signal exceeds the set level. When whiteout occurs, the detection signal is supplied to the counter 13. The output of the counter 13 is supplied to the CPU 18.

The CPU 18 has the zone counters 15-1.
7, the information from the latch circuit 12 and the counter 13
It is stored in the AM 19 and the optimum control state is calculated. Based on this calculation result, the black expansion circuit 2 and the DC transmission amount correction circuit 3
And DC control circuits 9 to 1 for controlling the ACL 5
Send data to 1.

The black expansion circuit 2, the DC transmission amount correction circuit 3 and the ACL 5 in FIG. 1 only set the control state according to the DC information, and the conventional black level detection function corresponds to the black crush detection circuit. The same applies to the conventional whiteout detection function, which corresponds to the whiteout detection circuit 8.

FIG. 2A shows the zone counter 15 of FIG.
It is a figure for explaining operation of ~ 17. Now, assume that a ramp waveform signal of 100% IRE is input to the input terminal 101. The level from the pedestal to the white peak is divided into three as described above, and the zones from the highest level are zones z1.
z3. A sampling clock is given as shown in (c) of FIG. 2A, and the video signal is sampled at the rising edge of the clock. Then, for example, at the rising edge of B1, the video signal is at the level of zone 3. Since the horizontal blanking period naturally becomes a level below the pedestal level, the horizontal blanking pulse as shown in (b) is used to stop the sampling during that period, and the level determination operation is stopped. Therefore, the rising edges of the clocks A1 and A2 are ignored. Valid data are B1 to B6. In this example, the sampling clock has a frequency of 8 fH for convenience of explanation. The blanking pulse (b) in the horizontal blanking period is set longer than the actual blanking period so that the luminance level in the horizontal blanking period is not sampled even if it is wrong. B1
The level discrimination circuit outputs to which zone each of the 6 sample points up to B6 is located. In the zone counters 15 to 17, any one of the counters counts 1 at each point. This count is done over one field, and CP is used to determine the count value in each zone.
U18 detects. Based on this result, the CPU 18 calculates the optimum state setting of the image quality improving function, and the DC control circuit 9
Each corresponding circuit is controlled via 11 to 11.

An example of the control characteristics will be described with reference to FIG. When the counted results of the sampled fields are concentrated in the zones z1 and z2 and almost not in the zone z3, the black expansion is activated. If the degree of concentration in the zones z1 and z2 is high, the black extension start voltage is set high as shown by the characteristic line 2a in (a) of FIG. If not so, the start voltage is set low as shown by the characteristic line 1a. As will be described later, the latch output from the blackout condition detection circuit may be used for this determination. When in this distribution, the ACL5 operates in the direction of compressing the input signal as indicated by the characteristic lines 1b, 2b, and 3b shown in (b) of FIG. The setting order of the characteristic lines 1b, 2b, 3b is such that the count value of the zone 1 is the smallest, and when the count value is the smallest, the state of 1b which is the lightest compression is taken. When it is a little large, the start voltage is lowered like 2b and the white peak is lowered without changing the compression gain. When it is larger, the compression characteristic of a two-point broken line like the characteristic line 3b is set, and only the portion close to white is compressed without changing the start point. The compression method may be such a polygonal line type, or a completely non-linear gamma curve compression method may be used. Characteristic line 2 is the compression method
b and 3b may be set simultaneously instead of separately. The method of compressing white with the characteristic of the characteristic line 3b can minimize the influence on the signal of intermediate luminance. As will be described later, the count output from the white crush detection circuit may be used for this determination. At the same time, in the DC transmission amount correction, the DC of the input / output characteristics is shifted according to the set DC regeneration rate.

In the case of the present example, the APL is expected to be high because it is concentrated in zone 1 and zone 2. When the DC regeneration rate is set to less than 100%, the input / output characteristic is shifted in the direction of the characteristic line 2c in (c) of FIG. On the contrary, when it exceeds 100%, the DC transmission amount correction direct circuit 3 is controlled so as to shift in the direction of the characteristic line 1c.

Next, the case where the count results are concentrated in the zones 2 and 3 will be described below. In this case, since there are many levels near black, the black decompression circuit 2 is not operated.
A solid characteristic line of (a) of (A) is used, or a slight black extension is applied as shown by 1a of FIG. If the count value concentrates in the zone 3 to a high degree, the former may be used, and if it is not so high, the latter may be used. The ACL 5 may have a characteristic such as the solid characteristic line in FIG.
It may be operated in the extending direction as shown in FIGS. 4b and 5b. At this time, the direction of operation of the DC transmission amount correction circuit 3 is determined by the set DC regeneration rate. The APL is expected to be low because it is concentrated in zones 2 and 3. Therefore, when the reproduction rate is set to less than 100%,
When the DC level is shifted in the direction of the characteristic line 1c of (c), and conversely exceeds 100%, D as shown in FIG.
Try to lower C. In the conventional case where only the APL was monitored, it was difficult to judge whether or not the white expansion should be performed. However, if the signal level is known in this way, how many components around white are present. Since it can be detected, it is possible to judge white extension. Of course, as in the case described above, when controlling the operating points of these circuits, it is also possible to set the outputs of the white crush detection circuit 8 and the black crush detection circuit 7 together.

Next, a method of detecting weak electric field noise will be described. This will be described with reference to the system diagram of FIG. 1 and FIG. In a weak electric field, pulsed noise called weak electric field noise is uniformly applied to the luminance signal. At this time, the level discrimination circuit 14
Since the level of the signal including noise is detected, if the sampled luminance signal happens to have noise, the level changes due to the noise. It is also possible to sample and detect the noise component from the pedestal that does not include the luminance signal at the sample value in the horizontal blanking period, that is, at the positions A1 and A2 in FIG. The level of the sampling points of A1 and A2 fluctuates due to the leakage amount of the above, and it is difficult to extract only the pure noise component. Therefore, if the vicinity of the vertical synchronizing period as shown in FIG. 3B is used, it can be easily detected by only processing the timing pulse. Figure 3 shows the vertical blanking period
As shown in (B), it is divided into an equalized pulse and a period only for horizontal synchronization with no vertical synchronizing signal and no luminance signal. Of these, each count circuit is operated in an appropriate period excluding the vertical synchronization period in the same manner as in the video display period. When there is no noise, the samples in zone 3 only are counted during this period, and the level of zone 2 or higher is not reached. However, as noise is mixed, positive noise is added at the sample point, and when reaching the zone 2, the counter 16 in the zone 2
Counts this, so that the CPU 18 can detect the mixing of noise. Therefore, the CPU 18 sets the counter 16
If the results of counting by the counters 15 to 17 are summed up once at a timing before the vertical synchronization period and after the vertical synchronization period and before the video signal arrives, the noise level The strength of the electric field can be detected. By the way, the weaker the electric field is, the higher the noise level and the mixing frequency are. Therefore, it can be understood that the larger the number counted by the counters 16 and 17 in the zone 2 and the zone 3 in the no-signal period, the weaker the electric field.

The embodiment described here is a case where the system shown in FIG. 1 is diverted. As a modification, an example in which a counter dedicated to weak electric field noise is provided will be described with reference to FIG. In addition to the system shown in FIG. 1, a level discriminating circuit 20 and a noise counter 21 are added to output the noise counter output to the CPU.
I am trying to supply to 18. The level discriminating circuit 20 detects whether or not there is a luminance signal in the noise counter detection zone as shown in FIG. 2A in the no signal period after the vertical synchronizing signal. In this zone, a voltage above a certain voltage offset from the pedestal level is detected. In this way, the counters in zones 1 to 3 are dedicated to the level detection of the video display signal and can be separated from the noise detection. When the zone 3 is also used, the noise detection level is one-third of white, so it cannot be detected when noise with a small level comes in, but in the case of FIG. 3 in which a noise detection counter is separately provided, the detection level is Since it can be set low, there is an advantage that the low level noise can be detected.

The CPU 18 can refer to both the video signal level detection and the count value from the noise counter 21 to perform arithmetic processing on the control state of the high image quality setting to bring it to the optimum state. Nothing is inserted in the equalization pulse period after the vertical sync signal, but in many broadcast stations, a signal such as a character multiplex broadcast signal or a GCR (ghost cancellation reference) signal is inserted. It is realistic to detect the weak electric field noise only in the rear equalization pulse period. Next, an example of the blackout and whiteout detection circuits 7 and 8 shown in FIG. 1 will be described.

FIG. 4A shows a concrete example of the blackout condition detection circuit 7. When a blackout occurs, it tends to be designed so as to avoid the blackout in any part of one field. Therefore, a circuit for detecting the blackout portion in one field will be described. Transistors Q1 to Q5
The circuit constituted by is a level discrimination circuit. The input luminance signal Yin is supplied to the transistor Q1 via the input terminal 31.
Supplied to the base of. The emitter of the transistor Q1 is commonly connected to the emitter of the transistor Q2, and the current source I
1 to the power supply line Vcc. At the base of the transistor Q2, the voltage VBTH at which a blackout occurs is generated.
Is set. That is, when the base potential of the transistor Q1 becomes VBTH or less, the transistor Q2 turns off.
The emitters of the transistors Q1 and Q2 are the transistor Q
Connected to the collectors of Q3 and Q4, and transistors Q3 and Q
The emitter of 4 is connected to the ground line GND, and the bases thereof are connected together to be connected to the collector of the transistor Q3. When blackout is detected, transistor Q
2 is turned off, and its collector output is given to the base of the transistor Q5. Transistor Q5
Has its emitter connected to the ground line and its collector connected to a resistor R
It is connected to the power supply line via 1 and is also connected to the set input terminal of the RS flip-flop circuit FF1.

Now, it is assumed that VBTH is a voltage that is generated and set for detecting black crushing. This voltage cannot be said uniformly because the setup level of the luminance signal differs depending on the broadcasting station, but here it is the pedestal level. When the luminance signal causes blackout, the voltage of Yin falls below VBTH. Then, no current flows into the base of the transistor Q5, and the transistor Q5 is cut off. At this time, the collector potential of the transistor Q5, that is, the signal P4 becomes Vcc. The set (S) signal is input to the flip-flop circuit FF1 at the next stage, and the Q output, that is, the signal BCP is at the high level (H
i). A clock pulse BCK of a field cycle whose state changes in the field blanking period is input to the reset input (R) which is the other input of the flip-flop circuit FF1.

As shown in FIG. 4B, when a blackout condition occurs somewhere in the field and a signal P4 is generated, the signal BCK immediately becomes Hi and the next clock pulse BC is generated.
The result is held until the K pulse arrives. In this way, the occurrence of blackout can be latched until the end of one field, and the CPU 18 can easily take in the data. FIG. 5A shows one specific example of the whiteout condition detection circuit. Transistors Q6 to Q10
The circuit constituted by is the analog white crush detection circuit 8.

The input luminance signal Yin is supplied to the base of the transistor Q6 via the input terminal 41. The emitter of the transistor Q6 is commonly connected to the emitter of the transistor Q7, and is connected to the power supply line Vcc via the current source I2. The voltage VWTH at which black crushing occurs is set at the base of the transistor Q6. That is, when the base potential of the transistor Q6 becomes VWTH or less, the transistor Q6 is turned on and the transistor Q7 is turned off. The emitters of the transistors Q6 and Q7 are the transistors Q8 and Q.
9, the emitters of the transistors Q8 and Q9 are connected to the ground line GND, and the bases thereof are commonly connected to the collector of the transistor Q9. When whiteout is detected, the transistor Q6 is turned on and its collector output is given to the base of the transistor Q10. The emitter of the transistor Q10 is connected to the ground line, and the collector is the resistor R2.
Is connected to the power supply line via
It is connected to the. The output of the inverter G1 is supplied to the data input terminal of the D type flip-flop circuit FF2 via the inverter G2. The Q output of the flip-flop circuit FF2 is supplied to the data input terminal of the flip-flop circuit FF3. Further, each flip-flop circuit FF2,
The FF3 is configured to be reset by the output of the inverter G1, and the signal WCK described later is used as a clock input. Also, the final output signal WC
P is derived by logically operating the signal WCK, the output of the inverter G2, and the Q output of the flip-flop circuit FF3 by the AND circuit G3. Next, the operation will be described with reference to the waveform chart of each part in FIG.

The above-mentioned VWTH is a reference voltage for detecting the underexposure of the video signal and is normally set to 100% white. When the voltage of the input luminance signal Yin exceeds this VWTH, the base current of the transistor Q10 does not flow and is cut off. On the contrary, when the voltage of the luminance signal Yin is lower than VWTH, the base current flows into the transistor Q10 and turns on. Unlike white crushing, white crushing has a strong tendency not to immediately avoid white crushing to some extent, so this circuit is able to detect how much white crushing has occurred. Now, the detected transistor Q10 collector signal P1 is inverted by the inverters G1 and G2,
Two D-type flip-flop circuits FF2 and FF3 are supplied to the shift circuits connected in cascade. The signal WCK is input as a clock to the flip-flop circuits FF2 and FF3.

The signal WCK is a pulse as shown in (b) of FIG. 5 (B). Now, suppose that the detection signal P1 as shown in FIG. The flip-flop circuit FF2 is
When the signal P1 is at the high level, the signal WCK is sampled, but when the signal P1 is at the low level, resetting is performed, so that a waveform like P2 in FIG. This P2
Is again input to the flip-flop circuit FF3 and processed in the same manner as the flip-flop circuit FF2. The output P3 of the flip-flop circuit FF3 is as shown in (d) of FIG. Here, the signals P3 and G2 output (that is, P
1) and the signal WCK are input to the AND circuit G3 to obtain a logical product, the output WCP becomes as shown in (e) of FIG.

When the pulse width is shorter than one clock of WCK, as shown in the period A of (a) of FIG. 5B, nothing is output to the output part of the AND circuit G3, and the period B appears. When there is a time width of 1 clock or more, one pulse is generated. Further, when whiteout occurs for a long time as in the period C, continuous pulses are generated. In this way, it is possible to detect how long the whiteout occurs and how continuously the whiteout occurs. For example, the signal WCP may be counted and detected by the count value of one field or one line. By detecting consecutive WCPs, it is possible to know in what range whiteout occurs in one line. Flip-flop circuit FF1 of the blackout condition detection circuit 7
The method as described in step 1 may be used for the white crush detection circuit 8 and vice versa. In this way, if white crushing and black crushing are detected, the control method in the CPU 18 can also be fed back. FIG. 6 shows C as described above.
The control characteristics from the PU 18 are collectively shown.

First, zones 1 to 3 are used as start cases.
If the count values are almost evenly distributed in
The input / output characteristics are linear as shown in (a). CPU18
6 monitors the output from the black crush detection circuit 7 and operates the black expansion circuit 2 to control the maximum black expansion gain as shown in FIG. 6B unless black crush occurs. When a black shadow occurs in the process of shifting to the maximum black expansion gain, the black expansion gain is controlled so as to decrease and fixed to a gain that does not cause the black expansion. At the same time, the ACL 5 causes the limiting operation to be performed when whiteout occurs. However, as described above, unlike black crushing, there has been a tendency in recent years to set the ACL 5 not to operate even if a white crush occurs to some extent. Therefore, the operation of the ACL 5 is controlled by a function based on the white crush detection result.

An example thereof is shown in FIG. 6 (d). Signal WCP
The white peak starts to be attenuated by ACL5 from the point where the count value exceeds a certain value, and it is not compressed so that the white does not exceed the white crush voltage, but the attenuation amount according to the count value is set. To do. The CPU 18 operates the ACL 5 according to this function, and for example, as shown in FIG.
The input / output characteristics are as shown in (c). If black underexposure occurs even though black expansion is not performed, the characteristics shown in FIG. 6 shift from the dotted line characteristics of (a) to (c),
Black stretch and ACL are not dependent and are processed in parallel.

In addition to this, the control characteristic of the CPU 18 may have the above-mentioned white expansion characteristic, and the method of reflecting the zone count result may be as described above. However, CPU1 is set by setting each circuit and looking at the counting result of the next field.
If 8 changes the setting state, it is better to perform it during the field blanking period. The speed of shifting to the changed setting state can be set in a time unit of microseconds (mS) to seconds (S) as conventionally set by an external time constant. When the weak electric field noise is detected, at least the white expansion is stopped, and the noise is less noticeable when the ACL 5 is slightly operated. In this case, the black expansion is in the direction to stop, but it can be easily stopped if necessary.

FIG. 7 shows a specific example of the level discrimination circuit of FIG. The amplifiers A1 to A4 for comparison are prepared,
The non-inverting input terminals of the comparison amplifiers A1 to A4 are
The input luminance signal Yin is supplied from the input terminal 51. In addition, different voltages VTH1 and VTH are applied to the respective inverting input terminals.
Apply TH2, VTH3, and VTH4. Vcp is a clamp voltage, and it is assumed that the pedestal voltage of the Yin luminance signal is clamped to this voltage. Vcp to amplifier A3,
The potential obtained by adding VTH2 to Vcp is applied to the amplifier A2 and further to VTH.
The potential added with 1 is input to the amplifier A1, and Vcp to VTH3
The potential increased by just that is applied to the amplifier A4. In the amplifier A1, when the Yin voltage becomes higher than the voltage of VTH1 + VTH2 + Vcp, the output becomes high level (Hi). Here, zone 1 is detected.

In the amplifier A2, the output becomes high level (Hi) when Yin exceeds Vcp + VTH2. However, when the output of the amplifier A2 and the output obtained by inverting the output of the amplifier A1 by the inverter G4 are input to the AND circuit G5, and in the zone 1 of the amplifier A1, the detection output is not output from the AND circuit G5. ing. A high level (Hi) is output to the AND circuit G5 only when Yin is in the zone 2. The output of the AND circuit G5 is used as the detection output of zone 2.

Similarly, in the amplifier A3, the output of the inverter G6 (inverting the output of the amplifier A2) and the output of the amplifier A3 are input to the AND circuit G7 to eliminate the levels in zone 2 and above. That is, the AND circuit G7 outputs a high level (Hi) only when the Yin voltage is present in the zone 3. The output of the AND circuit G7 is used as the detection output of zone 3. The detection results of each zone, the clock signal CK, and the blanking pulse BLK1 are input to the AND circuits G8 to G10. Clock signal CK
Corresponds to the signal in (c) of FIG. 2A, and BLK1 is shown in FIG.
This corresponds to (b) of (A), that is, a signal obtained by combining the horizontal blanking signal and, if necessary, the vertical blanking signal of FIG. 3 (B). The outputs of the AND circuits G8 to G10 are set as Z1P, Z2P, and Z3P signals, respectively, and are input to each zone counter in FIG. The amplifier A4 corresponds to the level discrimination circuit 20 of FIG. When Yin exceeds the voltage of Vcp + VTH3, a high level appears in the output of the amplifier A4. This signal is the noise detection output, and the AND circuit G11 outputs the clock signal CK and the blanking signal B.
The ZNP signal is obtained by taking the logical product with LK2. The blanking signal BLK2 is a vertical blanking pulse as described above. Since BLK1 detects the level of the video signal, the timing is set so as to blank a period wider than the vertical blanking period, and BLK2 malfunctions with respect to various signals superimposed by the broadcasting station within the vertical blanking period. In order not to do so, the period is as short as the rear equalization pulse period. Other examples

Although the above description has been given of the case where the control is performed only for the luminance signal, the case where the control is performed for the color signal will be described. In the case of a color signal, the important factors are the hue and the saturation, and here, the detection of the hue and the saturation of the I axis, that is, the skin color will be described with reference to FIG.

FIG. 8 shows vectors of hue and color saturation, and the color saturation is constant on the unit circle. I axis is 12
It is 3 degrees and the Q axis is 33 degrees. It is assumed that the circuit (not shown) that demodulates the chroma signal into the color difference signal is the I and Q axis demodulation circuit. The demodulation output of the I-axis demodulation circuit becomes maximum when the hue is on the I-axis if the color saturation is constant. Similarly, in the Q-axis demodulation circuit, the maximum is obtained when the hue is the Q-axis. Now, divide the I-axis demodulation output into three, and divide into three zones shown in FIG.
I zone 1 is defined as the maximum level obtained by demodulating a color saturation signal having a burst chroma ratio of 1: 0.5 to the maximum level obtained by demodulating a signal having a color saturation of 1: 1. Similarly, 1: 1 to 1: 1.5 is I zone 2, and 1: 1.5 or more is the I zone 3. The output of the Q-axis demodulation circuit is divided into six zones as shown in FIG. 8, and the range with the smallest demodulation output is designated as Q zone 1. The outside thereof is referred to as Q zone 2 (consisting of 2 blocks), and the outside of Q zone 2 is referred to as Q zone 3. The positive and negative Q-axis maximum outputs obtained by demodulating the color saturation signal having the burst chroma ratio of 1: 0.75 are set as the maximum values of the Q zone 3,
Divide this range into 6 and distribute to each Q zone as described above.

By doing this, it becomes possible to detect whether or not the hue of the demodulated chroma signal exists in a certain range near the I axis. The output level of the I and Q demodulation circuits is I
If it is in zone 1 and Q zone 1, additionally I zone 2
And in Q zones 1 and 2, and I zone 3
The number of occurrences in the field is counted by detecting the case in Q zones 1 to 3. The detection of this combination can be easily realized by modifying the circuit of FIG. 7 for I-axis and Q-axis and synthesizing with an AND circuit. The counting result is CP
If it is captured in U18, it is possible to detect how many components near the I axis are in the field and control various circuits.

Although there are various objects to be controlled, the control of the chroma demodulation band and the feedback to the luminance signal processing can be raised. When there are many I-axis components, the I- and Q-axis demodulation circuits may be controlled so as to widen the chroma demodulation band. Also,
When there are many I-axis components, if the DC level of the luminance signal is corrected or the contrast or ACL is used to increase the DC level of the luminance signal or increase the contrast, the problem of darkening of the skin color can be solved.

Also, good results can be obtained when used for demodulation axis (skin color) correction called a fresh tone. Since the conventional circuit makes a binary decision as to whether or not the signal is in the vicinity of the I axis, the hue correction range is deviated depending on whether the color saturation is low or high. However, the skin color neighborhood component detected by the combination as described above in FIG. 8 is in the shaded area in FIG. 8, and the range changes according to the level, so that the hue range is constant at any color saturation.
In the example of FIG. 8, the I axis ± 27 degrees is detected. Therefore, the effect of the correction can be stabilized regardless of the color saturation, and weighting can be intentionally added.

Even if the demodulation circuit does not use the I and Q axes, 2
As long as axis demodulation is possible, the detection of the I axis is possible by vector composition. Similarly, it is also possible to detect other hues and operate the luminance and color difference signals only for a specific color.

The luminance signal is further shown in FIGS.
An explanation will be given using (B). In recent years, the image quality of liquid crystal TVs has improved, and some ICs developed exclusively for liquid crystal have come out. The liquid crystal TV has a narrow display dynamic range of the liquid crystal panel, and there is no blooming phenomenon that occurs in the Braun (B) tube TV. Therefore, when the gradation of white or black exceeds the dynamic range, it is completely crushed and is not displayed at all. When displaying on such a display, the ACL function alone cannot fully utilize the signal near the intermediate luminance. In such cases,
A circuit for expanding a signal near the intermediate luminance as shown in FIG. 9A is required. This circuit is an example of a circuit with decompression characteristics. The amplifier consisting of the transistors Q11, Q12 and the resistor R6 is the main amplifier, and the transistor Q1
The amplifier composed of 3, Q14 and the resistor R7 is an intermediate luminance amplifier.

The input luminance signal Yin is supplied to the input terminal 61. The brightness signal Yin is supplied to the transistors Q11 and Q.
Supplied to 13 bases. Transistors Q11, Q1
The two emitters are connected via a resistor R6 and are also connected to the ground line via current sources I3 and I4, respectively. The collector of the transistor Q11 is connected to the power supply line, and the emitter of the transistor Q12 is supplied with the bias voltage V1. The collector of the transistor Q12 is connected to the output terminal 62, and is also connected to the power supply line via the resistor R8 together with the collector of the transistor Q14. Transistors Q13 and Q14
Of the transistor Q14 is connected via a resistor R7, and the emitter of the transistor Q14 is further connected to a ground line via a current source I5. The collector of the transistor Q13 is connected to the power supply line, and the bias voltage V2 is applied to the base of the transistor Q14.

When the bias voltage V1 or more, the input luminance signal Yin
When rises, Yin is amplified by the main amplifier and appears at R8. Until Yin reaches V2, the transistor Q13 is cut off and the transistor Q14
A constant current I5 flows through. When Yin rises above V2, the transistor Q13 becomes conductive and the resistor R8 supplies the amplified signal from the main amplifier and the transistors Q13 and Q14.
The sum signal of the amplified signals from the amplifier is output. The input dynamic range of the intermediate luminance amplifier of the transistors Q13 and Q14 is determined by I5 × R7. When the input level exceeds this range, the transistor Q14 is cut off and only the signal from the main amplifier appears at R8. Therefore, the gain increases only while the intermediate brightness amplifier is active, and the input / output characteristics are as shown by the broken line in FIG.

Since the intermediate luminance signal is an important factor that determines the quality of the image, it is necessary to pay attention to the control. Zone 1
It is preferable to use it only when there is not a lot of signals and the signals are concentrated in the zone 2 or 3 and the white peak can be detected even if the intermediate luminance is extended by the white peak detecting means as shown in FIG.

[0048]

As described above, according to the present invention, it is possible to detect the level of the input video signal,
The central control circuit sets the high image quality circuit such as white expansion in an optimal state, and it is possible to obtain a high quality image in response to the difference in the display and the strength of the electric field.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

2 is a waveform diagram used to explain the operation of the discrimination circuit of FIG. 1 and a characteristic diagram used to explain the operation of the individual circuit of FIG.

3 is a block diagram showing a modified example of the discrimination circuit of FIG. 1 and a waveform diagram for explaining the operation thereof.

FIG. 4 is a circuit diagram showing a specific example of a blackout condition detection circuit and a waveform diagram for explaining the operation thereof.

FIG. 5 is a circuit diagram showing a specific example of a whiteout condition detection circuit and a waveform diagram for explaining the operation thereof.

6 is a characteristic diagram used to describe an example of the operation and ACL control characteristic of the CPU of FIGS. 1 and 3. FIG.

FIG. 7 is a circuit diagram showing a specific example of a level determination circuit.

FIG. 8 is a hue characteristic diagram for explaining the level determination principle of another embodiment of the present invention.

FIG. 9 is a circuit diagram showing a luminance expansion circuit in still another embodiment of the present invention and a characteristic diagram thereof.

FIG. 10 is a block diagram shown for explaining a conventional luminance signal processing circuit, a correction characteristic diagram and a signal waveform diagram in the circuit.

[Explanation of symbols]

1 ... Clamp circuit, 2 ... Black expansion circuit, 3 ... DC transmission amount correction circuit, 4 ... Contrast circuit, 5 ... ALC, 6 ... Bright circuit, 7 ... Black crush detection circuit, 8 ... White crush detection circuit, 9, 10 , 11 ... DC control circuit, 12 ... Latch circuit, 13 ... Counter, 14 ... Level determination circuit, 15-1
7 ... Zone counter, 18 ... Control circuit, 19 ... RAM.

Claims (9)

[Claims] 1. A level distribution detecting means for detecting whether the level of an input video signal is within a preset specific level range and generating a pulse output according to the detected signal component, and this level distribution. Capture the result of the detection output of the detection means,
A video signal processing device, comprising: a control unit for controlling an operating point of a linear and / or non-linear luminance and color signal processing unit of the input video signal. 2. The level distribution detection means detects the level of a luminance signal, and the control means comprises a black expansion circuit, an automatic amplitude limiting means (ACL), which constitutes a path of the luminance signal.
The video signal processing device according to claim 1, wherein the operating point of the DC transmission amount correction circuit is controlled. 3. The level distribution detection means detects the hue and color saturation of the color difference signal, and the control means controls the black expansion circuit, the automatic amplitude limiter, and the DC transmission amount forming the path of the luminance signal. 3. The video signal processing device according to claim 1, wherein the operating point of the correction circuit and the color demodulation band control circuit is controlled. 4. The level distribution detection means includes a noise detection circuit that detects whether the level of the luminance signal is at a noise level and generates a pulse output according to the detected signal component, and the control means includes: The video signal processing device according to claim 1, wherein the operating point is controlled by also using a detection result from the noise detection circuit. 5. The level distribution detecting means is in a non-operating state by using a pulse that is longer than a vertical blanking period by a certain period, and becomes a non-operating state by using a certain pulse within the vertical blanking period. The video signal processing device according to claim 4, wherein the video signal processing device is configured to be in an operating state. 6. A black crushing detection circuit for detecting whether a black crushing phenomenon occurs in an output signal of the black expansion circuit, and a holding circuit for latching the detection output for one field period. 3. The video signal processing apparatus according to claim 2, wherein the output is input to the control means and used together with the signal from the signal level distribution detection means to control the operating point of the black expansion circuit. 7. A white crush detecting circuit for detecting whether a white crush phenomenon occurs in an output signal of an automatic amplitude limiter, and a conversion circuit for converting the detection output into a pulse, the converted signal being the control means. 3. The video signal processing apparatus according to claim 2, wherein the video signal processing apparatus controls the operating point of the automatic amplitude limiter in combination with the signal from the signal level distribution detecting apparatus. 8. An operating point of the luminance signal processing circuit further comprising means for detecting a component near the I axis of the color difference demodulated signal and a conversion circuit for converting the I axis detection result into a pulse. The video signal processing device according to claim 3, wherein the video signal processing device performs control. 9. An intermediate luminance expansion circuit is further provided, and an operating point of the intermediate luminance expansion circuit is controlled by a result of whiteout detection of the output of the automatic amplitude limiter and a signal from the signal level distribution detection device. The video signal processing apparatus according to claim 2, wherein the video signal processing apparatus is a video signal processing apparatus.