JPH0510993A - Phase difference measurement device - Google Patents

Abstract

PURPOSE:To obtain a phase difference measurement device which has no restric tion of measuring range and takes one period of measured signal for the response speed. CONSTITUTION:Measured signals A1 and A2 are converted with wave rectifiers 1 and 2 to square waves V1 and V2 and a pulse V3 corresponding to the phase difference is formed by taking an exclusive logical sum. V3 is counted with standard clock pulse (counter 6) and obtains a digital value for the phase difference. A lead/lag decision unit 9 expresses the lead/lag of the phase with a mark and a signal processor 7 outputs the count value and the mark of the lead/lag of the phase as the phase difference measurement value.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a phase difference measuring device.

[0002]

2. Description of the Related Art The structure of a conventional phase difference measuring apparatus is shown in FIG. 3, and its measuring principle will be described with reference to FIGS. Waveform shaper 1 with two inputs A1 and A2 having different phase differences
At 0 and 11, it is converted into rectangular waves V1 and V2, and the exclusive OR circuit 13 detects the phase shift portion V3. Delay circuit 1
At 2, the delay waveform V4 of V1 is generated. Also V1, V2
Is input, and when V2 is ahead of V1, H (the level is high, the same below) is output, and when it is delayed, L (the level is low, the same below) is output. Set up. Exclusive OR circuit 13, delay circuit 1
2. When A2 is ahead of A1 by the logic circuits 15 to 20 which receive the output of the lead / lag determination circuit 14, an output pulse of the phase difference is output to V5 and L is output to V6. Conversely, when A1 is ahead of A2, an output pulse of the phase difference is output to V6 and L is output to V5. V5, V
6 are integrated by the integrating circuits 21 and 22, respectively, converted into digital signals by the A / D converter 23, and the phase difference is calculated by the signal processing unit 24.

Incidentally, FIG. 4 shows respective waveforms of the input voltage and the output voltage of each part in FIG.

[0004]

In the conventional phase difference measuring device, since the delay circuit is provided for generating the pulse signal of the phase difference, the measured value has an upper limit. Furthermore, since an analog circuit called an integration circuit was used, the response was slow,
Adjustment was also necessary.

An object of the present invention is to provide a phase difference measuring device which eliminates the limitation of the measuring range, sets the response speed to one period of the signal under measurement, and realizes no adjustment of the circuit.

[0006]

In order to achieve the above object, the phase difference measuring apparatus of the present invention comprises first and second waveform shaping for converting first and second AC inputs into rectangular waves V1 and V2. And an exclusive OR circuit that receives V1 and V2 as inputs, a first AND circuit that outputs the output of this exclusive OR circuit and V1 as a phase difference V3 between V1 and V2, and a reference A clock pulse generator, a second AND circuit that inputs the reference clock pulse and V3 and outputs the reference clock pulse included in the period of the phase difference V3, a counter that counts the output reference clock pulse, Means for resetting the counter every cycle,
A lead / lag discriminator which receives V1 and V2 as inputs and outputs a lead / lag relation between the two with a sign, and measures the count value of the counter and the output of the lead / lag discriminator between the first and second AC inputs. It is output as a value.

[0007]

According to the present invention, with the above-described structure, the measurement range of the phase difference can be measured over the entire range from -180 ° to + 180 °, the response speed is set to one period of the signal under measurement, and no adjustment is required by digitizing the circuit. Was realized.

[0008]

Embodiments of the present invention will be described below in detail with reference to FIGS. 1 and 2. Two signals under test, first and second
AC inputs A1 and A2 are input to the first and second waveform shapers 1 and 2, respectively. The waveform shapers 1 and 2 output H when the input signal is positive and output L when the input signal is negative, and the signals under test A1 and A2 are converted into rectangular waves V1 and V2, respectively.
Such waveform shapers 1 and 2 are composed of comparators having a reference voltage of 0V, for example. Exclusive OR circuit 3
Then, the first AND circuit 4 generates a phase difference pulse V3 corresponding to the phase difference between A1 and A2 from V1 and V2. The reference clock pulse CK from the reference clock pulse generator 8 and the phase difference pulse V3 are input to the second AND circuit 5, the output V4 thereof is input to the counter 6, and the phase difference V3 is included in V3. Is converted to a counted digital value. The count of the clock pulse by the counter 6 is V1
Since the signal processing unit 7 ends at the trailing edge of V1, the signal processing unit 7 fetches the count value of the counter 6 after the trailing edge of V1, calculates a phase difference by multiplying it by a certain proportional constant, and outputs it as a phase measurement value. After that, the counter 6 is reset before the next counting is started. As an example of the configuration of the signal processing unit 7, the hardware may be configured by a microcomputer and the above processing may be performed by software.

Regarding the phase lead / lag, the signal processing unit 7 judges by the output signal of the lead / lag discriminator 9 which outputs H when V2 is ahead of V1 and outputs L when V2 is ahead of V1. Is added and output. Here, V1 is CK input, V2 is D input, and V2 is H when V1 rises.
If it is H, and if it is L, an example of a D flip-flop that outputs L will be shown. If the measured value is not stable due to fluctuations in the phase difference of the signal under measurement, noise in the signal under measurement, etc., the average value of the phase difference for each time may be obtained and used as the phase measurement value. 2 is a waveform diagram of the input voltage and the output voltage of each part in FIG.

[0010]

As is apparent from the above description, according to the present invention, full range measurement from -180 ° to + 180 ° is possible, and the response speed is adjusted by one cycle of the signal under measurement and by digitizing the circuit. An unnecessary phase difference measuring device can be realized.

[Brief description of drawings]

FIG. 1 is a block circuit diagram of a phase difference measuring device according to an embodiment of the present invention.

FIG. 2 is a voltage waveform diagram of each part in the same phase difference measuring device.

FIG. 3 is a block circuit diagram of a conventional phase difference measuring device.

FIG. 4 is a voltage waveform diagram of each part in the same phase difference measuring device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 1st waveform shaper 2 2nd waveform shaper 3 Exclusive-OR circuit 4 1st AND circuit 5 2nd AND circuit 6 Counter 7 Signal processing part (means for resetting counter) 8 Reference clock Pulse generator 9 Lead / lag discriminator A1 First AC input A2 Second AC input

Claims (1)

Claims: What is claimed is: 1. First and second waveform shapers for converting first and second alternating current inputs into rectangular waves V1 and V2, and exclusive logic having these V1 and V2 as inputs. An OR circuit, a first AND circuit that outputs the phase difference V3 between V1 and V2 by using the output of this exclusive OR circuit and V1 as an input, a reference clock pulse generator, and a reference clock pulse and V3 as inputs. A second AND circuit that outputs the reference clock pulse included in the period of the phase difference V3, a counter that counts the output reference clock pulse, a means that resets this counter every one cycle, and V1 and V2. And a lead / lag discriminator which outputs the relationship between the leading and trailing sides of the two with a sign, and outputs the count value of the counter and the output of the leading / lag discriminator to the phase difference meter of the first and second AC inputs. Phase difference measuring device that outputs as measured value.