JPH0496587A - Video signal processing circuit - Google Patents

Abstract

PURPOSE:To reproduce an excellent video luminance signal by extracting each high frequency component before and after the de-emphasis processing, inverting a differential output and superimposing the result onto a video luminance signal of the output of the de-emphasis processing. CONSTITUTION:A video luminance signal is inputted to a recording system signal processing section, in which emphasis processing is implemented, the result is frequency-modulated and recorded on a magnetic tape. On the other hand, the signal is frequency-demodulated by a limiter circuit 1 and an FM demodulation circuit 2 at reproduction and the result is outputted to a output point of a nonlinear de-emphasis circuit 5. After the DC component is eliminated thereat, a limiter circuit 7 applies amplitude limit. Moreover, an output of the circuit 5 is inputted to a high pass filter 8, in which the DC component is eliminated. Outputs of the limiter circuit 7 and the filter 8 are given to a substractor 9, from which a differential output is obtained, and the level is inverted by an inverter 10 and added to the output of the circuit 5 by an adder 11. Thus, the output of the circuit 5 is corrected and an excellent video luminance signal is decoded.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a video signal processing circuit in, for example, a home video magnetic recording and reproducing device (hereinafter referred to as a home VTR).
In particular, the present invention relates to improving reproducibility during reproduction of luminance signals that have been subjected to emphasis processing during recording.

[Conventional technology]

Conventionally, video signal processing of a home VTR has been performed using a configuration as shown in FIG. 4, for example. In the figure, at the time of recording, the recording system processing circuit 31 performs predetermined processing on the video signal to be recorded, and then the R side is selected by the selector 33 and written onto the magnetic tape 35 via the magnetic head 34. On the other hand, during reproduction, a signal read from the magnetic tape 35 by the magnetic head 34 is input to the reproduction system processing circuit 32 by selecting the P side with the selector 33. The signal input to the reproduction system processing circuit 32 is restored to a video signal through predetermined processing and output as a reproduced video signal.

In the recording system processing circuit 31, for example, AGC processing, emphasis processing, white/dark clipping processing, FM modulation processing, etc. are performed as processing of the video luminance signal, and in the reproduction system processing circuit 32, FM demodulation processing, de-emphasis processing, etc. processing, noise removal processing, luminance signal/color signal synthesis processing, etc. This emphasis processing during recording has a property that the noise superimposed on the FM signal in the subsequent processing process is frequency dependent, that is, the noise component increases as the frequency increases, so the signal-to-noise ratio during playback increases. This is done for the purpose of improving the S/N ratio. Specifically, the high-frequency components of the video luminance signal to be recorded are emphasized before FM modulation. On the other hand, after FM demodulation during playback, high frequency components are suppressed by de-emphasis processing which has the opposite characteristics to this emphasis processing circuit.
By restoring the original video luminance signal, noise components in the high frequency region are suppressed.

FIG. 5 shows a block diagram of a configuration example of a conventional reproduction system processing circuit 32. In the figure, an FM signal recorded on a magnetic tape is read out, and a reproduced FM signal amplified by a predetermined amount is input to an FM demodulation circuit 2 via a limiter circuit 1 and restored to a video signal. The output video signal from this FM demodulation circuit 2 is inputted to a main de-emphasis circuit 4 and a non-linear de-emphasis circuit 5 after removing the FM carrier signal component by a low-pass filter 3. A video signal in which high-frequency components are emphasized is subjected to high-frequency component suppression processing so as to have a characteristic opposite to that of the emphasis processing, and is output to the reproduction signal processing circuit 13 at the subsequent stage.

FIG. 6 shows operational waveform diagrams of the conventional emphasis processing during recording and the de-emphasis processing of the reproduction system processing circuit shown in FIG. FIG. 6(a) shows a video luminance signal during recording, and FIG. 6(b) shows a video luminance signal subjected to emphasis processing before FM modulation processing during recording. During recording, FM modulation processing is further performed, and the FM signal recorded on the magnetic tape is demodulated by a limiter circuit 1, an FM demodulation circuit 2, and a low-pass filter 3, and the emphasis processing shown in FIG. 6(b) is applied. A video brightness signal is obtained, and the original video brightness signal is restored by a main de-emphasis circuit 4 and a non-linear de-emphasis circuit 5.

[Problem to be solved by the invention]

In the conventional example described above, the main de-emphasis circuit 4 and the non-linear de-emphasis circuit 5 that perform de-emphasis processing are provided with characteristics opposite to the emphasis processing characteristics during recording, thereby achieving the recording shown in FIG. 6(a). The objective is to reproduce the same signal as the recorded video luminance signal for the video luminance signal, but for example, the influence of nonlinear circuits such as white/dark clip processing after emphasis processing during recording and low pass Filter 3
In reality, the video luminance signal as shown in FIG. 6(c) is restored due to the phase delay, etc., and the reproducibility of high-frequency components such as edge components is impaired.

The purpose of the present invention is to eliminate such drawbacks by extracting high-frequency components before and after de-emphasis processing, inverting their difference output, and superimposing it on the de-emphasis processing output video luminance signal. An object of the present invention is to provide a video signal processing circuit capable of reproducing a good video luminance signal by performing a correction process on a de-emphasis processing output that has been affected by a phase delay caused by a nonlinear circuit or a low-pass filter.

[Means to solve the problem]

The configuration of the video signal processing circuit of the present invention includes FM demodulation means that demodulates a video signal that has been FM modulated after being subjected to emphasis processing in advance, and a low-pass that removes an FM carrier wave component from the output signal from the FM demodulation means. a filter, a de-emphasis processing means for performing de-emphasis processing on the output of the low-pass filter, a first high-pass filter for removing DC components from the output of the low-pass filter, and a de-emphasis processing means for de-emphasis processing the output of the low-pass filter; a limiter circuit that limits the amplitude; a second high-pass filter that removes DC components from the output of the de-emphasis processing means; the output of the second high-pass filter is used as the subtraction input, and the output of the limiter circuit is used as the input to be subtracted; and an adder which uses the output of the de-emphasis processing means as one addition input, connects the output of the subtracter to the other addition input via an inverter, and outputs the addition output as a video signal. It is characterized by being prepared.

In the present invention, 1. The second high-pass filter may consist of a capacitor, and the subtracter and adder may each consist of a differential amplifier.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram of a video luminance signal reproduction system circuit according to an embodiment of the present invention, and parts having the same functions as the conventional example shown in FIG. 5 are given the same numbers. In this embodiment, the output of the low-pass filter 3 is connected to the main de-emphasis circuit 4 and also to the input of the high-pass filter 6. Connected to input. Further, the output of the nonlinear de-emphasis circuit 5 is connected to the input of a high-pass filter 8 and one input of an adder 11, the output of this high-pass filter 8 is connected to the subtraction input of a subtracter 9, and the output of the subtracter 9 is is added to the adder 11 via the inverter 10
The output of the adder 11 is connected to the reproduction signal processing circuit 13.

FIGS. 2(a) to 2(g) show waveform diagrams of the circuit operation of FIG. 1. The video luminance signal as shown in Figure 2(a) is input to the recording system signal processing during recording, and after being subjected to emphasis processing as shown in Figure 2(b), it is FM modulated and recorded on the magnetic tape. recorded. On the other hand, during playback, the Miritsuta circuit 1. F
M demodulation circuit 2. After being FM demodulated by the low-pass filter 3, the main de-emphasis circuit 4. The non-linear de-emphasis circuit 5 outputs the output shown in FIG. 2(C) to the output point of the non-linear de-emphasis circuit 5. Here, the video luminance signal which has been FM demodulated and has not been subjected to de-emphasis processing is inputted from the output of the low-pass filter 3 to the high-pass filter 6, and after removing the DC component, the limiter circuit 7 sets the predetermined VL1 Amplitude limitation is performed at the L2 level (Fig. 2 (d)
)). Additionally, the output of the nonlinear de-emphasis circuit 5 is input to a high-pass filter 8 to remove the DC component (
Figure 2(e)). After the outputs of the limiter circuit 7 and the high-pass filter 8 are obtained by a subtracter 9 to obtain a differential output as shown in FIG. and adder 11
As shown in Fig. 2 (g), the output of the non-linear de-emphasis circuit 1i'85 (Fig. 6 (C)), which had impaired waveform reproducibility in the conventional example, is corrected. , it is possible to restore a good video luminance signal.

FIG. 3 is a circuit diagram in which the main parts of the embodiment of FIG. 1 are constructed by concrete transistor circuits using semiconductor integrated circuits. In the figure, a high-pass filter 6.8 is constituted by capacitors C, , C2, and a limiter circuit 7, a subtracter 99 and a synthesis circuit 10 each having a differential amplification configuration are constituted.

The limiter circuit 7 includes transistors Ql, Q2, and a resistor R1.
~R5, constant current source ■1, differential amplifier of bias circuit B1, and transistor Q3. Q4 and bias circuit B 2 +
A limiter section consisting of B3 and an emitter follower Q5
The subtracter 9 is composed of transistors Q6. It consists of a differential amplifier Q7 and an emitter follower Q8,
The synthesis circuit 12 includes a differential amplifier (corresponding to the adder 11) of the transistor Q9 and the transistor Qto of the inverter 10, and emitter followers Q1. It consists of

As shown in this embodiment, this circuit can be constructed by a semiconductor integrated circuit 30, and can be realized on the same semiconductor integrated circuit as the main de-emphasis circuit, non-linear de-emphasis circuit, etc., so it is more effective in integrating the circuit. .

〔Effect of the invention〕

As explained above, the present invention extracts high-frequency components before and after de-emphasis processing, inverts the difference output thereof, and superimposes it on the de-emphasis processing output video luminance signal. It applies correction processing to the de-emphasis processing output that has been affected by phase delay etc. due to the filter, and can reproduce a good video luminance signal, making it suitable for home VTRs etc. that require high image quality.
It also has the effect of facilitating integration into circuits.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing one embodiment of the present invention, and FIG. 2 (
a) to (g) are signal waveform diagrams showing the circuit operation of Fig. 1, Fig. 3 is a circuit diagram showing a specific example of Fig. 1, and Fig. 4 is a household V
FIG. 5 is a block diagram showing a conventional example, and FIGS. 6(a) to 6(c) are signal waveform diagrams showing the circuit operation of FIG. 5. 1.7... Limiter circuit, 2... FM demodulation circuit, 3
...LPF, 4... Main de-emphasis circuit,
5...Nonlinear de-emphasis circuit, 6, 8...
・HPF, 9... Subtractor, 10... Inverter, 11.
...Adder, 12...Composition circuit, 13...Reproduction signal processing circuit, J6.17...Time constant circuit, 18-21.
... terminal, 30 ... semiconductor integrated circuit, 31 ... recording system processing circuit, 32 ... reproduction system processing circuit, 33 ... selector, 34 ... magnetic head, 35 ... magnetic tape, B1-B5...Bias circuit, 01-C3...Capacitor, ■1-■6... Constant current source, Q1-Qll・
...Transistor, R1-R15...Resistance.

Claims (1)

[Claims] 1. FM demodulation means for demodulating an FM-modulated video signal that has been subjected to emphasis processing in advance, and a low-pass filter for removing an FM carrier wave component from the output signal from the FM demodulation means; a de-emphasis processing means for performing de-emphasis processing on the output of the low-pass filter; and a first de-emphasis processing means for removing a DC component from the output of the low-pass filter.
a high-pass filter, a limiter circuit that limits the amplitude of the output of the first high-pass filter to a predetermined level, a second high-pass filter that removes a DC component from the output of the de-emphasis processing means; A subtracter with the output of the high-pass filter as the subtraction input and the output of the limiter circuit as the input to be subtracted; and one addition input with the output of the de-emphasis processing means, and the output of the subtracter is passed through an inverter to the other. A video signal processing circuit comprising: an adder connected to an addition input and outputting the addition output as a video signal. 2. The video signal processing circuit according to claim 1, wherein the first and second high-pass filters are composed of capacitors, and the subtracter and the adder are each composed of a differential amplifier.