JPH0495184A - Setting system for option circuit of semiconductor device - Google Patents

Abstract

PURPOSE:To easily execute the setting/change of the option part by providing a latch corresponding to each of opening/closing elements and a rewritable and nonvolatile memory cells, and executing the setting/change of the circuit by opening and closing the opening/closing elements by the latch. CONSTITUTION:An EPROM cell 10 and a latch 30 are provided for the setting/ change of an option circuit 40. On the option circuit 40, plural pieces of opening/ closing elements are provided in order to execute the setting/change of its circuit, and by opening and closing these opening/closing elements, connection/ non-connection between wirings or a substrate diffusion layer and the wiring are executed and the setting/change of the option circuit are realized. As for the latch 30 and the EPROM 10, plural pieces are provided so as to correspond to one-to-one to the opening/closing elements. In such a way, the setting/change of the option circuit can be executed easily and quickly.

Description

[Detailed Description of the Invention] [Summary of the Invention] Regarding the setting method of an option circuit of a semiconductor device such as an l-chip microcontroller, it is possible to easily change the settings of the option section and proceed with development easily and quickly. In an optional circuit setting method for a semiconductor device that enables circuit settings/changes by having switching elements for connecting/disconnecting in the circuit, latches and rewriting corresponding to each switching element are provided. The necessary data is written into these memory cells, read out when the semiconductor device is reset, and taken into a latch, and the latch opens and closes the switching element to perform circuit settings/changes. Configure it so that

[Industrial application field]

The present invention relates to a method for setting optional circuits in a semiconductor device such as a one-chip microcontroller.

A one-chip microcontroller has a general-purpose part that is common to each controller, and optional parts that differ according to the user's wishes.

Semiconductor devices can be roughly divided into a semiconductor substrate portion on which diffusion is performed, and a wiring portion thereon, and the wiring portion has a multilayer structure as the degree of integration increases. Option circuits are usually realized by changing wiring in a certain layer of the multilayer wiring layer.

(Prior art) Optional parts of the internal circuit of a one-chip microcontroller are mainly handled by switching the wiring mask.The wiring in a certain layer is formed by forming through-holes in the insulating layer below the core layer, or by metal vapor deposition. Since this can be implemented by patterning, optional circuits can be set/changed by changing masks such as patterning.

However, with this method using a mask, it is of course impossible to make changes after manufacturing, and to make changes, it is necessary to change the mask and manufacture the semiconductor device again. Therefore, it lacks flexibility and is very inconvenient during initial development when there is a high possibility of changes.

Option circuit settings/changes can be achieved by connecting/not connecting certain traces to other traces or substrate diffusion regions, in which case the switching function can be connected to/not connected to other traces or substrate diffusion regions, i.e. the switching function can be transferred to a non-volatile device such as an EPROM cell. It can be realized with a writable memory element. If it is an EPROM cell, etc., it is best to change the connection from one to the other, or vice versa.
It can be easily executed.

[Problems to be Solved by the Invention] As described above, when the option circuit of an l-chip microcontroller is realized by mask switching, it is difficult to change the settings of the option section during initial development, and it is difficult for developers to change the settings of the option section using the actual chip. The problem is that it cannot be done.

It is an object of the present invention to improve the above points, to make it possible to easily change the settings of the option section, and to proceed with development easily and quickly.

[Means to solve the problem]

As shown in FIG. 1, in the present invention, an EPROM cell IO and a latch 30 are provided for setting/changing the option circuit 40. The option circuit 40 is provided with a plurality of switching elements for setting/changing the circuit, and by opening/closing these switching elements, connection/disconnection is established between wirings or between a substrate diffusion layer and wiring. Connect and set/change option circuits. Latch 30 and EPROM cell 10
A plurality of the opening/closing elements are provided in one-to-one correspondence with the switching element.

Writing/reading is performed on the EPROM cell, but 5
0 is a word line/bit line selection circuit at that time. The write data is sent to E through the data bus DB sense amplifier 20.
The read data is sent to the PROM cell 10, and the read data is sent to the EPROM cell 10.
Data bus DB from cell 10 through sense amplifier 20
Or sent to latch 30.

[Effect]

Data writing to the EPROM cell 10 is performed using the mode signal M.
For example, set ODE to 1 (H level) and set address signal A.
DD is input to select the word line and bit line of the EFROM, and write data is input from the data bus DB.

EPRO? Reading of the I cell is performed when the mode signal MODE is set to 0 and the reset signal R3T is 1, and is led to the latch 30 through the sense amplifier 20 and taken into the latch. The latch 30 holds 1, 0 of the captured cell data.
The opening/closing element of the option circuit 40 is turned on and off in accordance with the above. As a result, the option circuit 40 is set. To change the settings of the option circuit, the EPROM cell 10 may be rewritten and its stored data may be changed.

In this manner, the present invention allows setting/changing of optional circuits to be performed extremely easily and quickly. In addition, the EPROM cell only serves as a data source for setting the option circuit, and is read only at reset time, and the actual circuit setting is performed by the opening/closing element of the option circuit using latch data.
It is not affected by the voltage/current of the switching element and can be expected to have a long life.

〔Example〕

FIG. 2 shows an embodiment of the present invention. 11-18 are EPRO
Each cell of the M cell 10, 21 to 28 each amplifier of the sense amplifier 20, 31 to 38 each latch of the launch 30, 41 to 28
Reference numeral 48 denotes each circuit of the option circuit 40, each having one switching element for connection/disconnection (not shown).

Since cells 11 to 18 are EPROM cells, they have a floating gate (FC) and a control gate (CG), and CG is connected to word line WL.

The drain of the cell is connected to the bit lines BL, ~B t s, and the source is connected to ground. 51 to 58 are column gates. The sense amplifier is shown schematically here as being shared for reading and writing, with Di being its input (write) data and Do its output (read) data.

Word line selection is performed by buffer E in response to signals S, . Details of circuits A-D are shown in FIG. 2).

KAP and KAB are the internal basic clocks of the l-chip microcontroller and have the timing shown in FIG. The mode signal MO takes a state of 1.0, and when it is -1 (H), it is the write mode of the EPROM cell, and when it is 0 (L), it is the normal operation mode. Reset signal R3T is MODE=
When MODE=0, it is always 1, and when MODE=00, it is determined by the external reset signal applied to the reset terminal in normal operation mode. In contrast to this external reset signal, R3T is an internal reset signal. Further, ADD is the address of the EPROM cell.

As shown in Figure 2(b), circuits A-D are combinations of AND, NAND, inverters, etc., so in circuit A, MO
When DE=1, output S+=1 and buffer E is enabled. In addition, in circuit B, when MODE = 1, the NOR gate opens and the decoder DEC receives the address ADD.
Output S2. S appears. The output S selects the word line WL of the EPROM cell (sets it to H level). Also, in circuit C, the AND gate opens when MODE=1, so the output S! becomes the output S4, and columns 51 to 58 are opened. Then, when input data Di is input and a high voltage from a high voltage circuit (not shown) is applied, cells 11 to 18 are written (electron injection/non-injection) in accordance with the input data.

When the mode signal MODE is O, the AND gate opens in circuit A, and as shown in FIG.
If is 1, the output S1 is an inversion of the clock KBP, and if the reset signal R3T is O, Sl is always L. When S,=L, buffer E is inactive and the EPROM cell is neither written nor read.

In addition, in circuit B, if MODE=O, S3 becomes L, and S2
Output only. In circuit C, if 1=0, then 54=R3T, and as shown in FIG. 3, if R3T=1, 54=1, that is, column gates 51 to 58 are opened. As a result, MODE
When =O1R3T=1, when KBP=L, cells 11~
18 is successively outputted, and the outputs amplified by sense amplifiers 21-28 enter latches 31-38. In the circuit, when MODE=0 and R3T=1, the AND gate opens and produces an output S, which is KAP, as shown in FIG. This output S becomes a take-in signal for the latches 31-38, and causes the read data of the cells 11-18 to be latched.

In this way, when the latches 31 to 38 take in the stored data of the cells 11 to 18, the output of this latch is S6 (data l, 0).
Accordingly, the switching elements of the option circuits 41 to 48 are opened and closed, and circuit settings are performed. To change this set circuit, it is sufficient to rewrite the EPROM cell and change the stored data. It's much simpler, easier, and faster than changing patterning masks.

Furthermore, since the EPROM cell is not used as an opening/closing element for the optional circuit, but is only used as a data source for the latch that controls the opening/closing of the opening/closing element, the read operation of the EPROM cell (reading operation) is performed when the one-chip microcontroller is reset. Therefore, the EPROM cell is not affected by the voltage applied to the switching element and the current flowing through the element, and stable operation and long life can be achieved. Note that if the EPROM cell is used as an opening/closing element and is constantly accessed while the optional circuit is operating, retention (RETE) will be reduced.
There is deterioration of devices such as NTION), and there is power consumption because there are word line and bit line drive units, sense amplifiers, etc. around the cell. A typical reset is a power-on reset, which occurs momentarily when the power is turned on. When the cell is read with this, it is necessary to set the switch device of the optional circuit at the start of operation.

Although FIG. 2 shows 1 word lines and 8 EFROM cells, the number of word lines and cells can be changed as appropriate. If the number of switching elements in the option circuit is very large, it is sufficient to provide a plurality of cells per word line for a plurality of word lines. Output S3 of circuit B selects one word line among the plurality of word lines. If there are a plurality of column gate groups, the output S4 of the circuit C selects the column gate groups.

If the 1-chip microcontroller has an EFROM, the EPROM cell 10 may be used as a memory cell. The output current D0 is the output data of cells other than those for setting the option circuit in case of heating.

〔Effect of the invention〕

As explained above, according to the present invention, the option circuits of a one-chip microcontroller can be easily set, and the initial development of a system using this chip can be easily carried out.

Further, since the EFROM cell is read only at reset, and no direct connection/31uif is required just by setting the reader, a longer life can be expected, and the power consumption of the EPROM section can be reduced.

[Brief explanation of drawings]

FIG. 1 is a principle diagram of the present invention, FIG. 2 is a circuit diagram showing an embodiment of the present invention, and FIG. 3 is a time chart for explaining the operation. In Figure 1, lO is an EFROM cell, 20 is a sense amplifier,
30 is a latch, and 40 is an option circuit.

Claims (1)

[Claims] 1. In a method of setting an optional circuit for a semiconductor device in which a switching element for connecting/disconnecting is present in the circuit to enable circuit setting/change, a latch and a rewritable non-volatile circuit are provided for each switching element. A feature is that memory cells are provided, necessary data is written in these memory cells, and when the semiconductor device is reset, the data is read out and taken into a latch, and the latch opens and closes the switching element to perform circuit settings/changes. A method of setting optional circuits for semiconductor devices.