JPH0488579A - Picture processor - Google Patents

Abstract

PURPOSE:To decrease the degradation of picture quality when converting the picture element density of a binary picture by providing the convention means which convert a binary picture data read based on the control of the control means into the picture element density and obtaining a multi-level data. CONSTITUTION:While confirming a multi-level output printer 5 and an inside state, a CPU 6 instructs the read of the picture data to a memory control part 1 and afterwards, a printing operation is started. When printing-out the picture data stored in a memory 2 into original one, the memory control part 1 reads out the picture data from the memory 2 and controls the data to be outputted to a projection processing part 4. In the projection processing part 4, the picture element density is converted with an arbitrary magnification, and the multi-level output printer 5 forms a multi-level picture based on the converted picture data. When printing is executed over plural pages, the above-mentioned operation is repeatedly executed until all the pages are completely printed. Thus, when the picture element density of the binary picture is converted, the degradation of picture quality can be decreased.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an image processing device, and, for example, to an image processing device that converts binary image data to pixel density.

[Prior Art] FIG. 14 is a diagram showing a conventional example, in which 201 is a memory control section, 202 is a memory, 203 is a crystal oscillator, 204 is a projection processing section, 225 is a binarization processing section, and 226 is a This is a binary output printer.

The memory 202 stores image data of black and white binary bit images. The reading resolution of the image data is arbitrary. A memory control unit 201 stores image data in a memory 202.

Do reading 8shi. A crystal oscillator 203 generates a clock that serves as a reference for the operation of the projection processing section. Projection method processing section 20
4 performs pixel density conversion at an arbitrary magnification, and outputs the calculation result of the projection method to the binarization processing unit 225 as an n-bit parallel signal. In the binarization processing section 225, the projection method processing section 20
Binarization is performed by setting a pixel to 1 when it is equal to or larger than a certain threshold value for the n-bit multi-value output of 4, and setting the pixel to 0 when it is smaller. The printer 226 outputs an image according to the binarized data.

[Problems to be Solved by the Invention] However, in the conventional example, although the projection method processing section 204 performs multi-value calculations, since the printer 226 outputs binary values, the projection method processing section 204 performs multi-value calculations. This method has the disadvantage that the value output data must be binarized and the image quality deteriorates when pixel density conversion is performed.

The present invention has been made in view of the above-mentioned drawbacks of the conventional example, and its purpose is to provide an image processing device that can reduce deterioration in image quality when performing pixel density conversion of a binary image. At the point.

[Means for Solving the Problems] In order to solve the above-mentioned problems and achieve the objectives, an image processing apparatus according to the present invention includes an input means for inputting binary image data, and a binary image data input by the input means. a control means for controlling writing and reading of value image data; a conversion means for converting the read binary image data into pixel density and converting it into multivalue data based on control by the control means; and the conversion means and an output means for outputting the multivalued data converted by.

[Operation] According to this configuration, the input means inputs binary image data, the control means controls writing and reading of the binary image data input by the input means, and the conversion means controls the control by the control means. The binary image data read out based on the pixel density is converted to form multi-value data, and the output means outputs the multi-value data converted by the conversion means.

[Embodiments] Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 is a block diagram showing the configuration of an embodiment of an image processing apparatus of the present invention. In the figure, 1 is a memory 2 which will be described later.
2 is a memory that stores image data; 3 is a crystal oscillator that generates a clock that serves as a reference for the operation of the projection processing unit 4, which will be described later; 4 is a projection processing unit that performs pixel density conversion. 5, and 5 respectively indicate a multilevel output printer. 6 is a CP that controls the entire device
7 is a program for the CPU 6 to operate (
ROM that stores the following information (according to the flowchart in Figure 13), etc.
8 indicates a RAM used as a work area for various programs.

Here, the processing of the above configuration will be briefly explained.

FIG. 13 is a flowchart illustrating the image processing procedure by the CPU 6 of this embodiment.

First, the CPU instructs the memory control unit 1 to input an image,
Image data of a white/black binary bit image inputted from a host computer or a scanner (not shown) is stored in the memory 2 (step Sl). The resolution of the accumulated image data is arbitrary. The CPU 6 instructs the memory control unit 1 to read image data while checking the multi-level output printer 5 and its internal state, and thereafter the printing operation is started (step S2). When the memory control unit l prints out the image data stored in the memory 2,
Control is performed to read image data from the memory 2 and output it to the projection method processing section 4. In the projection method processing section 4, pixel density conversion is performed at an arbitrary magnification, as will be described later, and the multi-value output printer 5 forms a multi-value image based on the converted image data. When printing is performed over multiple pages, the above operation is repeated until printing of all pages is completed (step S3). Details of the projection method processing section 4 will be explained below.

FIG. 2 is a diagram explaining the projection method of this embodiment, FIG. 3 is a block diagram showing the configuration of the projection method processing section 4 of this embodiment, and FIG. 4 is a diagram showing a reduction example based on the projection method of this embodiment. Diagram to explain, 5th
The figures are the signal timing chart according to the example in Fig. 4, and the signal timing chart in accordance with the example in Fig. 6.
7 is a timing chart of a signal according to the example of FIG. 6, and FIG. 8 is a diagram illustrating an example of overlapping surfaces based on the projection method of this embodiment. , FIG. 9 is a diagram illustrating the overlap of surfaces when performing approximation processing when reducing the projection method of this embodiment, FIG. 10 is a diagram showing an output example of the projection method processing unit 4 of this embodiment, and FIG. 10 is a diagram showing a printing example of FIG. 10 according to this embodiment, and FIG. 15 is a diagram showing a printing example of FIG. 10 according to a conventional example.

First, the projection method processing section 4 will be explained.

The projection method processing section 4 increases or decreases the number of pixels at an arbitrary magnification in both the main scanning direction and the sub-scanning direction.

FIG. 2 is a diagram showing pixels before and after projection method conversion. In the projection method, the shape of the pixel before conversion is assumed to be a square (the broken line in Figure 2), and the side length is the length of the side of the pixel before conversion multiplied by the reciprocal of the conversion magnification in both the main scanning and sub-scanning directions. This is an image density conversion method in which a rectangle (solid line in FIG. 2) having a shape is superimposed on the pixel before conversion, and the ratio of the black area included in the rectangle is used as density information.

Next, an example of the configuration of the projection method processing section 4 will be explained.

In FIG. 3, reference numeral 101 indicates a register for setting the magnification in the main scanning direction, and reference numeral 102 indicates a register for setting whether conversion in the main scanning direction is enlargement or reduction. The register 102 contains “1” for enlargement and “1” for reduction.
0'' is set.

103 indicates a register for setting the magnification in the sub-scanning direction;
Reference numeral 104 indicates a register for setting whether the conversion in the sub-scanning direction is enlargement or reduction.

In the register 104, "1" is set for enlargement, and "O" is set for reduction. Note that the values of the registers 101 to 104 are set by the CPU 6.

Reference numeral 105 indicates a main scanning direction reduction calculation unit for reduction in the main scanning direction, 106 indicates a main scanning direction enlargement calculation unit for enlargement in the main scanning direction, and 107 indicates a sub scanning direction reduction calculation unit for reduction in the sub scanning direction. , 108 indicates a sub-scanning direction enlargement calculating section for enlarging in the sub-scanning direction. Reference numeral 109 indicates a line synchronization signal generation section that divides the frequency of the signal from the crystal oscillator to generate a line synchronization signal, 110 indicates a read pulse generation section that frequency divides the signal from the crystal oscillator and generates a read pulse, 1
Numeral 11 is a multiplexer (11) which outputs a signal from the main scanning direction reduction calculation unit 105 when the output of the register 102 is 0'', and outputs a signal from the main scanning direction expansion calculation unit 106 when the output of the register 102 is 1''.
Hereinafter referred to as rMUXJ). Reference numeral 112 indicates a MIX that outputs a signal from the sub-scanning direction reduction calculation section 107 when the output of the register 104 is "0", and outputs a signal from the sub-scanning direction enlargement calculation section 108 when the output of the register 104 is "1".

113 is an inverter, 114 is an AND gate, 115 is an OR gate, 116 is an AND gate, and 117 is an OR gate. In addition, 118 is an inverter,
119 is an AND gate, 120 is an OR gate, 121 is an AND gate, and 122 is an OR gate. Reference numerals 123 and 124 respectively indicate constant parts that output a constant 256, and 125 and 126 indicate line buffers, respectively. Line buffers 125 and 126 constitute a double buffer. 127 is a line buffer 125,
126 shows a MUX that switches the output, and 128 shows a toggle flip-flop that toggles every time a line synchronization signal is input. 129, 130, 131,
132 indicates D flip-flops.

First, the operation of the main scanning direction reduction calculation unit 105 will be explained.

Here, we will take an example where the magnification is 200/256 (78% reduction). The overlap of the sides before and after conversion at that time is the fourth
As shown in the figure. The scanning direction reduction calculation unit 105 performs processing according to the magnification set in the main scanning direction magnification register 101.

Further, the clock serving as the reference for operation is the clock input from the crystal oscillator 10. Processing of each line is performed in synchronization with a signal input from line synchronization signal generation section 109.

The signals output from the main scanning direction reduction calculation unit 105 are an image clock control signal and a side length output. The image clock control signal is a negative logic signal, and when it is "0", the image clock is enabled.

Further, the length of the side is small in the range of 1 to 256, and it is a 9-bit parallel signal. Since the conversion magnification is 200/256, “
0". Therefore, MUXIII selects and outputs the side length of the main scanning direction reduction calculation unit 105.
The lower input of AND gate 114 becomes H (High) and the image clock is controlled. AND gate 1.16
The lower input becomes L (Low), and the OR gate 11
Since the lower input of 7 becomes L, the read clock output is the clock input from the crystal oscillator as it is.

Next, the actual calculation method for edges will be explained with reference to FIG. First, the length of the side of the first pixel is output as 200. below,
In order, the length of the side is 200- (256-200) = 144200- (2
56-144)=88 200-(256-88)=32.

According to the same calculation, the length of the next side is 200-(256-32)=-24, which is negative, but as you can see from side e in Figure 4, this is the length of the converted pixel. indicates that three pixels overlap before conversion.

Therefore, the length of the side is -24+200=176.

At this time, in order to match the number of pixels after replacement, as shown in FIG. 5, the image processing device clock control signal is set to H for one clock of the clock from the crystal oscillator 3, and the image clock specific power is thinned out. I do.

The length of the next side is 200-(256-176)=120, and the subsequent processing is repeated.

Note that the side calculation processing is performed in synchronization with the image clock output.

Next, the operation of the main scanning direction enlargement calculation section 106 will be explained.

The magnification is 700/256, and FIG. 7 shows the overlap of the sides before and after conversion. The main scanning direction enlargement calculation unit 106 performs processing according to the magnification set in the main scanning direction magnification register 101. The clock that serves as the reference for operation is a clock input from a crystal oscillator. Processing of each line is performed in synchronization with a signal input from line synchronization signal generation section 109. The signals output from the main scanning direction enlargement calculation section 105 are the read a clock control signal and the side length output. The reading ratio clock control signal is a negative logic signal, and when it is 0, the reading ratio clock is enabled.

The side length is a value in the range of 1 to 256, and the signal is a 9-bit parallel signal. Since the conversion magnification is 700/256, 1 is set in the main scanning direction enlargement/reduction register. Therefore, the MUX 111 is the main scanning direction enlargement calculation unit 1.
Select the length of the side of 06 and press a. Further, the lower input of the AND gate 114 becomes L, and the lower input of the OR gate 115 becomes L, so that the clock input from the crystal oscillator is output as it is as the image clock 8.

Next, the actual calculation method for edges will be explained with reference to FIG.

First, the length of the side of the first pixel is output as 256. The length of the next side is 700-256=444>256, so 256 is output. When the inequality sign is >, the read clock control signal is set to "1" (disabled). Since the length of the next side is 444-256=188≦256, 188 is output. Here, the reading ratio clock control signal is set to "0" to enable the readout clock and request the image output device 1 for data of the next pixel.

The length of the next side is (188+'yoo)-256=632>256, so 256 is output. The length of the next side is 632-23
Since 5=376>256, 256 is output. Thereafter, the same process is repeated.

Note that the side arithmetic processing is performed in synchronization with the clock input from the crystal oscillator 3.

The calculations for the sides of reduction in the main scanning direction and expansion in the main scanning direction have been described above, but calculations are also performed in a similar manner in the sub-scanning direction. In the block diagram and timing chart, the main scanning is changed to the sub-scanning, and the crystal oscillator 3
The image clock may be used as a line synchronization signal, the side calculation results A and B may be used as C and D, respectively, and the read clock may be replaced with a line read pulse.

Next, image data control and image signal calculation will be explained. The image data is double buffer controlled by line buffers 125 and 126, and the image data delayed by one line is input to the D flip-flop 129. The data in D flip-flop 129 is transferred to D flip-flop 13.
1 causes a delay of one pixel. Further, the image signal input is inputted as is to the D flip-flop 130. The data of D flip-flop 130 is transferred to D flip-flop 132.
is input and delayed by one pixel.

Through the above processing, four pixels of 2×2 are referred to.

As shown in FIG. 8, the areas AXC, BXC, AXD, and BXD are obtained by multiplying the side calculation results A and B in the main scanning direction and the side calculation results C and D in the sub-scanning direction.
Furthermore, the corresponding image data V+ W+ X+
After multiplying by y and adding them together, the added value becomes the density level of the pixel after conversion. When all bits of the 9-bit side data are operated, the result is 17 bits. The reason why it is not 18 bits is that the maximum value of 9 bit side data is 100 He
This is because x. For the image signal output, the necessary number of bits from the higher order of the 17 bits of the calculation result may be adopted.

As explained above in the case of a reduction in the number of pixels, if the magnification of the number of pixels is 1/2 or more but less than 1, it is possible for 3 pixels before conversion to overlap one side of the pixel after conversion. can be,
When conversion is performed at this magnification in both the main scanning direction and the sub-scanning direction, a maximum of nine pixels before conversion overlap one pixel after conversion. Furthermore, if the magnification is less than 1/2, even more pixels overlap. Performing calculations on all of these pixels increases the hardware scale.

Therefore, in the projection method processing section 4 of this embodiment, the reference pixels are up to 4 pixels in total, 2 pixels in the main scanning direction and 2 pixels in the sub-scanning direction. Therefore, when the number of reference pixels exceeds four pixels, approximation processing is performed. For example, an example of the correspondence between the pre-conversion pixels and the post-conversion pixels will be explained in the case where the number of pixels is reduced by a magnification of 136/256 in both the main scanning direction and the sub-scanning direction as shown in FIG. There are 9 pre-conversion pixels that overlap the pre-conversion pixel P, but
This area a, b, c+ d+ e+ f+ g+ h
, 1. The area of axi is S1 ~ S la ""
Assume that the color of j is 11~technical, and ■ is "1" when it is black and "0" when it is white. The approximation method is that area C has the same color as the area,
It is approximated that region g has the same color as region d, and regions f, h, and i have the same color as region e. According to this method, the density of the pixel P,
becomes as follows.

Ip = (S,・1.÷(sb+se)・xb+
(sa÷S,)・I.

+ (s, +sr+sr++s+)・1. )/(25B
・256)=((136+40)・80÷(136+4
0)・(136+40>)/(256・256) = 0.6875.

On the other hand, in the case of an increase in the number of pixels, there is no need for approximation because the number of pixels before conversion that overlap one pixel after conversion is four or less, regardless of the magnification.

Note that the length of one side after conversion is not limited to 256, and may be calculated using any value. However, the side length is 2″
By doing so, when calculating the density, the division can be done with a shift process, which makes it easier to configure the hardware (not only reduces the hardware scale but also increases the processing speed. Also, in this example, the position of the reference pixel is limited. However, for example, the pixels with large overlap may be extracted as two reference pixels.Furthermore, the reference pixels are not limited to 2×2, and it may be necessary to balance the reproducibility of the reproduced image with the hardware scale and processing speed. by.

The multi-value output printer 5 performs printing according to the n-bit multi-value image signal output from the projection processing section 4.

FIG. 10 is an example of multivalued output data when pixel density conversion is performed in the projection processing section. The numbers written on each matrix are the values of the projection method calculation results, O is white, 64
indicates black.

In the conventional example, the result of the previous calculation is simply binarized and output to the printer, but FIG. 14 shows an output image when the output data of FIG. 10 is binarized using the threshold value 32.

Furthermore, if the method of the embodiment is used, the output image will be as shown in FIG. In FIG. 11, the shaded portions are actually printed in gray. By outputting the output result of the projection method processing unit to the multi-value pressure printer in this manner, there is an effect that diagonal lines become smooth when viewed from a macroscopic perspective.

Furthermore, even when pixel density conversion is performed on image data obtained by converting a photographic original into a binary image using a pseudo halftone method such as a dither method, the density is preserved, resulting in improved gradation.

[Other Embodiments] FIG. 12 is a block diagram showing the configuration of another embodiment of the image processing apparatus of the present invention.

In the figure, 31 is a memory control unit that controls the memory 32, which will be described later; 32 is a memory that stores image data; 33 is a crystal oscillator that generates a clock that serves as a reference for the operation of a projection processing unit 34, which will be described later; Reference numeral 34 indicates a projection processing section that performs pixel density conversion, and 36 indicates a CRT display that forms a display image based on the image data output from the projection processing section 34.

Incidentally, since the units 31 to 34 operate in the same manner as in the previous embodiment, a detailed explanation will be omitted. Generally, the resolution of a CRT display is 640 dots.
The resolution is 400 dots, or 1120 dots x 750 dots, and in this case, the resolution is low compared to facsimile or image facsimile systems. For this reason, in this embodiment, the projection method processing section 34 often performs processing to reduce the pixel density. Display on the display surface.

In the above two embodiments, examples of a multi-value output printer and a CRT display 36 have been given as image output devices, but the present invention is not limited thereto, and can output images using other multi-value inputs. It is also effective for equipment etc.

[Effects of the Invention] As described above, according to the present invention, deterioration in image quality when performing pixel density conversion of a binary image can be reduced.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of an embodiment of the image processing device of the present invention, FIG. 2 is a diagram explaining the projection method of this embodiment, and FIG. 3 is a diagram of the projection method processing section 4 of this embodiment. A block diagram showing the configuration, FIG. 4 is a diagram explaining a reduction example based on the projection method of this embodiment, FIG. 5 is a timing chart of signals according to the example shown in FIG. 4, and FIG. 6 is a diagram showing the projection method of this embodiment. 7 is a timing chart of signals according to the example of FIG. 6, FIG. 8 is a diagram illustrating the overlapping of surfaces by the projection method of this embodiment, and FIG. 9 is a diagram of this embodiment. 10 is a diagram illustrating an example of the output of the projection processing unit 4 of this embodiment. FIG. FIG. 12 is a block diagram showing the configuration of another embodiment of the image processing apparatus of the present invention; FIG. 13 is a flowchart explaining the image processing procedure by the CPU 6 of this embodiment; The figure is a block diagram showing the configuration of a conventional image processing apparatus, and FIG. 15 is a diagram showing an example of printing of FIG. 10 according to the conventional example. In the figure, 1,201-me (-IJ control unit, 2,202...
・Memory, 3,203...Crystal oscillator, 4,204・
...Projection processing unit, 5...Multivalue 8 coupler printer, 6-C
PtJ, 7-ROM, 8・RAM, 1ol~104...
・Register, 10.5...Main scanning direction reduction calculation unit, 1
06... Main scanning direction enlargement calculation section, 107... Sub-scanning direction reduction calculation section, 108... Sub-scanning direction enlargement calculation section,
109...Line synchronization signal generation section, 110...Reading pressure pulse generation section, 111112.127...MUX
, 113... Inverter, 114.116, 119,
121...AND gate, 115, 117, 120,
122...OR gate, 123, 124...constant part, 125°126...line buffer, 128...
Toggle flip-flop b-tub, 129-132...D flip-flop, 225...binarization processing unit, 226...
・It is a printer. Figure 10 Figure 11

Claims (2)

[Claims] (1) an input means for inputting binary image data; a control means for controlling writing and reading of the binary image data inputted by the input means; An image processing apparatus comprising: a converting means for converting pixel density of value image data into multi-value data; and an output means for outputting the multi-value data converted by the converting means. (2) The image processing apparatus according to claim 1, wherein the conversion means performs the conversion based on a projection method.