JPH0487471A - Picture processing unit - Google Patents

Abstract

PURPOSE:To facilitate the memory management and to minimize deterioration in picture quality by providing plural quantization tables so as to compress a data into a desired compression data quantity. CONSTITUTION:A quantization table 6a is selected by a table selector 12, an index (i) is initialized, a coder 5 applies coding to a picture data subject to block processing and a counter 11 monitors the information quantity (compression rate). Then an output X from the counter 11 is inputted to a table selector 12 and compared with a prescribed information quantity S obtained from the capacity of a frame memory 13, and when the quantity is smaller than the prescribed information quantity S, the table selector 12 selects a switch 7 as 1 2 3 to obtain a maximum output X not in excess of the prescribed information quantity S.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention particularly relates to an image processing device that has a plurality of quantization tables and compresses blocked image data to a desired amount of compressed data. .

[Prior Art] When storing halftone images such as photographs (hereinafter referred to as "images") in memory, the required memory capacity is (number of pixels) x (number of gradation bits). Storing images required a huge amount of memory capacity. For this reason, various compression methods have been proposed to compress the amount of information.
Memory capacity is reduced by storing compressed information in memory.

Figure 6 shows JPEG (Joint Photographic
Ba proposed by Experts Group)
Coding method of 5eline System (basic method) (Expression: [International standardization of color still image coding] 1 Journal of the Institute of Image Electronics Engineers, Vol. 18, No. 6, pp, 39g-409
, 1989).

Image pixel data input from the input terminal 1 is cut out into blocks of 8×8 pixels by the blocking circuit 2, cosine transformed by the discrete cosine transform (DCT) circuit 17, and the transform coefficients are sent to the quantizer ( Q) Supplied to 40. This quantizer 40 performs linear quantization of the transform coefficients according to quantization step information applied by a quantization table 41. Among the quantized transform coefficients, the DC coefficients are converted into DC coefficients of the previous block by a predictive coding circuit (DPCM) 42.
A difference (prediction error) with the component is taken and supplied to the Huffman encoding circuit 43.

FIG. 7 is a detailed block diagram of the predictive encoding circuit 42 shown in FIG. 6.

The DC coefficients quantized by the quantizer 40 are sent to the delay circuit 53.
and is applied to the subtractor 54. This delay circuit 53 is a circuit in which the discrete cosine transform circuit is delayed by the time required to calculate one block, that is, 8×8 pixels. Therefore, the DC coefficient of the previous block is output from the delay circuit 53 to the subtracter. 54. Therefore, the subtracter 54 outputs the difference (prediction error) in the DC coefficient from the previous block. The circuit 42 is composed of the delay circuit 53 as described above).

Next, the one-dimensional Huffman encoding circuit 43 shown in FIG.
The prediction error signal supplied from the prediction encoding circuit 42 is
The data is variable-length encoded according to the Huffman code table 44, and is supplied as a DC Huffman code to a multiplexing circuit 51, which will be described later.

On the other hand, the AC coefficients (coefficients other than the DC coefficients) quantized by the quantizer 40 are zigzag-scanned in the scan conversion circuit 45 in order of low-order coefficients as shown in FIG. 8, and significant coefficients are detected. The signal is supplied to circuit 46. This significant coefficient detection circuit 46 determines whether the quantized AC coefficient is "0" or not. If it is "0", it supplies a count up signal to the run length counter 47 and increases the counter value by "+1". increase. However, in the case of a coefficient other than "0", a reset signal is supplied to the run length counter 47, the counter value is reset, and the coefficient is sent to the grouping circuit 48 as a group number 5sss as shown in FIG. The group number 5SSS is divided into additional bits and sent to the Huffman encoding circuit 49.
The additional bits are each supplied to a multiplexing circuit 51.

The run length counter 47 described above is a circuit that counts the run length of "0", and the number N of "O" between significant coefficients other than "0".
NNN is supplied to a two-dimensional Huffman encoding circuit 49. This Huffman encoding circuit 49 performs variable length encoding on the supplied run length NNNN of “0” and significant coefficient group number 5sss according to the AC Huffman code table 50.
A multiplexing circuit 51 is provided with an AC Huffman code.

In the multiplexing circuit 51, one block (8×8 input pixels)
The DC Huffman code, AC Huffman code, and additional bits are multiplexed and compressed image data is output from the output terminal 52.

Therefore, the memory capacity can be reduced by storing the compressed image data outputted from the output terminal 52 in a memory and decompressing it by a reverse operation when reading.

[Problems to be Solved by the Invention] However, in the above conventional example, since variable length encoding is used in the encoding section, the code length (information amount) of one block is
Memory management becomes complex in applications that require a constant rate of data. Another disadvantage is that it is difficult to perform image synthesis such as overlapping images as shown in FIG. 10 or partial replacement of images as shown in FIG. 11 on the memory.

Furthermore, since the DC coefficients after the discrete cosine transform (DCT) are encoded by a predictive coding circuit (DPCM), there is a problem in that an error occurs when one block is replaced. In order to prevent this error from occurring, the DPC
After demodulating the entire set belonging to the M code and performing data replacement, the DPCM code must be obtained again, which has the disadvantage that the processing procedure is complicated and the number of calculations is large, making it impractical.

The present invention was made to solve the above problems, and
It is an object of the present invention to provide an image processing device that has a plurality of quantization tables and compresses data to a desired amount to facilitate memory management and minimize image quality deterioration.

[Means for Solving the Problems] In order to achieve the above object, an image processing apparatus of the present invention has the following configuration.

An image processing device that has multiple quantization tables and compresses blocked image data to a desired amount of compressed data, and encodes the blocked image data based on the quantization tables. a counting means for counting the amount of compressed image data encoded by the encoding means; and a selection means for selecting a quantization table according to the result of the counting means.

Preferably, the selection means selects quantization tables in a direction in which the amount of compressed data decreases or increases.

Furthermore, preferably, one aspect is that the selection means includes a storage means for storing an index of the selected quantization table.

[Operation] In the above configuration, block image data is encoded based on a quantization table, and the amount of compressed data of the encoded image data is counted. Then, a quantization table is selected according to the coefficient result, and the data is encoded into a desired amount of compressed data.

[Embodiment] Hereinafter, a preferred embodiment of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 is a schematic block diagram showing the configuration of an apparatus in this embodiment.

The image pixel data input from the input terminal 1 is processed by a blocking unit 2 composed of a plurality of delay line memories.
For example, it is divided into blocks of 8×8 pixels. Then, a discrete cosine transform (DCT) section 3 performs cosine transform for each block, and the next scan transform section 4 converts the block into a one-dimensional data string. Thereafter, the encoded data encoded by the encoder 5 is stored in a buffer memory 9 or 10 controlled by a table selector 12 and a memory controller 8, which will be described later.

FIG. 3 is a block diagram showing details of the encoder 5 described above.

As shown, the encoder 5 includes a quantizer (Q) 22 and a variable length encoder (Q) as shown in FIGS.
(VLC) 23, and quantization is normally performed while referring to a quantization (Q) table 6. FIG. 2 is a diagram showing an example of this quantization table (JPEG Y table).

However, in this embodiment, as shown in FIG. 1, a plurality of quantization tables 68 to 6C are arranged so as to be switchable by a switch 7, and the encoded data from the encoder 5 is monitored, and the table is The selector 12 is configured to switch between the quantization tables 6a to 6c.

The contents of the quantization tables 68 to 6c are different from each other, and the values at the same position in each of the tables 68 to 6C are arranged in the order of 6a→6b-6c.

Therefore, when the quantization table is switched from 6a to 16b to 16c, the amount of information generated by the encoder 50 increases monotonically (
compression ratio decreases).

Next, the encoding and storage operations in this embodiment will be explained below according to the flowchart shown in FIG.

First, in step S1, the table selector 12 selects the quantization table 6a, and the index i
is initialized. Next, in step S2, the encoder 5 encodes the blocked image data based on the selected quantization table. Then, in step S3, the encoded data from the encoder 5 is written into the buffers 9 and 10 controlled by the memory controller 8, and at the same time,
The information is input to a counter 11, and the amount of information (compression rate) is monitored.

Next, in step S4, the output X from the counter 11 is input to the table selector 12, and the frame memory 13
It is compared with a predetermined amount of information S determined from the capacity of . As a result, if the output X is smaller than the predetermined amount of information S, step S
Proceed to step 7 and select the next quantization table. Then, in step S8, the index i is updated, and the process returns to step S2 described above. In other words, in this operation, the table selector 12 switches the switch 7 from 1 to 2-3 to obtain the maximum output X that does not exceed the predetermined amount of information S.

Then, as a result of the above step S4, if the output X is equal to or larger than the predetermined amount of information S, the process proceeds to step S5, and the code data at that time is stored from the buffer 9 or 10 to the frame memory 13.

Next, in step S6, the index data of the quantization tables 68 to 6C are recorded in the index memory 14, and the operation ends.

By repeating the above operations for each block, all image data is stored in the frame memory 13 as compressed data. The information amount of each block is less than or equal to the predetermined information amount S, and the memory capacity for one block in the frame memory 13 can be fixed.

Next, when reading the compressed data stored in the frame memory 13, the inverse quantizer 25 of the decoder 15 shown in detail in FIG. Inverse quantization is performed with reference to 17a to 17c. That is, the table selector 12 selects the quantization tables 17a-17c according to the index data recorded in the index memory 14, and the inverse quantizer 25 performs inverse quantization based on the contents. Then, a normal reverse scan converter 18. Inverse discrete cosine transform circuit 19. The image pixel data processed by the rasterization circuit 20 is output from an output terminal 21.

Further, contrary to the above, the order of the quantization tables may be changed so that the amount of generated information decreases monotonically.

FIG. 12 is a diagram showing the overall configuration of an image processing device including the image storage section shown in FIG. 1.

In the figure, reference numeral 200 denotes an image input unit, which includes an image reading device such as an image scanner including a CCD sensor, a host computer, and an interface for external equipment such as an S left camera video camera. Image input section 200
The image data input from is supplied to the input terminal 1 of the image storage section 201 shown in FIG. 202 is an operation unit through which the operator specifies output light for image data;
Reference numeral 3 denotes an output control section, the former for selecting output light for image data, and the latter for outputting a synchronizing signal for memory reading, etc.

204 is an image display unit such as a display; 205 is a transmitter unit that transmits image data via a public line or local area network; and 206 is a unit that irradiates a laser beam onto a photoreceptor to form a latent image; This is an image output unit such as a laser beam printer that converts images into visible images.

Note that the image output unit 206 may be an inkjet printer, a thermal transfer printer, a dot printer, or the like.

Further, the variable length encoding described above is not limited to ADCT, and may be other encoding methods such as arithmetic encoding.

As described above, according to this embodiment, by having a plurality of quantization tables and monitoring output information from the encoder, it is possible to obtain maximum output information that does not exceed the specified value information amount.

Therefore, the memory capacity within a block can be kept constant, the image editing function can be configured as a low-cost system, and it is also possible to minimize image quality deterioration due to compression.

[Effects of the Invention] As explained above, according to the present invention, by having a plurality of quantization tables and compressing data to a desired amount of compressed data, memory management can be facilitated and image quality deterioration can be minimized. I can do it.

[Brief explanation of drawings]

FIG. 1 is a schematic block diagram showing the configuration of the device in this embodiment, FIG. 2 is a diagram showing the contents of the quantization table shown in FIG. 1, and FIG. 3 is a diagram showing the configuration of the encoder shown in FIG. 1. Detailed block diagram; Figure 4 is a detailed block diagram showing the configuration of the decoder shown in Figure 1; Figure 5 is a flowchart showing encoding and storage operations in this embodiment; Figure 6 is the encoding method in the conventional example. 7 is a detailed block diagram showing the configuration of the predictive coding circuit shown in FIG. 6, FIG. 8 is a diagram showing the scan order of DCT coefficients, and FIG. 9 is a diagram showing the group number of AC coefficients. Figure 10 is a diagram showing image overlap on a frame, Figure 11 is a diagram showing image replacement on a frame, and Figure 12 is a diagram showing the overall configuration of the image processing device. be. In the figure, 1... input terminal, 2... blocking section, 3... discrete cosine transformation section, 4... scan conversion section, 5...
Encoder, 6a to 6c, 17a to 17cm quantization table, 7.16... Switch, 8... Memory control unit, 9
゜10...Buffer memory, 11...Counter, 1
2... Table selector, 13... Frame memory, 14... Index memory, 15... Decoder,
18... Inverse scan transform unit, 19... Inverse discrete cosine transform unit, 20... Rask conversion unit, 21... Output terminal. Fig. 2 TOO+03 Fig. 3 Fig. 4 Fig. 8 Fig. AC I wo sss Fig.

Claims (3)

[Claims] (1) An image processing device that has a plurality of quantization tables and compresses blocked image data to a desired amount of compressed data, which encodes the blocked image data based on the quantization tables. a counting means for counting the amount of compressed image data encoded by the coding means; and a selection means for selecting a quantization table according to the result of the counting means. An image processing device characterized by: (2) The image processing apparatus according to claim 1, wherein the selection means selects quantization tables in a direction in which the amount of compressed data decreases or increases. (3) The image processing apparatus according to claim 1, wherein the selection means includes a storage means for storing an index of the selected quantization table.