JPH0487413A - Training signal detector - Google Patents

Abstract

PURPOSE:To prevent the erroneous detection of a segment and to improve the detection accuracy by comparing the absolute value of a timing phase error signal generated by a timing extracting means with a prescribed threshold, and detecting a repeating pattern segment in accordance with a result by this comparing means. CONSTITUTION:Outputs subjected to filtering by band pass filters(BPF) 12, 13, are respectively multiplied by a multiplier 14, and inputted to the BPF 15 of a center frequency fb. The output of the BPF 15 is inputted to a digital PLL(DPLL) 16, in which phase comparison with a reference oscillation frequency signal sin2pifbt is executed. In a comparator 18, the comparison relation of a threshold determined in advance and the absolute value of a timing phase error signal is compared. Also, in a repeating pattern segment being a detection target, and at the time of receiving other data, there is a clear difference in the number of pieces of samples in which the absolute value exceeds the threshold. Accordingly, by its number of pieces, the repeating pattern segment can be caught surely.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a training signal detection device for a receiving modem, and particularly in accordance with CCITT Recommendation V, 27ter/bis.
Segment 3/1 (continuation of 180° phase reversal) and V
, 29/V, and 33 segments 2/1 (alternating AB signals).

[Prior art] CCI TT Recommendation V, 27ter type modem and ■, 29
In this modem, after the transmitting and receiving modems are connected via a communication line, the transmitting modem uses a predetermined training signal sequence (turn-on sequence) to initialize each signal processing section of the receiving modem. Send out. For example, the training signal sequences for the V.27ter modem and the V.29 modem are defined as shown in FIGS. 5(a) and 5(b), respectively.

The receiving modem receives this training signal sequence and initializes the AGC, automatic equalization amount, etc., which are the main constituent blocks of the receiving section. In the figure, V, 27te
r segments 4, 2, 29 Segment 3 is a segment in which the automatic equalizer provided in the receiving modem adjusts tap coefficients at the initial setting stage so that the inverse characteristics of the communication line can be realized. The initial setting operation of the receiving side modem is performed earlier in time than this equalizer adjustment segment (from the start of the received V, 27ter segment 3, 2, 29ter segment 2).

Figure 2(a) shows V, 27ter 8-phase phase modulation 4800
Figure 3 depicts the demodulated baseband signal structure within segment 3 at 1600 baud.

On the baseband signal configuration diagram, as shown by black circles in the diagram, the signals are received as a series of signals whose phases are inverted by 1800 degrees. FIG. 2(b) shows the frequency components of the bus band received signal in this segment. As shown in the figure, the passband received signal at this time is V, 27t
er's carrier frequency (1800Hz) and the Nyquist frequency (1600/2H2), which is 1000H.

It has a bright line spectrum at 2600H2.

Further, FIG. 3(a) shows the structure of the demodulated baseband signal in segment 2 at 9600 bps (2400 baud) with 16-value orthogonal amplitude modulation of 29. When the transmission speed is 9600 bps, points A and B indicated by 0 in the figure
An alternating pattern of dots is received. Figure 3(b) shows the frequency components of the passband received signal at this time, and
, 29 carrier frequency 1700H2 component and 1700
500H2 component of H2±(2400Hz/2).

It can be seen that the 2900 Hz component is included as a bright line spectrum.

Next, the configuration of a conventional modem training signal detection device will be described below with reference to the drawings.

Figure 4 shows conventional V, 27ter, 4800bps)
This is a segment 3 signal detection device in a training sequence. In the figure, the analog reception signal arriving at the analog input terminal 40 is input to the A/D converter 41 at 9600H.
The signal is sampled at a sampling frequency of 2 and converted into a discrete value signal. This discrete value signal is sent to the multiplier 41
A first path squared by a and bandpass filters 42 and 43 having center frequencies at lKH2, 2, and 6KH2, respectively.
The second path is input to the second path.

In the second pass, each bandpass filter 42.4
The outputs from 3 are squared by multipliers 42a and 43a, respectively, and added by adder 44.

The output from the multiplier 41a in the first path and the output from the adder 44 in the second path are the power of all frequency components in the passband of the received signal, respectively, and the power of all frequency components in the passband of the received signal, and the output from the adder 44 in the second path. It is the power of a specific frequency component that exists when the Therefore, the outputs of both paths are divided into segments (in this conventional example, ■, 2
7ter segment 3), and mismatches at other times, so the difference between the outputs of both buses is taken, and the point at which the value matches zero is the start point of the detection target segment. It can be determined that

In this conventional example, a signal X obtained by multiplying the output of the multiplier 41a by a constant α (<1.0) is set as the output of the first bus, and a difference Y- Adder 45
This value is added and integrated by an adding integrator 46 for several samples, and the result 2 is input to a determiner 47. Note that the addition and integration are performed by the addition integrator 46 in order to prevent false detection due to noise. Then, the determiner 47 receives the signal 2
When Z is positive, a determination signal 48 is generated indicating segment detection, and when Z is negative, segment non-detection is generated. Based on this signal 48, the receiving modem determines the time to start the adjustment operation.

[Problems to be Solved by the Invention] However, in the conventional example described above, segment pressure is detected using the polarity of the value obtained by subtracting the power of all frequency components from the power of a specific frequency component of the received signal. It is possible to reliably detect the target segment even when additive white noise with -like levels across the entire frequency range is added, but colored noise whose power peak value is around the specific frequency components mentioned above This method has the drawback that false segment detection is likely to occur when a single tone signal near a specific frequency component is input.

Furthermore, since a separate segment detection device must be provided completely independently of the other signal processing sections of the receiving modem, there is also the disadvantage that the hardware scale of the receiving modem increases.

The present invention was made to solve the above problems, and
It is an object of the present invention to provide a training signal detection device that has a simple configuration and enables segment detection with high detection accuracy.

[Means and operations for solving the problem] In order to achieve the above object, the training signal detection device of the present invention has the following configuration. That is, the training signal detection device detects a repetitive pattern segment in a receiving modem from a training sequence sent from a transmitting modem, and detects an amplitude value proportional to a sampling timing phase error between transmitting and receiving from a received passband modulated signal. a timing extraction means for generating a timing phase error signal having a timing phase error signal, a comparison means for comparing the absolute value of the timing phase error signal generated by the timing extraction means with a predetermined threshold value, and output means for outputting a detected repetitive pattern segment.

Preferably, the output means includes a counting means for counting the period during which the absolute value of the timing phase error signal is greater than or equal to a predetermined threshold, and the repeating pattern segment is detected by counting a predetermined number with the counting means. One aspect is to output a cutoff output.

[Embodiment] Hereinafter, a preferred embodiment of the present invention will be described in detail with reference to the accompanying drawings.

First, prior to the explanation, the detection principle of the present invention will be briefly explained. The present invention is based on the following properties of the repeating pattern segment that is the detection target. That is, if the repeating pattern segment is V, 29/V, 33 (7), then the A and B signals are ■.

In the case of 27 t er / b i s, 180
Since it has a data pattern consisting of alternating signals of 0-phase inversion signals, it includes more po timing components than the subsequent equalization amount adjustment pattern, user data period, etc. The amount of po-timing components extracted by the timing extraction unit is the largest in the repeating pattern segment among all data periods, and is relatively small in other periods. Therefore, by focusing on this extraction amount, it is possible to prevent erroneous segment detection even when inputting colored noise or a single tone signal, which would cause erroneous detection in the conventional example.

Further, in a receiving modem in synchronous data transmission, a timing extraction/control unit for synchronizing sampling clocks between transmitting and receiving is essential, but the timing extracting unit used in the present invention is different from the conventional timing extracting unit. It is possible to share all the timing extraction parts in the signal processing part,
This makes it possible to significantly reduce the hardware scale.

Next, detection of a training signal in this embodiment will be explained below with reference to FIG.

FIG. 1 is a block diagram showing the configuration of a training signal detection device in this embodiment.

In the figure, 10 is an input terminal, and an analog modulated signal from a transmission path arrives. 11 is an A/D converter;
Samples the analog modulated signal and converts it to a digital signal. Here, the digitized modulated bus band signal is sent to a demodulator (not shown), and the carrier frequency is set to fc.

The signals are filtered by bandpass filters (BPF) 12 and 13 having the following center frequencies as the baud rate frequency fl.

The outputs from the filtered BPFs 12 and 13 are
The signal is multiplied by the multiplier 14 and input to the BPF 15 having the center frequency fb.

The fact that a desired baud swimming component can be extracted by the above-described configuration can be seen from the fact that the following series of growth forms are possible. That is, the output of BPF12 -...sln (:'π(fc twelve)
1) 1l Output of BPF 13 -sin (2π(fc -)t)b Output of multiplier 14・-5in (2π(fc +
)t)・sin (2π(fc −)t)=si
n (2i fct+z fbt)-sin(2z
fct-πfbt)=cos"(πfet)-cos
2(2πf, t) = −(cos (2x fbt) −
C03 (47 (fct)) BPF 15 output ----
cos(2x fbt) In actual transmission, the output of the BPF 15 is a cosine wave proportional to COs (2π(fb+Δfb)t), assuming that the po timing frequency error is Δf5.

The output of the BPF 15 obtained in this manner is input to a digital PLL (DPLL) 16, where a phase comparison with a reference oscillation frequency signal 5in2πfbt is performed. The signal processing operation in this DPLL 16 is as follows.

That is, if the phase comparator of DPLL 16 is a multiplication type, cos (2x (fb+△fb)t) ・sin 2
πfbt= % (sin (4πfbt+ 2x△
fbt)-sin 2π△fbt) The first term in the above equation is D
The low-pass filter (LP
F), the output of the DPLL 16 is a signal proportional to 5in2π△fbt, that is, written as 2π△fゎt=△ψ (timing phase error signal), the output of the DPLL16 becomes the sine value of △ψ. It is a proportional timing phase error signal.

In FIG. 1, the portion surrounded by a dotted line is shared with the timing extraction section, which is one of the main signal processing sections of the receiving modem.

This timing phase error signal is sent to a timing control section (not shown), and is also input to a full wave rectifier (ABS) 17, where the absolute value is taken.

18 is a comparator, which is given a predetermined threshold value, and compares the magnitude relationship between the threshold value and 1sin(△ψ) (I・1 is the absolute value), and calculates that sin(△A)1 is A count up signal is output to the counter 19 for sample values that are equal to or greater than the threshold value, and a count reset signal is output to the counter 19 for sample values that are less than the threshold value. This counter 19 performs a count-up and reset operation based on the control signal from the comparator 18 described above, and when a predetermined number or more of sample values consecutively reach a value equal to or higher than a threshold value, a segment detection signal 19a is transmitted to the counter 19. output to the modem main signal processing section.

As explained above, 1 sin (
There is a clear difference in the number of samples for which Δψ)1 exceeds the threshold, and this number makes it possible to reliably capture repeating pattern segments.

Therefore, erroneous detection due to colored noise, specific single tone signals, etc. can be suppressed, and segment detection with high detection severity can be performed. Furthermore, since the timing extractor, which is the main part of this configuration, can be shared with the timing extractor/controller of the receiving modem, it is possible to reduce the hardware scale.

In the above-described embodiment, the timing extractor that generates the timing phase error signal is configured by a narrow band BPF and a DPLL, but the signal processing of this part may be realized by a block having an equivalent configuration.

[Effects of the Invention] As explained above, according to the present invention, with a simple configuration,
Segment detection with high detection accuracy is possible by suppressing false detections caused by colored noise, specific single tone signals, etc.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of the training signal detection device in this embodiment. FIG. 2(a) is a demodulated baseband signal configuration diagram in segment 3 at V, 27ter. FIG. 2(b) is a segment diagram. Figure 3 (a) is a diagram showing the frequency components of the bus band reception signal in segment 2. Figure 3 (a) is a configuration diagram of the demodulated baseband signal in segment 2 at 29. Figure 3 (b) is the pass band reception signal in segment 2. FIG. 4 is a block diagram showing the configuration of a training signal detection device in a conventional example. FIGS. 5(a) and (b) are V, 27ter and ■, 29
FIG. 2 is a diagram showing a training signal sequence in a modem. In the figure, 11...A/D converter, 12, 13.15...
・Narrowband filter, 16...Digital PLL, 17・
...Full wave rectifier, 18...Comparator, 19...Counter. Figure 2 (0) 1m Figure 3 (0) Figure (b) Figure (b)

Claims (2)

[Claims] (1) A training signal detection device for detecting, at a receiving modem, a repetitive pattern segment of a training sequence sent from a transmitting modem, the amplitude being proportional to the sampling timing phase error between transmitting and receiving from a received passband modulated signal. a timing extraction means for generating a timing phase error signal having a value; a comparison means for comparing the absolute value of the timing phase error signal generated by the timing extraction means with a predetermined threshold; and output means for outputting that the repetitive pattern segment has been detected. (2) The output means includes a counting means for counting the period during which the absolute value of the timing phase error signal is greater than or equal to a predetermined threshold, and by counting a predetermined number of times with the counting means, it is indicated that a repeating pattern segment has been detected. The training signal detection device according to claim 1, wherein the training signal detection device outputs a training signal.