JPH0487383A - Substrate for mounting light-emitting diode array chip and light-emitting diode array - Google Patents

Substrate for mounting light-emitting diode array chip and light-emitting diode array

Info

Publication number
JPH0487383A
JPH0487383A JP2202848A JP20284890A JPH0487383A JP H0487383 A JPH0487383 A JP H0487383A JP 2202848 A JP2202848 A JP 2202848A JP 20284890 A JP20284890 A JP 20284890A JP H0487383 A JPH0487383 A JP H0487383A
Authority
JP
Japan
Prior art keywords
light emitting
emitting diode
diode array
groove
conductive layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2202848A
Other languages
Japanese (ja)
Inventor
Masahiro Ito
昌弘 伊藤
Tadao Kazuno
忠雄 数野
Yoshikatsu Asano
浅野 義勝
Tooru Miyouga
明日 徹
Masataka Ito
正孝 伊藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Eastman Kodak Japan Ltd
Original Assignee
Eastman Kodak Japan Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Eastman Kodak Japan Ltd filed Critical Eastman Kodak Japan Ltd
Priority to JP2202848A priority Critical patent/JPH0487383A/en
Publication of JPH0487383A publication Critical patent/JPH0487383A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12041LED

Abstract

PURPOSE:To make it possible to efficiently radiate the heat to be generated at the time of light emitting of an element by fixing a conductive layer on the side and bottom surfaces of a groove to accommodate an array chip. CONSTITUTION:A groove 5 is formed at the center of a mount board 1. The width and the depth of the groove 5 shall be somewhat greater than those of a chip 2. A conductive layer 3 is fixed on the side and bottom surfaces with a conductive adhesive agent. More than one chips 2 are arranged and mounted in the groove 5 so that both sides of each chip and the opposite side may be contacted with a conductive layer formed on both sides and the bottom of the groove, respectively. On the surface of the chip 2, individual electrodes are formed, and the conductive layer 3 is made common electrode of each chip 2. As both sides and the bottom surface are contacted with the conductive layer 3, the area to take out heat increases. As a result, elimination of heat can be conducted efficiently. At the time of mounting, it is enough to arrange the chips 2 in the groove. Therefore, detailed positioning is made possible.

Description

【発明の詳細な説明】[Detailed description of the invention] 【産業上の利用分野】[Industrial application field]

本発明は、LED (発光ダイオード)プリンタヘッド
などに使用するのに適したLEDアレイおよびこのLE
Dアレイに使用するLEDアレイチップ取り付け用基板
に関する。
The present invention relates to an LED array suitable for use in an LED (light emitting diode) printer head, and the like.
The present invention relates to a substrate for mounting an LED array chip used in a D array.

【従来の技術】[Conventional technology]

従来から、帯電したドラムに光を当てて像を形成し転写
する電子写真方式のプリンタの1つとして、LEDプリ
ンタが知られている。このLEDプリンタは、感光体ド
ラムへの光書き込み用のヘッドとしてLEDアレイを使
用するものである。 このLEDアレイは、一般に、多数の発光ダイオードが
集積された発光ダイオードアレイチップの複数個から構
成されている。これらの複数個のアレイチップ(LED
素子)は、その発光部と反対側の面が、基板上に形成さ
れた導電層に接触された状態で、マウントボード(マウ
ント基板)に上に並べられて取り付けられている。
2. Description of the Related Art Conventionally, an LED printer has been known as an electrophotographic printer that forms and transfers an image by shining light onto a charged drum. This LED printer uses an LED array as a head for optical writing on a photosensitive drum. The LED array is generally composed of a plurality of light emitting diode array chips in which a large number of light emitting diodes are integrated. These multiple array chips (LED
The elements are mounted on a mount board (mount board) in a state in which the surface opposite to the light emitting part is in contact with a conductive layer formed on the board.

【発明が解決しようとする課題】[Problem to be solved by the invention]

しかしながら、従来のLEDプリンタヘッドに使用され
るLEDアレイは、前述のように前記アレイチップ(L
ED素子)の発光部と反対側の面のみが導電層を介して
マウント基板に接しているため、LED素子の発光時に
生じる熱は前記発光部と反対側の面のみを中心に放熱さ
れることになり、放熱の効率が悪いという問題があった
。 また前記マウント基板上に複数個のLED素子を並べる
場合に、それらをマウント基板上で正確に位置ぎめする
ことが困難であるという問題があっIこ。 本発明は、このような従来の技術の問題点に着目してな
されたものであり、LED素子の発光時に発生する熱を
効率的に放出することができるLEDアレイチップ取り
付け用基板、およびこのようなLEDアレイチップ取り
付け用基板を使用したLEDアレイを提供することを目
的とする。 また本発明は、複数個のLED素子を基板上に取り付け
するときに各LED素子をマウント基板上に正確に位置
ぎめすることができるLEDアレイチップ取り付け用基
板、およびこのような基板を使用したLEDアレイを提
供することを目的とする。
However, the LED array used in the conventional LED printer head is limited to the array chip (L) as described above.
Since only the surface of the LED element opposite to the light emitting part is in contact with the mount substrate via the conductive layer, the heat generated when the LED element emits light is radiated only from the surface opposite to the light emitting part. This caused the problem of poor heat dissipation efficiency. Furthermore, when arranging a plurality of LED elements on the mount substrate, there is a problem in that it is difficult to accurately position them on the mount substrate. The present invention has been made by focusing on the problems of the conventional technology, and provides an LED array chip mounting substrate that can efficiently dissipate heat generated when LED elements emit light, and a substrate for mounting such an LED array chip. An object of the present invention is to provide an LED array using a substrate for mounting an LED array chip. The present invention also provides an LED array chip mounting board that allows each LED element to be accurately positioned on the mounting board when a plurality of LED elements are mounted on the board, and an LED array chip mounting board that uses such a board. The purpose is to provide an array.

【課題を解決するための手段】[Means to solve the problem]

本発明に係るLEDアレイチップ取り付け用基板は、複
数個の発光ダイオードアレイチップが収容可能な溝と、
この溝の側面および底面に固定された導電層とを含むこ
とを特徴とするものである。 また本発明に係るLEDプリンタヘッド用のしEDアレ
イは、複数の発光ダイオードがそれぞれ集積化された複
数個の発光ダイオードアレイチップと、前記複数個の発
光ダイオードアレイチップが取り付けられ、前記複数個
の発光ダイオードアレイチップを収容可能な溝で且つそ
の側面および底面に導電層が固定された溝が形成されて
いる基板とを含むことを特徴とするものである。
The LED array chip mounting substrate according to the present invention includes a groove capable of accommodating a plurality of light emitting diode array chips;
It is characterized by including a conductive layer fixed to the side and bottom surfaces of the groove. Further, an ED array for an LED printer head according to the present invention includes a plurality of light emitting diode array chips in which a plurality of light emitting diodes are integrated, and the plurality of light emitting diode array chips are attached to the plurality of light emitting diode array chips. The device is characterized in that it includes a substrate having a groove capable of accommodating a light emitting diode array chip and having a conductive layer fixed to the side and bottom surfaces thereof.

【作用】[Effect]

このような特徴を有する本発明によれば、発光ダイオー
ドアレイチップの側面および底面が前記溝の側面および
底面にそれぞれ固定された導電層に接触するようになっ
ているので、発光ダイオドの発光時に生じる熱の取り出
し面積が従来よりも増すことになり、前記熱を効率よく
取り除けるようになる。 また、本発明によれば、基板に複数個の発光ダイオード
アレイチップを取り付けるときに、前記溝の中で前記発
光ダイオードアレイチップを並べればよいので、発光ダ
イオードアレイチップの正確な位置合わせが容易となる
According to the present invention having such characteristics, the side and bottom surfaces of the light emitting diode array chip are brought into contact with the conductive layers fixed to the side and bottom surfaces of the groove, respectively. The heat extraction area is increased compared to the conventional case, and the heat can be efficiently removed. Further, according to the present invention, when attaching a plurality of light emitting diode array chips to a substrate, it is only necessary to line up the light emitting diode array chips in the groove, so that accurate positioning of the light emitting diode array chips is facilitated. Become.

【実施例】 以下本発明の一実施例を図面を参照して説明する。 第1図は本発明のl実施例に係る、LEDアレイチップ
が実装されたマウントボードを示す平面図、第2図は第
1図の■−■線断面図である。 マウントボード(マウント基板)1には、その中央に溝
5が形成されている。この溝5の幅および深さは、各発
光ダイオードアレイチップ2が収納できるように、前記
アレイチップ2の輻および厚さよりもやや大きめに形成
されている。また溝5の側面および底面には、導電層3
が導電性接着剤4を介して固定されている。 前記マウントボード1の溝5には、複数個のアレイチッ
プ2が、各アレイチップ2の両側面およびその発光部と
反対側の面がそれぞれ前記溝5の両側面および底面に形
成された導電層と接触するように並べられた状態で、実
装されている。 なお、第2図の各アレイチップ2の上面には個別の電極
が形成されており、また各アレイチップ2の側面および
底面に接触している導電層3は各アレイチップ2に共通
の電極となっている。 以上のように第1〜2図に示すLEDアレイチップ実装
用のマウントボード1によれば、アレイチップ2の両側
面および底面が前記溝1内の導電層3に接触しているの
で、従来のようにアレイチップ2の底面のみがマウント
ボードlに接触しこの底面のみを中心に放熱される場合
と比較して、発光ダイオードの発光時の熱の取り出し面
積が増し、熱の除去か効率的に付火るようになる。また
本実施例では、マウントボード1へのアレイチップ2の
実装時には溝5の中にアレイチップ2を並べるようにす
ればよいので、従来のようにマウントボードの上面でア
レイチップ2を並べるやり方と比較して、アレイチップ
2の位置合わせの範囲が狭くなり細かな位置合わせが可
能となる。 また第3図は本発明の他の実施例を示す部分斜視図、第
4図は第3図のTV−IV線断面図である。 これらの図中、符号10はマウントボード、11はこの
マウントボード10の中央に形成された溝、12はこの
溝11の底面および側面に導電性接着剤(図示せず)を
介して形成された導電層、13は前記溝11内にその底
面および側面が前記導電層12と接触するように埋め込
まれたLEDアレイチップ、14はLEDアレイチッチ
ッ3上に形成された各LEDの上部電極、15は外付け
電極16と上部電極14とを接続するための電流導入用
ワイヤ、17は各LEDの発光面、18は各LEDアレ
イチップ13の下面に形成され導電層12と電気的に接
続される下部電極である。また前記下部電極18および
導電層12は各LEDアレイデツプ13の共通電極とな
っている。この他の実施例においては、前記導電層12
は、各L E Dアレイ、チップ13の底面および側面
に接触しているので、各LEDの発光時に生じる熱がこ
の導電層12を介して効率的に放出される。よって、こ
の他の実施例によっても、前記第1〜2図の実施例1こ
ついて述べたのと同様の効果が奏されるようになる。 なお本発明では前記導電層はマウントボードの溝に導電
性接着剤を介することによって固定させており、このと
き溝と導電層との間から導電性接着剤がはみ出すことが
考えられるが、これは溝の形状を変化させることで防ぐ
ことができる。 更に、本発明のマウントボードに、本発明のしED素子
(アレイチップ)、LED素子駆動用の駆動素子および
LED禁子用レンズを埋め込むことも可能であり、これ
によりコンパクトなLEDプリンタへラドを修製するこ
とができるようになる。
[Embodiment] An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a plan view showing a mount board on which an LED array chip is mounted according to the first embodiment of the present invention, and FIG. 2 is a sectional view taken along the line ■--■ in FIG. A groove 5 is formed in the center of the mount board (mount board) 1. The width and depth of this groove 5 are formed to be slightly larger than the radius and thickness of the array chip 2 so that each light emitting diode array chip 2 can be accommodated therein. Further, a conductive layer 3 is provided on the side and bottom surfaces of the groove 5.
are fixed via a conductive adhesive 4. A plurality of array chips 2 are arranged in the groove 5 of the mount board 1, and conductive layers are formed on both sides of each array chip 2 and on the side opposite to the light emitting part thereof, respectively. They are mounted in such a way that they are in contact with each other. Note that individual electrodes are formed on the top surface of each array chip 2 in FIG. It has become. As described above, according to the mount board 1 for mounting an LED array chip shown in FIGS. Compared to the case where only the bottom surface of the array chip 2 contacts the mount board l and heat is dissipated only from this bottom surface, the area for extracting heat when the light emitting diode emits light increases, making heat removal more efficient. It starts to catch fire. Furthermore, in this embodiment, when mounting the array chips 2 on the mount board 1, it is sufficient to arrange the array chips 2 in the groove 5, which is different from the conventional method of arranging the array chips 2 on the top surface of the mount board. In comparison, the range of alignment of the array chip 2 is narrower, allowing fine alignment. 3 is a partial perspective view showing another embodiment of the present invention, and FIG. 4 is a sectional view taken along the line TV-IV in FIG. 3. In these figures, numeral 10 is a mount board, 11 is a groove formed in the center of this mount board 10, and 12 is a groove formed on the bottom and side surfaces of this groove 11 via a conductive adhesive (not shown). 13 is an LED array chip embedded in the groove 11 so that its bottom and side surfaces are in contact with the conductive layer 12; 14 is an upper electrode of each LED formed on the LED array chip 3; 15 is a conductive layer; A current introduction wire for connecting the external electrode 16 and the upper electrode 14; 17 is the light emitting surface of each LED; 18 is a lower part formed on the lower surface of each LED array chip 13 and electrically connected to the conductive layer 12; It is an electrode. Further, the lower electrode 18 and the conductive layer 12 serve as a common electrode for each LED array depth 13. In other embodiments, the conductive layer 12
are in contact with the bottom and side surfaces of each LED array and chip 13, so that the heat generated when each LED emits light is efficiently dissipated through this conductive layer 12. Therefore, the same effects as those described in connection with the first embodiment shown in FIGS. 1 and 2 can be obtained also in this other embodiment. In addition, in the present invention, the conductive layer is fixed to the groove of the mounting board by using a conductive adhesive, and at this time, it is possible that the conductive adhesive protrudes from between the groove and the conductive layer. This can be prevented by changing the shape of the groove. Furthermore, it is also possible to embed the ED element (array chip) of the present invention, a drive element for driving the LED element, and a lens for an LED locking element of the present invention in the mount board of the present invention, thereby making it possible to mount the ED element (array chip) of the present invention into a compact LED printer. It will be possible to repair it.

【発明の効果】【Effect of the invention】

以上のように本発明によれば、発光ダイオードアレイチ
ップの側面および底面が前記溝の側面および底面にそれ
ぞれ固定された導電層に接触するようになっているので
、発光ダイオードの発光時に生じる熱の取り出し面積が
従来よりも増すことになり、前記熱を効率よく取り除け
るようになる。 また本発明によれば、基板に複数個の発光ダイオードア
レイチップを実装するときに、前記溝の中で前記発光ダ
イオードアレイチップを並べればよいので、発光ダイオ
ードアレイチップの正確な位置合わせが容易となる。
As described above, according to the present invention, the side and bottom surfaces of the light emitting diode array chip are brought into contact with the conductive layers fixed to the side and bottom surfaces of the groove, respectively, so that heat generated when the light emitting diodes emit light is removed. The extraction area becomes larger than before, and the heat can be efficiently removed. Further, according to the present invention, when mounting a plurality of light emitting diode array chips on a substrate, it is only necessary to line up the light emitting diode array chips in the groove, making it easy to accurately align the light emitting diode array chips. Become.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一寅施例に係る、LEDアレイチップ
が実装されたマウントボードを示す平面図、第2図は第
1図の1−n線断面図、第3図は本発明の他の実施仰を
示す部分斜視図、第4図は第3図のN−IV線断面図で
ある。 1.10:マウントボード、 2.13:発光ダイオードアレイチップ、3. :導電層、 :導電性接着剤、 5、 :溝。
FIG. 1 is a plan view showing a mount board on which an LED array chip is mounted according to one embodiment of the present invention, FIG. 2 is a sectional view taken along line 1-n in FIG. 1, and FIG. FIG. 4 is a partial perspective view showing another embodiment, and FIG. 4 is a sectional view taken along the line N-IV in FIG. 3. 1.10: Mount board, 2.13: Light emitting diode array chip, 3. : Conductive layer, : Conductive adhesive, 5, : Groove.

Claims (1)

【特許請求の範囲】 1、複数の発光ダイオードがそれぞれ集積化された複数
個の発光ダイオードアレイチップを収容可能な溝と、こ
の溝の側面および底面に固定された導電層とを含むこと
を特徴とする発光ダイオードアレイチップ取り付け用基
板。 2、請求項1記載の基板において、前記溝は、基板のほ
ぼ中央部に形成されていることを特徴とする発光ダイオ
ードアレイチップ取り付け用基板。 3、請求項1記載の基板において、前記導電層は、導電
性接着剤を介して前記溝に固定されていることを特徴と
する発光ダイオードアレイチップ取り付け用基板。 4、請求項1記載の基板において、前記溝は、前記発光
ダイオードチップの厚さとほぼ等しい深さを有するよう
に形成されていることを特徴とする発光ダイオードアレ
イチップ取り付け用基板。 5、請求項1記載の基板において、前記溝の底面は、前
記各発光ダイオードアレイチップの発光部と反対側の面
に対向していることを特徴とする発光ダイオードアレイ
チップ取り付け用基板。 6、請求項1または5記載の基板において、前記各発光
ダイオードアレイチップの側面および底面は、前記導電
層と接触していることを特徴とする発光ダイオードアレ
イチップ取り付け用基板。 7、複数の発光ダイオードが集積化された複数個の発光
ダイオードアレイチップと、 前記複数個の発光ダイオードアレイチップが取り付けら
れ、前記複数個の発光ダイオードアレイチップを収容可
能な溝で且つその側面および底面に導電層が固定された
溝が形成されている基板とを含むことを特徴とする発光
ダイオードプリンタヘッド用の発光ダイオードアレイ。 8、請求項7記載の発光ダイオードアレイにおいて、前
記各発光ダイオードアレイチップの側面および底面は、
前記導電層と接触していることを特徴とする発光ダイオ
ードアレイ。
[Claims] 1. A groove capable of accommodating a plurality of light emitting diode array chips in which a plurality of light emitting diodes are integrated, respectively, and a conductive layer fixed to the side and bottom surfaces of the groove. A board for mounting a light emitting diode array chip. 2. The substrate for attaching a light emitting diode array chip according to claim 1, wherein the groove is formed substantially in the center of the substrate. 3. The substrate for mounting a light emitting diode array chip according to claim 1, wherein the conductive layer is fixed to the groove via a conductive adhesive. 4. The substrate for mounting a light emitting diode array chip according to claim 1, wherein the groove is formed to have a depth substantially equal to the thickness of the light emitting diode chip. 5. The substrate for mounting a light emitting diode array chip according to claim 1, wherein the bottom surface of the groove faces a surface opposite to a light emitting section of each of the light emitting diode array chips. 6. The substrate for mounting a light emitting diode array chip according to claim 1 or 5, wherein a side surface and a bottom surface of each of the light emitting diode array chips are in contact with the conductive layer. 7. a plurality of light emitting diode array chips in which a plurality of light emitting diodes are integrated; a groove to which the plurality of light emitting diode array chips are attached and capable of accommodating the plurality of light emitting diode array chips; 1. A light emitting diode array for a light emitting diode printer head, comprising: a substrate having a groove formed on the bottom surface of which a conductive layer is fixed. 8. The light emitting diode array according to claim 7, wherein the side and bottom surfaces of each of the light emitting diode array chips are
A light emitting diode array, characterized in that it is in contact with the conductive layer.
JP2202848A 1990-07-31 1990-07-31 Substrate for mounting light-emitting diode array chip and light-emitting diode array Pending JPH0487383A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2202848A JPH0487383A (en) 1990-07-31 1990-07-31 Substrate for mounting light-emitting diode array chip and light-emitting diode array

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2202848A JPH0487383A (en) 1990-07-31 1990-07-31 Substrate for mounting light-emitting diode array chip and light-emitting diode array

Publications (1)

Publication Number Publication Date
JPH0487383A true JPH0487383A (en) 1992-03-19

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP2202848A Pending JPH0487383A (en) 1990-07-31 1990-07-31 Substrate for mounting light-emitting diode array chip and light-emitting diode array

Country Status (1)

Country Link
JP (1) JPH0487383A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6844570B2 (en) * 2001-04-11 2005-01-18 Nihon Kessho Kogaku Co., Ltd. Component of a radiation detector comprising a substrate with positioning structure for a photoelectric element array

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6844570B2 (en) * 2001-04-11 2005-01-18 Nihon Kessho Kogaku Co., Ltd. Component of a radiation detector comprising a substrate with positioning structure for a photoelectric element array
US7301214B2 (en) 2001-04-11 2007-11-27 Nihon Kessho Kogaku Co., Ltd. Component of a radiation detector comprising a substrate with positioning structure for a photoelectric element array

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