JPH0486186A - Blanking shaping circuit - Google Patents

Abstract

PURPOSE:To completely restore a blanking signal by providing a comparing means which compares a digital picture signal and a reference signal indicating the blanking level with each other and an error correcting means which detects and corrects the error of the blanking level included in the output of the comparing means. CONSTITUTION:A reference signal N having the same value N as blanking level data multiplexed in picture data 42 is inputted to a comparator 1. When picture data 42 and the blanking level N coincide with each other as the result of comparison, an output signal 46 of the level N is generated and is supplied to a flip flop F/F 2 to set it to the high level, and a blanking signal 43 to a counter 3 and a picture processing device is outputted. The counter 3 is counted up by a clock signal 45 only when the blanking signal 43 is in the high level. Width M of the blanking period is preliminarily set by a reference signal M, and carry is generated at arrival at M after the start of counting and is outputted to an inverter 4, and the F/F 2 and the counter 3 are cleared by a reset signal 47.

Description

Detailed Description of the Invention [Field of Industrial Application] The present invention relates to a blanking shaping circuit in a receiving side image processing device in an image transmission system in which blanking level data is multiplexed to a digital image signal on the transmitting side and transmitted/received. Use it for.

〔overview〕

The present invention provides a blanking shaping circuit that separates and outputs a blanking signal multiplexed with a digital image signal, so that even if an error occurs in the blanking signal during transmission,
By providing means for correcting this, the blanking signal can be completely restored at any time.

[Conventional technology]

Conventionally, in a system in which blanking level data is multiplexed with a digital image signal on the transmitting side and transmitted/received, blanking occurs in an image processing device on the receiving side as shown in FIG. In the transmitting side device 20, an input signal 41 as a digital image signal is converted to an analog/digital converter (A/D) 2.
1, the analog signal is converted into a digital signal. The blanking detector 24 obtains a blanking control signal representing a blanking period in synchronization with the human input signal 41 and outputs it to the selector 23 . The black clip circuit 22 outputs the digital image signal from the analog-to-digital converter 21 to the selector 2 so that the pedestal level is the minimum value.
Output to 3. The selector 23 multiplexes the blanking level onto the digital image signal and transmits it as image data 42 by selecting a value N smaller than the pedestal level only during the blanking period using the blanking control signal.

In the receiving device 30, the blanking period of the transmitted image data 42 is detected by comparing the multiplexed blanking level values N in the comparator 31 forming the blanking shaping circuit 10. A blanking signal 43 is obtained and supplied to the image processing device 32. The premise that the blanking period can be detected only by the comparator 31 is that no error occurs in the image data 42. Finally, the image processing device 32 performs image processing according to the input blanking signal 43 and outputs an output signal 44.

[Problem to be solved by the invention]

The conventional blanking shaping circuit described above is based on the assumption that the transmitted digital image signal will not make any errors during transmission, so if an error occurs, the blanking signal cannot be completely restored. there were.

An object of the present invention is to provide a blanking shaping circuit that can completely restore a blanking signal even if an error occurs during transmission of a digital image signal by eliminating the above-mentioned drawbacks.

[Means to solve the problem]

The present invention provides a blanking shaping circuit that separates and outputs a blanking signal multiplexed on a digital image signal.
The present invention is characterized by comprising a comparison means for comparing the digital image signal with a reference signal representing a blanking level, and an error correction means for detecting and correcting an error in the blanking level contained in the output of the comparison means. .

[Effect]

The error correction means detects an error during transmission of the blanking level by comparing the output of the comparator with, for example, a reference signal representing the number of blanking signals, and detects an error during transmission of the blanking level by comparing the output of the comparator with a reference signal representing the number using, for example, a flip-flop. Correct this by holding the duration of the signal at a blocking level.

Therefore, even if an error occurs in the blocking signal during transmission, it can be completely restored.

〔Example〕

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing a first embodiment of the present invention.

The blanking shaping circuit 10a of the bookcase-embodiment is a blanking shaping circuit that separates and outputs a blanking signal 43 multiplexed with image data 42 as a digital image signal. 42 and a reference signal N representing the blanking level N, and a comparator 1 as a comparison means for comparing the reference signal N representing the blanking level N. Counting is controlled by a flip-flop (F/F) 2 set by an output signal 46 from the flip-flop 2, a blanking signal 43 output from the flip-flop 2, and a manually inputted clock signal 45 is used for input blanking. It includes a counter 3 that counts according to a reference signal M representing the width M of a period, and an inverter 4 that inverts the output of the counter 3 and generates a reset signal 47 that resets the flip-flop 2 and the counter 3.

Next, the operation of the bookcase embodiment will be explained.

The transmitted image data 42 is input to one side of the comparator 1. A reference signal N having the same value N as the blanking level data multiplexed on the image data 42 is input to the other side of the comparator 1. The value N is smaller than the pedestal level, for example, in the bookcase embodiment, N=55.

In comparator 1, image data 42 and blanking level N
=55, and if they match, an output signal 46 that becomes N level is generated and supplied to the flip-flop 2.

Flip-flop 2 is driven high by output signal 46.
level, and outputs a blanking signal 43 to the counter 3 and the image processing device. Since the blanking signal 43 from the flip-flop 2 is input to the enable terminal of the counter 3, the blanking signal 43 is "
Counting is performed using the clock signal 45 only when the clock signal is at the "high" level. Further, the width M of the blanking period is set in advance using a reference signal M, and when the width M reaches M after the start of counting, a carry is generated and output to the inverter 4.

The inverter 4 inverts the output signal from the counter 3 and outputs it as a reset signal 47 for the flip-flop 2 and counter 3. Flip-flop 2 receives reset signal 47
Cleared when becomes "low" level. Since the counter 3 also uses an asynchronous clear counter in the second embodiment, it is cleared when the reset signal 47 is at the 10'' level.

The above operation will be explained with reference to the operation waveform diagram in FIG.

In this example, the case where M=7 is set. The image data 42 is input as A-Nl, N2, and N3. N1
~N5 indicates the same value as N. The output signal 46 of comparator 1 is "only" when N1, N2, N3 and N4, N5.
"High" level. B and C are the parts where an error occurred during transmission. When output signal 46 first rises, flip-flop 2 is set and blanking signal 4
3 is a "high" level.

The counter 3 is initially cleared to "0", and the clock signal 4 is cleared only while the blanking signal 43 is at the "high" level.
It is counted by 5. The result is 0, 1, as shown in the figure.
It becomes 25.6, and since it is M-7, it becomes 0 to 6 and the value is 6.
Outputs a carry when . The inverter 4 inverts the carry and becomes a reset signal 47, which clears the flip-flop 2 and the counter 3.

In this way, even if an error occurs in the blanking level multiplexed to the image data 42, the blanking signal 43 to the image processing device can be faithfully restored. This can be clearly seen by comparing it with the conventional blanking signal 43 shown at the bottom of FIG.

FIG. 3 is a block diagram showing a second embodiment of the present invention.

The blanking shaping circuit 10b of the second embodiment detects and corrects errors in the blanking signal from the output signal 46 of the comparator 11 without using the reference signal M, which is a feature of the present invention. It is configured so that it can be done. That is, a flip 70 with enable (E-F/F) 12 operates in response to a control signal 49 and holds image data 42 in response to a clock signal 45, and an output signal 46.
A flip-flop (F/F) generates a control signal 49 from
) 13a and 13b, an inverter 14, a delay circuit 15, a selector 16 that selects and outputs either the image data 42 or the output signal 50 of the enable flip-flop 12 according to the control signal 49, and the output signal 51 of the selector 16. and a comparator 17 that compares the value N based on the reference signal N and outputs a blanking signal 43.

Next, the operation of the second embodiment will be explained.

The transmitted image data 42 is input to the comparator 11, the enable flip-flop 12, and the selector 16, respectively. The clock signal 45 is input to the enable flip-flop 12. A reference signal N having a value N representative of the blanking level is input to one of the comparators 11 and 17. This value N is the same value as N set on the transmitting side, and is a value smaller than the pedestal level.

For example, in this second embodiment, it is set to N-55.

The comparator 11 compares the image data 42 and the blanking level N.
=55, and if they match, an output signal 46 for controlling blanking that goes to a "high" level, for example, is generated and output to the flip-flop 13a and the inverter 14. Inverter 14 inverts this output signal 46 and supplies it to flip-flop 13b.

The flip-flop 13a is activated by the output signal 46.
Output signal 48 set to high level
is manually applied to the clear terminal of flip-flop 13b. The flip-flop 13b is set by the inverted signal of the output signal 46 after the output signal 48 becomes "high" level, and the flip-flop 13b with an enable and the selector 16
and outputs a control signal 49 to the delay circuit 15. The delay circuit 15 delays the control signal 49 and outputs the flip-flop 1.
3a clear signal is generated.

Since the control signal 49 is input to the enable terminal of the enable flip-flop 12, it operates to hold the previous value while the control signal 49 is at the "high" level, and outputs a signal 50 to one of the selectors 16. Enter. Selector 1
6 outputs the output signal 50 and the image data 4 by the control signal 49.
2 to generate an output signal 51 and input it to the comparator 17 manually. The comparator 17 compares the output signal 51 and the blanking level N, and when they match, generates a blanking signal 43 to the image processing device as a "high" level.

The above operation will be explained with reference to the operation waveform diagram in FIG.

The image data 42 is input as A-Nl・N2,
N1-N5 is the same as blanking level N. Further, B-C represents a portion where an error occurred during transmission. The comparator 11 compares the image data 42 and the blanking level N, and generates an output signal 46 that becomes a "high" level when they match. Flip-flop 13a is set by output signal 46 and produces an 8-power signal 48. The flip-flop 13b outputs a control signal 49 which is set to a "high" level by the inverted signal of the output signal 46 when the output signal 48 is at a high level. In other words, it operates at the falling edge of the output signal 46.

The enable flip-flop 12 is controlled by a control signal 49, and normally samples by the clock signal 45, but when the control signal 49 reaches the 1 high level, it does not sample and holds the previous value. In this example, the output signal 50 holds N3 as shown.

The selector 16 switches between the output signal 50 and the image data 42 using a control signal 49 to produce an output signal 51.

Output signal 5 holding N3 in B-C portion of image data 42
Since 0 is selected, the output signal 51 becomes a signal without error during the blanking period from N1 to N5.

The comparator 17 compares the output signal 51 and the blanking level N, generates a blanking signal 43 that becomes a "high" level when they match, and outputs it to the image processing device.

In this way, even if an error occurs in the blanking level multiplexed to the image data 42, the blanking signal 43 to the image processing device can be faithfully restored. This can be clearly seen by comparing it with the conventional blanking signal 43 shown at the bottom of FIG.

〔Effect of the invention〕

As explained above, even if an error occurs in the value of the blanking level multiplexed to the transmitted image data, the present invention prevents the error part from appearing in the directly shaped blanking signal. This has the effect of faithfully restoring the transmitted blanking signal.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a first embodiment of the present invention. FIG. 2 is a diagram of its operating waveforms. FIG. 3 is a block diagram showing a second embodiment of the present invention. FIG. 4 is a diagram of its operating waveforms. FIG. 5 is a block diagram showing a conventional system. 1.11.17.31. --Comparator, 2.13a,
13b-7 Lip-flop (F/F), 3... Counter, 4.14... Inverter, 10, IOa,
10b...Blanking shaping circuit, 12...Flip-flop with enable (E-F/F), 15...
Delay circuit, 16.23...Selector, 20...Sending side device, 21...Analog-digital converter (A/D)
, 22... Black clip circuit, 24... Blanking detector, 30... Receiving side device, 32... Image processing device, 41... Input signal, 42... Image data, 43... ...Blanking signal, 44.46.48.
50.51... Output signal, 45... Clock signal,
47...Reset signal, 49...Control signal, N, M
...Reference signal.

Claims (1)

[Claims] 1. In a blanking shaping circuit that separates and outputs a blanking signal multiplexed on a digital image signal, a comparison means for comparing the digital image signal with a reference signal representing a blanking level; 1. A blanking shaping circuit comprising: error correction means for detecting and correcting blanking level errors contained in the output of the means.