JPH0484128A - Optical demultiplexer - Google Patents

Optical demultiplexer

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Publication number
JPH0484128A
JPH0484128A JP19964590A JP19964590A JPH0484128A JP H0484128 A JPH0484128 A JP H0484128A JP 19964590 A JP19964590 A JP 19964590A JP 19964590 A JP19964590 A JP 19964590A JP H0484128 A JPH0484128 A JP H0484128A
Authority
JP
Japan
Prior art keywords
optical
demultiplexer
branching
gate switch
gate switches
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP19964590A
Other languages
Japanese (ja)
Other versions
JP2901321B2 (en
Inventor
Akira Ajisawa
味澤 昭
Kiichi Hamamoto
貴一 濱本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
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Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP2199645A priority Critical patent/JP2901321B2/en
Publication of JPH0484128A publication Critical patent/JPH0484128A/en
Application granted granted Critical
Publication of JP2901321B2 publication Critical patent/JP2901321B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

PURPOSE:To form the above optical demultiplexer which is smaller in size, is more highly integrated and operates on lower voltages by integrating optical branching circuits, optical gate switches formed by using the electricity absorbing effect of semiconductors and optical amplifiers. CONSTITUTION:This optical demultiplexer is constituted by integrating 1Xn optical branching circuits 14, optical waveguides of a pin structure optically coupled to respective branching destinations, i.e., the optical gate switches 15 formed by using the electricity absorbing effect of the semiconductors, further the optical amplifiers 16 optically coupled to that. The optical gate switches 15 as small as 200mum element length and have excellent characteristics of >=15dB extinction ratio at about 3V voltage and, therefore, the optical demultiplexer which operates on the sufficiently low voltage is obtd. Further, the series connection of the optical gate switches 15 is obviated even if the number of the optical branches is structurally increased. Since the light power attenuated by the optical branching is sufficiently made up by the optical amplifiers 16, the expansion of the number of the branches is extremely easy. The optical demultiplexer which is smaller in size, is more highly integrated and operates on the lower voltages is obtd. in this way.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、超高速光通信システム、光交換システム等に
用いられる光デマルチフレフサに関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an optical demultiplexer used in ultrahigh-speed optical communication systems, optical switching systems, and the like.

〔従来の技術〕[Conventional technology]

近年の光通信システム、光交換システムの発展に伴い、
超高速の光パルス列あるいは、時分割光信号を低速に落
し信号処理をするための、光デマルチプレクサの実現が
望まれている。このような光デマルチプレクサとしては
、超高速動作は勿論のこと、低電圧動作が可能で、小型
化、集積化が容易であることが要求される。
With the recent development of optical communication systems and optical switching systems,
It is desired to realize an optical demultiplexer that can process ultra-high-speed optical pulse trains or time-division optical signals at low speed. Such optical demultiplexers are required not only to operate at extremely high speeds but also to operate at low voltages, and to be easily miniaturized and integrated.

光デマルチプレクサの例として、芳賀らの試作した1×
4高速光スイツチ/デマルチプレクサが雑誌アイ・イー
・イー・イー・ジャーナル・オブ・ライトウニイブ・テ
クノロジー 1985年、第3巻、116頁に記載され
ている。これはニオブ酸リチウム基板を用い、Y分岐と
非対称X分岐とその間の位相変調を与える光導波路より
なる1×2スイツチを3個集積し1×4スイツチを構成
したものであり、1つの入射光導波路に入った4 G 
b / sの入力光信号I G b / sの光信号と
して各々4つの光導波路より出力する動作を実現してい
る。素子の全長は約40mmと大きく、また動作電圧は
6.6〜133■である。
As an example of an optical demultiplexer, the 1× prototype produced by Haga et al.
A four-speed optical switch/demultiplexer is described in the IEE Journal of Lightweight Technology, 1985, Volume 3, Page 116. This uses a lithium niobate substrate and integrates three 1x2 switches consisting of a Y branch, an asymmetrical X branch, and an optical waveguide that provides phase modulation between them to form a 1x4 switch. 4G entered the wave path
The operation is realized in which the input optical signal IG b/s is outputted from each of the four optical waveguides as an optical signal of b/s. The total length of the element is as large as approximately 40 mm, and the operating voltage is 6.6 to 133 .mu.m.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

従来例では基本エレメントである1×2スイツチの動作
原理としてニオブ酸リチウムの電気光学効果による屈折
率変化を用いているために、かなり長い素子長か必要で
あり、更に動作電圧が比較的高いという問題があった。
In the conventional example, the operating principle of the 1x2 switch, which is the basic element, is the change in refractive index due to the electro-optic effect of lithium niobate, which requires a fairly long element length and also requires a relatively high operating voltage. There was a problem.

従ってこの素子サイズではIX8.lX16などへの拡
張は困難であり、更に20Gb/s、40Gb/sとい
った超高速領域での適用は進行波電極などの複雑な構造
を用いずには実現が難しい。
Therefore, with this element size, IX8. Expansion to lX16 and the like is difficult, and furthermore, application in ultra-high speed regions such as 20 Gb/s and 40 Gb/s is difficult to achieve without using complex structures such as traveling wave electrodes.

本発明の目的は、光分岐回路と半導体の電界吸収効果を
用いた光ゲートスイッチと光増幅器を集積することによ
り、小型化、集積化、低電圧化を図るとともに、光分岐
による損失を補うことができ、更にこれらを高抵抗半導
体基板上に製作することで、光ゲートスイッチ単体の素
子容量を下げ、超高速動作を図ったデマルチプレクサを
提供することにある。
The purpose of the present invention is to achieve miniaturization, integration, and low voltage by integrating an optical branch circuit and an optical gate switch and optical amplifier using the electric field absorption effect of semiconductors, and to compensate for losses caused by optical branching. Furthermore, by manufacturing these on a high-resistance semiconductor substrate, the element capacitance of a single optical gate switch can be reduced, and a demultiplexer capable of ultra-high-speed operation can be provided.

〔課題を解決するための手段〕[Means to solve the problem]

本発明の光デマルチプレクサは、高抵抗半導体基板上に
、一つの入射用の光導波路から入った光信号をn本の光
に分岐する光分岐回路と、前記光分岐回路の各々の分岐
先に光学的に結合する位置関係にあるPIN構造を持つ
半導体光導波路と、前記PINlii造を持つ半導体光
導波路に電界を印加する手段と、前記各々のP I N
il造を持つ半導体光導波路に光学的に結合する位置関
係にある半導体光増幅器を備えることを特徴とする。
The optical demultiplexer of the present invention includes, on a high-resistance semiconductor substrate, an optical branching circuit that branches an optical signal input from one input optical waveguide into n beams, and a branching destination of each of the optical branching circuits. a semiconductor optical waveguide having a PIN structure in a positional relationship for optical coupling; means for applying an electric field to the semiconductor optical waveguide having the PIN structure; and each of the PIN structures.
The present invention is characterized in that it includes a semiconductor optical amplifier positioned to be optically coupled to a semiconductor optical waveguide having an il structure.

〔作用〕[Effect]

本発明はIXnの光分岐回路と、各々の分岐先に光学的
に結合するPIN構造の光導波路、すなわち半導体の電
界吸収効果を用いた光ケートスイッチと、更にそれと光
学的に結合する光増幅器とを集積した構成を採っている
。基本的な動作は、光ゲートスイッチをON状態にした
出力ボートのみに光が出力されるので、光パルス列ある
いは光信号のビットレートに同期させて順番に光ゲート
スイッチをON状態にすることて光デマルチプレクサと
しての動作が実現できる。ここで用いられる光ゲートス
イッチは素子長か200μmと小型で、電圧3■程度で
消光比15dB以上と優れた特性を有している。従って
十分な低電圧で動作する光デマルチプレクサが得られる
。更に構造上、光分岐の数を増やしても光ゲートスイッ
チが直列に接続されることはなく、光分岐による減衰し
た光パワーを光増幅器により十分補うことが可能なので
、分岐数の拡張も非常に容易である。また全体の素子長
は光分岐回路の長さでほぼ決まり、これを最適化するこ
とにより十分な小型化も図れる。電界吸収型の光スィッ
チの速度は素子の容量によって決まり、高抵抗半導体基
板を用いるとにより素子の奇数容量を大幅に低減でき、
40GH2以上の帯域が得られることが、1990年電
子情報通信学会春季全国大会予稿集 4〜294頁で述
べられている。従って本発明による光デマルチプレクサ
は、高抵抗半導体基板上に光分岐回路と電界吸収効果を
用いた光ゲートスイッチ、光増幅器が集積された構成で
あるため、ゲートスイッチのスイッチング速度か非常に
速く、超高速の時系列光信号を処理することが可能で、
更に光パワーワの損失が小さいという特長をもつ。
The present invention comprises an IXn optical branch circuit, an optical waveguide with a PIN structure optically coupled to each branch destination, that is, an optical gate switch using the electric field absorption effect of a semiconductor, and an optical amplifier optically coupled thereto. It has a configuration that integrates. The basic operation is that light is output only to the output boat whose optical gate switch is turned on, so the optical gate switches are turned on in order in synchronization with the optical pulse train or the bit rate of the optical signal. Operation as a demultiplexer can be realized. The optical gate switch used here is small with an element length of 200 μm, and has excellent characteristics such as an extinction ratio of 15 dB or more at a voltage of about 3 cm. Therefore, an optical demultiplexer that operates at a sufficiently low voltage can be obtained. Furthermore, due to the structure, even if the number of optical branches is increased, the optical gate switches are not connected in series, and the optical power attenuated by the optical branches can be sufficiently compensated for by the optical amplifier, so it is very easy to expand the number of branches. It's easy. Furthermore, the overall element length is approximately determined by the length of the optical branch circuit, and by optimizing this, sufficient miniaturization can be achieved. The speed of an electroabsorption type optical switch is determined by the capacitance of the device, and by using a high-resistance semiconductor substrate, the odd capacitance of the device can be significantly reduced.
It is stated in the Proceedings of the 1990 Spring National Conference of the Institute of Electronics, Information and Communication Engineers, pages 4 to 294 that a band of 40 GH2 or more can be obtained. Therefore, since the optical demultiplexer according to the present invention has a configuration in which an optical branch circuit, an optical gate switch using an electric field absorption effect, and an optical amplifier are integrated on a high-resistance semiconductor substrate, the switching speed of the gate switch is very fast. It is possible to process ultra-high-speed time-series optical signals,
Furthermore, it has the feature of low optical power loss.

〔実施例〕〔Example〕

第1図(a>、(b)、(c)は、本発明による光デマ
ルチプレクサの実施例を示す斜視図、及び斜視図中のA
−A’ 、B−B′間の断面図である。ここでは1×4
の場合について示し、光分岐回路としてはY分岐を2段
にしたもの用いた。材料系としては、InGaAsP/
InP系を用い、光分岐回路部と光ゲートスイッチ部で
は導波層波長組成の異なるダブルへテロ(DH)構造の
光導波路を用いた構造で、光増幅器に関しては導波層の
上に活性層を設はエバネッセント波結合の構造を用いた
場合につき説明するが、材料、組成、構造はこれに限定
されるものではなく、InGaAs/InAlAs系、
G a A s / A I G aAs系の材料、更
に多重量子井戸(MQW)i造などを用いてもよい。
FIGS. 1(a), (b), and (c) are perspective views showing an embodiment of the optical demultiplexer according to the present invention, and A in the perspective view.
-A', BB' is a cross-sectional view. Here 1×4
In this case, a two-stage Y branch was used as the optical branch circuit. As for the material system, InGaAsP/
Using InP, the optical branch circuit section and optical gate switch section use a double-hetero (DH) optical waveguide structure with different waveguide layer wavelength compositions, and the optical amplifier has an active layer on top of the waveguide layer. The explanation will be based on the case where an evanescent wave coupling structure is used, but the material, composition, and structure are not limited to this, and include InGaAs/InAlAs system,
GaAs/AIGaAs-based materials, multiple quantum well (MQW) structures, etc. may also be used.

まず第1図を用いて本発明の実施例の製作方法について
簡単に説明する。高抵抗InP基板上にn”−InPク
ラッド層2を0.5μm、iI nGaAsP (バン
ドギャップ波長1.45μm)光吸収層3を0.3μm
、p”−I nPクラッド層4を0.8μmをMOVP
E法により順次成長し、光ゲートスイッチとなる層構造
をまず成長する。次に光分岐回路が形成される部分を高
抵抗InP基板1が表面に出るまでエツチングにより落
とし、エツチングされた部分にのみ1−InPクラッド
層5を0.5.czm、1−InGaAsP(バンドギ
ャップ波長1.1μm)ガイド層6をQ、3μm、1−
InPクラッド層7を08μmをMOVPE法により選
択的に成長する。
First, a manufacturing method of an embodiment of the present invention will be briefly explained using FIG. On a high-resistance InP substrate, the n''-InP cladding layer 2 is 0.5 μm thick, and the iI nGaAsP (band gap wavelength 1.45 μm) light absorption layer 3 is 0.3 μm thick.
, MOVP the p''-I nP cladding layer 4 to 0.8 μm.
The layers are sequentially grown using the E method, and a layered structure that becomes an optical gate switch is first grown. Next, the portion where the optical branch circuit is to be formed is removed by etching until the high-resistance InP substrate 1 appears on the surface, and a 1-InP cladding layer 5 of 0.5 mm is etched only on the etched portion. czm, 1-InGaAsP (band gap wavelength 1.1 μm) guide layer 6 is Q, 3 μm, 1-
An InP cladding layer 7 is selectively grown to a thickness of 08 μm by MOVPE.

更に光増幅器が形成される部分をi −I nGaAs
P光吸収層3が表面にでるまでエツチングにより落とし
、その上にi−I nGaAsP (バンドギャップ波
長1.55μm)活性層8を0.15μm、p” −1
nPクラッド層9を0.65μmを再びMOVPE法を
用いて選択的に成長する。
Furthermore, the portion where the optical amplifier is formed is made of i-InGaAs.
The P light absorption layer 3 is removed by etching until it appears on the surface, and an i-InGaAsP (band gap wavelength 1.55 μm) active layer 8 is formed on it with a thickness of 0.15 μm and p” −1.
The nP cladding layer 9 is selectively grown again to a thickness of 0.65 μm using the MOVPE method.

これによりほぼB−B’間の断面図(第1図(C))に
示したような構造が形成される。光分岐回路14の1−
InGaAsPガイド層6と光ゲートスイッチ15の1
−InGaAsP光吸収層3と光吸収−3良好な光学的
結合が為され、また光ゲートスイッチ15と光増幅器1
6は共通の1−InGaAsP光吸収層3を光吸収−3
ので光学的結合に関しては問題ない。
As a result, a structure as shown in the cross-sectional view (FIG. 1(C)) approximately along line BB' is formed. 1- of the optical branch circuit 14
InGaAsP guide layer 6 and optical gate switch 15
- InGaAsP light absorption layer 3 and light absorption layer 3 have good optical coupling, and optical gate switch 15 and optical amplifier 1
6 is a common 1-InGaAsP light absorption layer 3 that absorbs light -3
Therefore, there is no problem with optical coupling.

次に、光分岐回路及び光ゲートスイッチ、光増幅器形成
のため、SiO□マスクパターンを通常のフォトリソグ
ラフィー法により形成する。この時のストライプの幅は
1.5μmである。この5i02マスクを用い、n”−
InPクラッド層2、及び1−InPクラッド層5が表
面に露出するまでエツチングし、まずハイメサ構造の光
導波路パターンを形成し、その後レジストマスクを用い
、光ゲートスイッチ及び光増幅器の導波路の片側でp側
電極が形成される部分のみ更にn” −InPクラッド
層2をエツチングし、高抵抗InP基板1を露出させる
。レジストマスクを剥離後、先はどの5i02マスクを
、そのまま選択成長用のマスクとして用い高抵抗InP
埋込み層10で全体を埋め込む。この時点で光分岐回路
14は完成し、埋め込み構造の光導波路が形成される。
Next, a SiO□ mask pattern is formed by a normal photolithography method in order to form an optical branch circuit, an optical gate switch, and an optical amplifier. The width of the stripe at this time is 1.5 μm. Using this 5i02 mask, n”-
Etching is performed until the InP cladding layer 2 and 1-InP cladding layer 5 are exposed on the surface, first forming an optical waveguide pattern with a high mesa structure, and then using a resist mask, one side of the waveguide of the optical gate switch and optical amplifier is etched. The n''-InP cladding layer 2 is further etched only in the portion where the p-side electrode will be formed, exposing the high-resistance InP substrate 1. After peeling off the resist mask, use any 5i02 mask as it is as a mask for selective growth. Uses high resistance InP
The entire structure is buried with a embedding layer 10. At this point, the optical branch circuit 14 is completed and an optical waveguide with a buried structure is formed.

光ゲートスイッチ15及び光増幅器16のn側の電極を
取り出すために、導波路のp側電極が形成される部分の
反対側をエツチングにより100μm×400μm程度
の穴を開け、n+−InPクラッド層2を表面に露出さ
せる。次に第1図(c)に示すように、光ゲートスイッ
チ15と光増幅器16間の電気的な分離を採るために両
者の間に溝を設ける。最後にA−A’断面図(第1図(
b))に示すように、光ゲートスイッチ及び光増幅器の
導波路上及び高抵抗InP基板1上に直接高抵抗InP
埋め込み層10がある側(図中では導波路の右側)に光
ゲートスイッチのp側電極11、光増幅器のp側電極1
2を電気的な独立を保ちながら形成し、p側電極11.
12と反対側でn+InPクラッド層2が表面に出てい
る部分にn側電極13を形成し素子は完成する。
In order to take out the n-side electrodes of the optical gate switch 15 and the optical amplifier 16, a hole of about 100 μm x 400 μm is made by etching on the opposite side of the part where the p-side electrode of the waveguide is formed, and the n+-InP cladding layer 2 is etched. exposed on the surface. Next, as shown in FIG. 1(c), a groove is provided between the optical gate switch 15 and the optical amplifier 16 in order to electrically isolate them. Finally, the AA' cross-sectional view (Fig. 1 (
As shown in b)), high resistance InP is directly placed on the waveguide of the optical gate switch and optical amplifier and on the high resistance InP substrate 1.
The p-side electrode 11 of the optical gate switch and the p-side electrode 1 of the optical amplifier are placed on the side where the buried layer 10 is located (on the right side of the waveguide in the figure).
2 while maintaining electrical independence, and the p-side electrode 11.
An n-side electrode 13 is formed on the side opposite to 12 where the n+InP cladding layer 2 is exposed, and the device is completed.

基板は研磨により厚さ約100μm、光ゲートスイッチ
部分の素子長は200μm、光増幅器部分の素子長は4
00μmであり、またp側電極のパッド部の面積は各々
80μmX80μmである。各光ゲートスイッチの間隔
は250μm、光分岐回路のY分岐の分岐角は5度であ
り、光デマルチプレクサとしての素子サイズは9 am
 X 1 amと小さく、従来例の4分の1以下である
The substrate is polished to a thickness of approximately 100 μm, the element length of the optical gate switch portion is 200 μm, and the element length of the optical amplifier portion is 4 μm.
00 μm, and the area of each pad portion of the p-side electrode is 80 μm×80 μm. The interval between each optical gate switch is 250 μm, the branching angle of the Y branch of the optical branch circuit is 5 degrees, and the element size as an optical demultiplexer is 9 am.
It is as small as X 1 am, which is less than a quarter of that of the conventional example.

次にこの実施例の光デマルチプレクサの動作について第
1図、第2図及び第3図を用いて説明する。最初に第1
図を用いて基本的な特性について述べる。
Next, the operation of the optical demultiplexer of this embodiment will be explained using FIGS. 1, 2, and 3. first first
The basic characteristics will be described using diagrams.

入射光の波長を1.55μmとする。光分岐回路14人
入射れた光はY分岐2段を通り4分割され各々の光ゲー
トスイッチに導かれる。Y分岐の分岐角は5度と非常に
小さく、また光分岐回路部でのガイド層6の波長組成は
1.1μmであるため、ここでの分岐部での過剰損失、
吸収損失はほとんどなく、入射光のパワーの減衰はほぼ
分岐によるものだけとなる。光ゲートスイッチの光吸収
層3へ入射された光は、スイッチの逆バイアス電圧が0
■の時は光ゲートスイッチはON状態であるため、ここ
をそのまま通過し次段の光増幅器へと導かれる。光増幅
器には常時電流が注入されており、波長1.55μmの
光はここで十分に増幅され、入射光が4分岐されたこと
による損失は補われ出力される。光吸収層3に逆バイア
ス電圧が印加されると、電界吸収効果により光は吸収さ
れ光ゲートスイッチはOFF状態となる。この時の消光
比(ON−OFF比)は使用波長、光吸収層の波長組成
、吸収層の長さによって決まるが、本実施例の場合では
、電圧3■で消光比15dBが得られ、光ゲートスイッ
チとしては十分な特性が得られている。
The wavelength of the incident light is 1.55 μm. The light incident on the 14 optical branch circuits passes through two Y-branches, is divided into four parts, and is guided to each optical gate switch. The branching angle of the Y branch is very small at 5 degrees, and the wavelength composition of the guide layer 6 at the optical branching circuit section is 1.1 μm, so excessive loss at the branching section,
There is almost no absorption loss, and the attenuation of the power of the incident light is almost solely due to branching. The light incident on the light absorption layer 3 of the optical gate switch is transmitted when the reverse bias voltage of the switch is 0.
In case (2), the optical gate switch is in the ON state, so the light passes through this as it is and is guided to the next stage optical amplifier. A current is constantly injected into the optical amplifier, and the light with a wavelength of 1.55 μm is sufficiently amplified here, and the loss caused by splitting the incident light into four is compensated for and output. When a reverse bias voltage is applied to the light absorption layer 3, light is absorbed by the electric field absorption effect and the optical gate switch is turned off. The extinction ratio (ON-OFF ratio) at this time is determined by the wavelength used, the wavelength composition of the light absorption layer, and the length of the absorption layer, but in the case of this example, an extinction ratio of 15 dB was obtained at a voltage of 3 Sufficient characteristics have been obtained as a gate switch.

次にスイッチング速度について述べる。作用の項でも述
べた様に、電界効果を用いたスイッチのスイッチング速
度あるいは変調帯域△fは素子の静電容量Cによりほぼ
決定され、 △f=1/(πCR) で表される。本発明では高抵抗半導体基板を用い、p側
電極のパッドの下すべて高抵抗半導体層であるため素子
の寄生容量がほとんど無視てき、その結果素子容量が非
常に小さくなる構造である。実施例の場合、素子全体の
容量は0.12pFである。従って、本発明に用いた光
ケートスイッチの変調周波数帯域は50GHz以上であ
り、超高速のスイッチングが可能である。
Next, we will discuss switching speed. As mentioned in the section on operation, the switching speed or modulation band Δf of a switch using a field effect is approximately determined by the capacitance C of the element, and is expressed as Δf=1/(πCR). In the present invention, a high-resistance semiconductor substrate is used, and since the entire area under the pad of the p-side electrode is a high-resistance semiconductor layer, the parasitic capacitance of the element can be almost ignored, resulting in a structure in which the element capacitance is extremely small. In the case of the example, the capacitance of the entire device is 0.12 pF. Therefore, the modulation frequency band of the optical gate switch used in the present invention is 50 GHz or more, and ultra high-speed switching is possible.

次に第2図及び第3図を用いて光デマルチプレクサとし
ての動作を説明する。ここでは40Gb/Sの入射光の
光パルス列を4分割し、4つの10 G b / sの
光パルス列に変換する場合について示す。
Next, the operation of the optical demultiplexer will be explained using FIGS. 2 and 3. Here, a case is shown in which a 40 Gb/s optical pulse train of incident light is divided into four and converted into four 10 Gb/s optical pulse trains.

入射光パルス列は光分岐回路21を通り4分割され各々
同じ時間に光ゲートスイッチ2223.24.25到達
する。第3図には入射光パルス列と各光ゲートスイッチ
に印加する逆バイアス電圧vl〜V4の時間的な関係を
示したもので、光ゲートスイッチをON状態にする、つ
まり逆バイアス電圧をO■にする時間を1ビット分の時
間、25psとし、各々の光ゲートスイッチには、前段
に比べ2Spsずつ遅らせて電気的な信号を与えている
。その結果、第2図に示すように、40 G b / 
sの光パルス列が各々10Gb/S4本の光出力に変換
され出力される。先に説明したように本光ゲートスイッ
チは超高速動作が可能であるため、このように40 G
 b / s程度の光信号を切り出すことは容易である
The incident optical pulse train passes through the optical branching circuit 21 and is divided into four parts, each of which reaches the optical gate switches 2223, 24, and 25 at the same time. Figure 3 shows the temporal relationship between the incident optical pulse train and the reverse bias voltages vl to V4 applied to each optical gate switch. The time required for this is 25 ps, which is the time equivalent to one bit, and an electrical signal is applied to each optical gate switch with a delay of 2 Sps compared to the previous stage. As a result, as shown in Figure 2, 40 Gb/
Each of the s optical pulse trains is converted into four 10 Gb/S optical outputs and output. As explained earlier, this optical gate switch is capable of ultra-high-speed operation, so it
It is easy to extract an optical signal of approximately b/s.

ここでは光分岐回路として7分岐を縦続接続した、1×
4の光デマルチプレクサについて説明したが、同様な構
成で1×8.1×16への拡張も光増幅器により分岐に
よる損失を補うことができるので、十分可能である。こ
の場合光分岐回路部が長くなるが、90度ミラーなどに
より光を垂直に折り返す光分岐回路を用いれば、数關以
内で素子が実現できる。
Here, 7 branches are connected in cascade as an optical branch circuit, 1×
4 optical demultiplexer has been described, but expansion to 1.times.8.1.times.16 with a similar configuration is also fully possible since losses due to branching can be compensated for by optical amplifiers. In this case, the optical branching circuit section becomes long, but if an optical branching circuit that vertically folds the light using a 90-degree mirror or the like is used, the device can be realized within a few steps.

〔発明の効果〕〔Effect of the invention〕

以上詳細に説明したように、本発明によれば超高速動作
が可能な光デマルチプレクサが得られ、将来の超高速光
通信システム、光交換システムの実現に貢献すること大
である。
As described in detail above, according to the present invention, an optical demultiplexer capable of ultra-high-speed operation can be obtained, which will greatly contribute to the realization of future ultra-high-speed optical communication systems and optical switching systems.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(a)、(b)、(c)は本発明の光テマルチプ
レクサの実施例を示す斜視図及び各部の断面図であり、
第2図、第3図は本発明の光デマルチプレクサとしての
動作を説明するための図である。 図において、1は高抵抗InP基板、2はn+InPク
ラッド層、3は1−InGaAsP光吸収層、4.9は
p”−InPクラッド層、5は1−InPクラッド層、
6はi −I nGaAs Pガイド層、7は1−In
Pクラッド層、8はi−I nGaAsP活性層、1o
は高抵抗InP埋め込み層、11.12はp側電極、1
3はnl電極、14.21は光分岐回路、15,22.
23゜24.25は光ゲートスイッチ、16は光増幅器
である。
FIGS. 1(a), (b), and (c) are a perspective view and a sectional view of each part showing an embodiment of the optical multiplexer of the present invention,
FIGS. 2 and 3 are diagrams for explaining the operation of the optical demultiplexer of the present invention. In the figure, 1 is a high-resistance InP substrate, 2 is an n+InP cladding layer, 3 is a 1-InGaAsP light absorption layer, 4.9 is a p''-InP cladding layer, 5 is a 1-InP cladding layer,
6 is i-InGaAs P guide layer, 7 is 1-In
P cladding layer, 8 i-I nGaAsP active layer, 1o
is a high resistance InP buried layer, 11.12 is a p-side electrode, 1
3 is an nl electrode, 14.21 is an optical branch circuit, 15, 22.
23.24.25 is an optical gate switch, and 16 is an optical amplifier.

Claims (1)

【特許請求の範囲】[Claims] 高抵抗半導体基板上に、一つの入射用の光導波路から入
った光信号をn本の光に分岐する光分岐回路と、前記光
分岐回路の各々の分岐先に光学的に結合する位置関係に
あるPIN構造を持つ半導体光導波路と、前記PIN構
造を持つ半導体光導波路に電界を印加する手段と、前記
各々のPIN構造を持つ半導体光導波路に光学的に結合
する位置関係にある半導体光増幅器を備えることを特徴
とする光デマルチプレクサ。
On a high-resistance semiconductor substrate, there is an optical branching circuit that branches an optical signal input from one input optical waveguide into n beams, and a positional relationship that optically couples each branch destination of the optical branching circuit. A semiconductor optical waveguide having a certain PIN structure, means for applying an electric field to the semiconductor optical waveguide having the PIN structure, and a semiconductor optical amplifier positioned to be optically coupled to each of the semiconductor optical waveguides having the PIN structure. An optical demultiplexer comprising:
JP2199645A 1990-07-27 1990-07-27 Optical demultiplexer Expired - Fee Related JP2901321B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2199645A JP2901321B2 (en) 1990-07-27 1990-07-27 Optical demultiplexer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2199645A JP2901321B2 (en) 1990-07-27 1990-07-27 Optical demultiplexer

Publications (2)

Publication Number Publication Date
JPH0484128A true JPH0484128A (en) 1992-03-17
JP2901321B2 JP2901321B2 (en) 1999-06-07

Family

ID=16411299

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2199645A Expired - Fee Related JP2901321B2 (en) 1990-07-27 1990-07-27 Optical demultiplexer

Country Status (1)

Country Link
JP (1) JP2901321B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6531365B2 (en) * 2001-06-22 2003-03-11 International Business Machines Corporation Anti-spacer structure for self-aligned independent gate implantation
JP2017201648A (en) * 2016-05-02 2017-11-09 日本電信電話株式会社 Optical semiconductor element and semiconductor monolithic optical circuit

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59135441A (en) * 1983-12-14 1984-08-03 Hitachi Ltd Optical waveguide switch
JPH01185612A (en) * 1988-01-20 1989-07-25 Kokusai Denshin Denwa Co Ltd <Kdd> Optical modulating element and its manufacture

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59135441A (en) * 1983-12-14 1984-08-03 Hitachi Ltd Optical waveguide switch
JPH01185612A (en) * 1988-01-20 1989-07-25 Kokusai Denshin Denwa Co Ltd <Kdd> Optical modulating element and its manufacture

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6531365B2 (en) * 2001-06-22 2003-03-11 International Business Machines Corporation Anti-spacer structure for self-aligned independent gate implantation
JP2017201648A (en) * 2016-05-02 2017-11-09 日本電信電話株式会社 Optical semiconductor element and semiconductor monolithic optical circuit

Also Published As

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