JPH0480399B2 - - Google Patents

Description

[Detailed description of the invention] The present invention relates to a speech synthesis device.

Conventionally, by utilizing the property that the power spectrum of a speech waveform has frequency components with concentrated energy called formants, several polar circuits in which the formants are approximated by the frequency characteristics of the polar circuits are connected in series, and each pole is A method for synthesizing audio waveforms by controlling the polar frequency and bandwidth of a circuit is known. Furthermore, the above-mentioned speech synthesis is realized using a single chip LSI (Large-Scale Integrated Circuit).
LSI is known. However, the above-mentioned speech synthesis method has the drawback that it is not possible to obtain a synthesized speech quality of sufficiently high quality for unvoiced consonants, nasal sounds, etc., which cannot be sufficiently approximated by only the poles. Furthermore, since the formant (pole) parameter value changes rapidly at the time of transition from the voice portion to the unvoiced portion, it also has the disadvantage that sound quality deteriorates due to the rapid change in the polar frequency value.

SUMMARY OF THE INVENTION An object of the present invention is to provide a speech synthesis device that can generate relatively high-quality synthesized speech using a speech synthesis LSI composed of polar circuits.

The present invention provides a speech synthesis device using a speech synthesis LSI with highly integrated speech synthesis circuits, including a first speech synthesis LSI driven by formant parameter values and sound source parameter values for voiced parts of speech; a second speech synthesis LSI driven by formant parameter values and sound source parameter values for unvoiced portions of speech, and means for supplying a common synchronization signal to the first and second speech synthesis LSIs;
It is characterized by comprising means for generating the sum of the outputs of the first and second speech synthesis LSIs as a new speech synthesis waveform value.

A feature of the present invention is that the sum of the output values of a plurality of speech synthesis LSIs is output as a synthesized speech waveform.

According to the present invention, when only one speech synthesis LSI is used, it is possible to prevent deterioration of sound quality due to abnormalities occurring in the speech synthesis circuit due to sudden changes in the spectral envelope parameter value at the time of transition between voiced and unvoiced, etc. effective.

Next, the present invention will be explained in detail using the drawings. The figure is a block diagram showing one embodiment of the present invention. First, the audio output command data is input to the audio output command input terminal.
1 to the control circuit 2. The control circuit 2 generates address data of the voice to be output according to the voice output command data, and outputs it to the composite data memories A, 3 and the composite data memories B, 6. The synthesis data memory A, 3 outputs the formant parameter value and sound source parameter value for the voiced part of the speech to the speech synthesis LSI-A, 4 according to the address data. Further, the synthesis data memory B, 6 outputs the formant parameter value and sound source parameter value for the unvoiced portion of the speech to the speech synthesis LSI-B, 7 in accordance with the address data. On the other hand, a clock signal generation circuit 5 generates a clock signal for the speech synthesis LSI and supplies it to the speech synthesis LSI-A, 4 and the speech synthesis LSI-B, 7 at the same time. The speech synthesis LSI-A, 4 generates a synthesized waveform according to the formant parameter value and the sound source parameter value for the voiced part, and outputs it to the adder circuit, 8. In addition, speech synthesis LSI-B, 7
generates a synthesized waveform according to the formant parameter value and sound source parameter value for the unvoiced portion, and outputs it to the adder circuit 8. An adder circuit 8 adds the two synthesized waveform values and outputs the result as a new voice synthesized waveform via a synthesized waveform output terminal 9.

In the above explanation, it is assumed that voiced and unvoiced parts are synthesized in parallel, but in addition to this, there are other sounds such as nasal sounds that include zero points in the spectral envelope characteristic and cannot be adequately approximated by only a series-connected polar circuit. It is clear that it can also be effectively used for synthesis.

[Brief explanation of the drawing]

The figure is a block diagram for explaining one embodiment of the present invention. In the figure, 1 is a voice output command input terminal, 2 is a control circuit, 3 is a synthetic data memory A,
4 is a speech synthesis LSI-A, 5 is a clock signal generation circuit, 6 is a synthesis data memory B, and 7 is a speech synthesis LSI.
-B, 8 is an adder circuit, and 9 is a composite waveform output terminal.

Claims (1)

[Claims] 1. In a speech synthesis device using a speech synthesis LSI with highly integrated speech synthesis circuits, a first speech synthesis LSI is driven by formant parameter values and sound source parameter values for voiced parts of speech.
and a second one driven by the formant parameter value and the sound source parameter value for the unvoiced part of the speech.
speech synthesis LSI, and the first and second speech synthesis
A speech synthesis device comprising means for supplying a common synchronization signal to LSIs, and means for generating a new speech synthesis waveform value as a sum of the outputs of the first and second speech synthesis LSIs.