JPH0479540A - Transmission line interface for atm exchange - Google Patents

Abstract

PURPOSE:To integrate a first-in/first-out memory and to make the system small in size by excluding an overhead being additional information on a transmission line from a signal from an opposite station on the transmission line and exchanging only an ATM cell. CONSTITUTION:A cell alignment means 12 uses a detection signal outputted from an additional information period detection means 11 to store sequentially an asynchronous transfer mode(ATM) cell mainly comprising an inter-user transfer data except additional information i.e., an overhead according to the order of the reception from the transmission line in the unit of cells and also to store number of stored cells. Moreover, a cell multiplexer means 13 uses a control signal from an ATM switch to output the result to an ATM switch side according to the order of reception when number of stored cells in the inside of the cell alignment means 12 is one or over and after multiplexing of idle cells when number of stored cells is 0. Thus, the first-in/first-out memory is integrated and the system is made small in size.

Description

[Detailed Description of the Invention] [Summary] To integrate and exchange information with different i-rough ink characteristics such as voice, data, and images using an asynchronous transfer mode (ATM) such as TSDN. △TM
Are you skilled in the exchange system? +Regarding the transmission line interface for the ATM switch, the 5ONET format signal from the game player on the transmission line is transmitted to the ATM, except for OHAHESODO as additional information on the transmission line.
■Does the inside of the SDN switch become outside by replacing only the cells? 11; ATM switches for exchanging asynchronous transfer mode cells with the aim of integrating FIFO (first-in/first-out memory) and realizing system miniaturization in a manner that is independent of changes in transmission format and interface. In an ATM switching system comprising: (a) accompanying information section detection means for detecting a multiplexed section of inter-user transfer data included in a signal received from a transmission path and accompanying information on a transmission path other than a cell header; By the Immediate 1 accompanying information section detection signal outputted by the accompanying information section detecting means, inter-user transfer data and cell headers excluding the floor information are sequentially stored in cell units according to the reception order, and the number of stored cells is stored. The number of cells stored in the cell alignment means is 1 based on the control signal δ from the ATM switch.
When the number of cells stored in the cell alignment means is O according to the order of the sequential storage, and when the number of cells stored in the cell alignment means is O, empty cells are multiplexed and sent to the ATM switch. and cell multiplexing means for outputting the cell.

[Industrial Application Field] The present invention relates to a digital switching system, and more specifically, to an asynchronous transfer mode 1='(AT
M) for integrating and exchanging information with different traffic characteristics such as voice, data, and images.
This invention relates to a transmission line interface for an ATM exchange in a TM exchange system.

[Conventional technology] With the spread of data communications in recent years, not only voice but also important data has come to be communicated using public lines. Therefore, future communication networks will require high-quality transfer and exchange. required. Broadband ISDN (B-ISDN) has reached the practical stage as a communication service that can provide not only voice and low-speed data but also high-speed data such as video images, and standardization of various interfaces is underway. . Unlike conventional switching systems, B-13DN uses asynchronous transfer mode (ATM) to support voice,
It is possible to handle information at different speeds, such as low-speed data and moving images, in the same way, and to unify continuous information and burst information.

In ATMillil, information in different bands is transferred and exchanged in units of fixed length called cells to distinguish it from conventional packet communications. Since line data and packet data are multiplexed on a cell-by-cell basis without distinction, it is possible to flexibly handle services that require different transfer speeds, and the transfer path can be used efficiently.

In ATM communication, user information is divided into several pieces depending on its length, a header is added, and the information is divided into cells. The header part of the cell is, for example, several bytes, and the data part is 3 bytes.
It is about 2 to 120 hides. A channel identifier (vc) is attached to the header to distinguish which user the data is from. After the user information is converted into cells, it is sent to the ATM
Multiplexed, transmitted, and exchanged on the highway.

In this way, a wideband 1sD that can exchange low-speed signals such as voice and high-speed signals such as images while mixing them.
In the N exchange, for example, a 5ONET (synchronous optical network) type signal is used. FIG. 7 is an example of a 5ONET format signal. In the same figure, the unit of this signal is, for example, 270 bytes x 9 columns, which includes a data portion consisting of cells including -.ladder, and is transferred as accompanying information necessary for transmission on the transmission path. overhead (○I-1) is included.

This overhead includes the path overhead (POH) as accompanying information for the entire path from the transmitting station to the receiving station of the data transferred between users, and the path overhead (POH) that is the accompanying information for the entire path from the transmitting station to the receiving station of data transferred between users, and the path overhead (POH) from the transmitting station to the relay station if there is a relay station etc. between the paths. Section OT-+ is valid for the section of
). In Figure 7, the passover \sito (P 0
1-1) Ba9high I~, section overhead (
SO+-1) is 1 high I-, and the overhead is 0 high in total. p o +-+ includes synchronization, failure, parity information, etc. for the entire path, and S OJ
(contains similar information for section 1.).

FIG. 8 is a block diagram of a conventional example of a transmission line interface for inputting to an ATM exchange. This figure shows a case where there are a plurality of transmission lines input to a switch of one ATM exchange, and input transmission line ink faces 1a, 11 . ... will be established.

The contents of each transmission line interface], a, ]l:l... are almost the same, and A, T from the 5CIJ 卜:T format data input via High Love and A from the game on the transmission line. Data unnecessary for exchange within the M switch, that is, the portion excluding the above-mentioned overhead, is written into a first-in-first-out memory (FIFO) 2 by an occupation control unit 3 using a clock signal from the game, and the written data is It is output to the cell synchronization unit 5 under control 122 of the read control unit 4.

The cell synchronizer 5 detects a cell break from the data excluding overhead and outputs it to the FIFO 6. FIFO6
A, 1M cells are written in cell units by the write control unit 7 in the order of input from the highway. F
The readout of the A1M cells written in the IFO 6 is controlled by the readout control plate section 8 based on the 1.-kun clock signal, and is multiplexed with the output of another transmission line interface by the multiplexing section 9a to be sent to the transmission line interface. , Ace 1a will play J.

In FIG. 8, the output from the multiplexing unit 9a in the transmission line interface 1a is transmitted to another transmission line interface, here 1.
After being input to the multiplexing unit 9b in b and further multiplexed, it is sent to the multiplexing unit in another transmission line interface or ATM
Output to Sinch. Here, for example, the output of the multiplexing unit 9a is a highway in which only ATM cells that do not include overhead are sent, and it is also possible to input this directly to the ATM switch, but in that case, the configuration of the A'FM switch is This has the disadvantage of being complicated, and by further multiplexing A'', 1'M cells from a plurality of players, exchange and switching are performed as a faster data stream.

(Problems to be Solved by the Invention) In the conventional example shown in FIG.
02 was used, and also in the ATM cell multiplexing section 9a, a FIFO 6 was used to synchronize the phase with the ATM cells from other transmission line interfaces. This requires two FIFOs, which poses the problem of increasing the size of the system.

1.1 The present invention eliminates the overhead as accompanying information on the transmission path from the SONET' format signal from the opposing station on the transmission path, and exchanges only ATM cells.
The purpose of this invention is to integrate FIFO (first-in/first-out memory) in a manner in which the inside of a DN exchange is independent of changes in external transmission formats and interfaces, thereby realizing system miniaturization.

[Means to solve the problem]

FIG. 1 is a block diagram of the principle of the present invention. This figure is a principle block diagram of a transmission line interface for an ATM switch in an ATM switching system having an ATM switch for exchanging asynchronous transfer mote (ATM) cells. The same figure (a
) is a principle block diagram of the first invention, that is, a transmission line interface for inputting to an ATM exchange, and FIG.

In FIG. 1(a), the accompanying information section detection means 11 multiplexes the inter-user transfer data included in the received signal input from the transmission path, the accompanying information on the transmission path other than the cell header, and the overhead. Detect the interval that is
For example, a continuous accompanying information section detection signal is output for that section. This is a signal that becomes, for example, an IJ high rail signal in an overhead section.

The cell alignment means 12 uses the detection signal output by the accompanying information section detection means 11 to align the AT mainly with the accompanying information, that is, the inter-user transfer data excluding overhead.
The M cells are sequentially stored in cell units according to the order of reception from the transmission path, and the number of stored cells is also stored.

Here, the ATM cell is, for example, a first-in/first-out memory (F
lFO) and the number of storage cells is stored in the pointer memory.

Further, the cell multiplexing means 13 uses a control signal from the △TM switch to adjust the number of memory cells stored in the cell alignment means 2, for example, in a pointer memory, to 1.
When the above is the case, for example, the cells stored in the FIFO are multiplexed and output to the ATM switch side according to the above-mentioned reception order, and when the number of storage cells stored in the pointer memory is 0, empty cells are multiplexed and output to the ATM switch side. .

In FIG. 1(b) showing the principle of the second invention, the inter-user transfer cell storage means 14 detects empty cells included in the signals input from the ATM switch, and stores signals other than the empty cells. are stored in cell units according to the input order from the ATM switch. Here, the signal input from the ATM switch consists of ATM cells that mainly contain accompanying information on the transmission path, that is, data transferred between users without overhead, and empty cells.The ATM cells excluding the empty cells are, for example, Stored in FTFO.

Further, the multiplexing means 15 includes the inter-user transfer cell storage means 1
The cells stored in 4 are multiplexed in the order of input from the ATM switch, according to the transmission format on the transmission path of output (jl), and output (jl, ll Here, the multiplexing means 15 includes, for example, a creation section that creates an overhead pattern, a timing signal generation section that indicates the multiplexing timing of the overhead pattern, and A, T M based on the timing signal B. It consists of a multiplexer that multiplexes cells and overhead patterns.

[Function] In the first invention, that is, the principle block diagram of the input transmission line interface, the cell alignment means ■2
A memory that stores the internal ATM cells, such as a FIFO
Writing is controlled so that the received signal from the incoming highway is not multiplexed in the 5ONET overhead multiplexing section, and ATM cells are stored in the FIFO according to their manual order. When writing of one ATM cell is completed, a pointer in a pointer memory is incremented to indicate how many ATM cells are in the FIFO. When reading an ATM cell from the FIFO, if there is a valid cell in the FIFO, that cell is multiplexed by referring to the pointer value in the pointer memory.
Pointer memory bore ink is reduced. If there are no cells in the FrFO, empty cells are multiplexed instead.

In the second invention, that is, the principle block diagram of the output transmission line interface, substantially the opposite effect to that of the input transmission line interface of FIG. 1(a) is performed. Empty cells are extracted from the signals that do not include overhead that have been exchanged within the ATM switch, and the A, TM cells that do not contain empty cells are stored in the inter-user transfer cell storage means 14.
The ATM cells are sequentially stored in the internal memory, for example, the FO, in the order of input from the ATM switch, and the stored ATM cells are sequentially multiplexed in sections other than the overhead multiplexing section and output as transmission signals to the output transmission path. .

As described above, in the present invention, only the A'FM cells from which the overhead as initial information on the transmission path has been removed are exchanged by the ATM switch.

〔Example〕

FIG. 2 is a block diagram of the overall configuration of the ATM switching system according to the present invention. In the figure, the input transmission path and the output transmission path input to the ATM switch 16 are each shown as one tree, but generally there are a plurality of each of these transmission paths. Game] AT of input transmission line from 7
An input transmission line ink face 18 is provided at the input end to the M switch 16, and an output transmission line interface 20 is provided at the output side of the output transmission line to the game player 19.

FIG. 3 is a block diagram illustrating the configuration of an embodiment of the input transmission line interface. In the figure, a 5ONET format signal input from the opponent side via the input transmission path is received by the receiving section 21, and is output from the receiving section 21 to the synchronization section 22. A clock signal from the write control section 26 is outputted to the write control section 26. The synchronization unit 22 establishes synchronization of 5ONET format signals,
After the same XJJ is established, a signal (2) is generated as a detection signal for a multiplexed section of accompanying information on a transmission path other than an ATM cell, that is, an overhead, and is at, for example, l-1 (or L)° only in that section. At the same time, the synchronization section 22 performs fault detection and parity check on the 5ONET format signal, and the synchronization section 22 outputs a signal containing error-corrected ATM cells to the cell synchronization section 23.

The cell synchronization section 23 uses the overhead section detection signal (2) outputted from the synchronization section 22 to find the cell break in the section excluding the overhead multiplex section, and performs cell synchronization.
As a signal indicating that an individual cell has been detected, for example, a pulse signal ■ indicating the end of the cell is output to the write control unit 26. The buffer memory, for example, the F+FD 24, sequentially stores the output signals of the cell synchronization section 23 in accordance with the input order in units of cells under the control of the write control section 26.

Here, the output of the cell synchronization unit 23 includes overhead, but under the control of the write control unit 26, old data is stopped in the section where the over-rad section detection signal ■ is at H". As a result, the buffer memory 24, only ATM cells are sequentially stored in the order of input.At the same time, the write control unit 26 uses the detection signal 1 of each cell outputted by the cell synchronization unit 23 to store the pointer value stored in the pointer memory 25 in the buffer memory. 24 is incremented each time an A, TM cell is stored.

There is an empty cell generator 28 on the output side of the transmission line interface to the ATM switch, and as explained in FIG. The pointer value of the pointer memory 25 is referred to by the read control section 27 in response to the control signal, and when the value is 1 or more, an ATM cell is output from the buffer memory 24, and the multiplexing section 29 outputs one ATM cell. Ru. When the pointer value of the pointer memory 25 is 0, the empty cell generated by the empty cell generating section 28 is output to the ATM switch side.

FIG. 4 shows an example of the output signal on the ATM switch side. In the same figure, the signal transferred on the highway to the ATM switch side consists of an ATM cell and an empty cell.
The signal does not include overhead portions such as the bus overhead and section overhead shown in the figure.

FIG. 5 shows an embodiment of a switching system that multiplexes ΔTM cells input from a plurality of transmission lines and outputs them to an ATM switch. In the figure, input transmission line interfaces provided for each input transmission line: r--s 30a;
The configurations of 30b, . . . 30n are exactly the same as shown in FIG.
The multiplexer (
MPX) 31, and is multiplexed and outputted on the highway to the A and TM switches under the control of the counter 32, for example.

Here, if the control signal from the ATM switch is a control signal that multiplexes the outputs of the transmission line interfaces 30a, 30b, . ATM cells are time-division multiplexed and output to an ATM switch. Furthermore, if no ATM cells are stored in the buffer memory 24 in the transmission line interface at the timing when multiplexing is to be performed, the empty cells output from the empty cell generation section 28 will be multiplexed and output to the ATM switch. .

FIG. 6 is a configuration block diagram of an embodiment of the self-supporting transmission line interface. In the figure, a signal input from an ATM switch is sent to a buffer memory 33, for example, an FIF.
Although cells are stored in the cell in the order of input, there is a possibility that empty cells may be included depending on the signal from the A'FM switch, so when an empty cell is detected by the empty cell detector 34, the empty cell buffer is In order to prevent writing to the memory 33, a signal ■ indicating that writing to the buffer memory is prohibited, for example, as 'L', is output to the buffer memory 33, and in the section where this signal is L'', the buffer memory 3 of the cell is
Writing to 3 is stopped.

On the output side of the buffer memory 33, there is an overhead pattern creation unit 35 that creates an overhead pattern and accompanying information according to the transmission format on the output transmission path, and an overhead pattern creation unit 35 that creates an overhead pattern for reading from the buffer memory 33 in an interval where the overhead pattern is multiplexed. There is a timing signal generating section 36 which indicates the timing of prohibition, and the output (2) of the timing signal generating section becomes, for example, L' in the overhead multiplexing section, and reading of cells from the buffer memory 33 during this section is stopped. Then, the multiplexer 37 multiplexes the overhead pattern from the overhead pattern generator 35 and the ATM cell read from the buffer memory 33, and outputs the multiplexed pattern as a 5ONET format signal to the output transmission line via the transmitter 38.

The output transmission line interface shown in FIG.
The ATM cells are separated and outputted to multiple transmission lines corresponding to Fig. 5 by providing the same structure as shown in the figure, separating the signals from the ATM switch using a demultiplexer, and inputting the signals to each output transmission line interface. It is also possible.

〔Effect of the invention〕

As explained above, according to the present invention, by extracting only the ATM cells with the overhead removed from an external signal, for example, in SON E T' format, and exchanging them with an ATM switch, the inside of a wideband I5DN exchange can be exchanged with the outside. It becomes irrelevant to changes in the interface with the transmission path,
Furthermore, the exchange efficiency inside the ATM switch is improved. Furthermore, FI
There is only one FO memory, and the system can be made more compact.

[Brief explanation of drawings]

FIGS. 1(a) and 1(b) are block diagrams of the principle of the present invention,
Fig. 2 is a block diagram of the overall configuration of the ATM exchange system according to the present invention; Fig. 3 is a block diagram showing the configuration of an embodiment of the input transmission line interface; Fig. 4 is the output to the ATM switch side. Figure 5 is a block diagram showing an example of a switching system that manually multiplexes ATV nacelles from multiple transmissions and inputs the signal to an ATM switch; Figure 6 shows an output transmission path. FIG. 7 is a block diagram showing the configuration of an embodiment of the ink face. FIG. 7 is a diagram showing an example of a 5ONET format signal. FIG. 8 is a block diagram showing the configuration of a conventional example of the transmission line ink face for inputting to an ATM switch. be. 11... Associated information section detection means, 12... Cell alignment means, 13... Cell multiplexing means, 14... Inter-user transfer cell storage means, 15... Multiplexing means, 16... ATM switch, 17. 19... Game, 18... Transmission line interface for input, 20... Transmission line interface for output. Patent applicant Fujitsu Co., Ltd.

Claims (1)

[Claims] 1) Asynchronous transfer mode (ATM) ATM that exchanges cells
In an ATM switching system equipped with a switch, an accompanying information section detection means (11) for detecting a multiplexing section of accompanying information on a transmission path other than inter-user transfer data and cell headers included in a signal received from a transmission path; By the accompanying information section detection signal outputted by the accompanying information section detecting means (11), inter-user transfer data and cell headers excluding the accompanying information are sequentially stored in cell units according to the reception order, and the number of stored cells is also stored. cell alignment means (12) for storing; and when the number of cells stored in the cell alignment means (12) is one or more, according to the order of the sequential storage according to a control signal from the ATM switch; (12), or when the number of cells stored in the cell alignment means (12) is 0, empty cells are multiplexed to the AT.
1. A transmission line interface for inputting to an ATM exchange, comprising cell multiplexing means (13) for outputting to an M switch. 2) Asynchronous Transfer Mode (ATM) ATM that exchanges cells
In an ATM switching system having a switch, detecting an empty cell included in an input signal that does not include accompanying information on a transmission path, which is input from the ATM switch,
inter-user transfer cell storage means (14) for storing inter-user transfer data other than the empty cells and cell headers in cell units in the input order, and cells stored in the inter-user transfer cell storage means (14) as input cells; A transmission line interface for outputting an ATM exchange, characterized in that it has multiplexing means (15) for multiplexing accompanying information on a transmission line together in order according to the transmission format on the transmission line and outputting the same to the transmission line. 3) In claim 1, the accompanying information section detecting means (11) includes a receiving section (21) that receives the signal from the transmission path and detects a clock signal from a game player on the transmission path, and the receiving section ( 21) outputs a continuous detection signal for the multiplexed section of the accompanying information included in the received signal, and uses the accompanying information to detect a failure on the transmission path and perform a parity check on the received signal. 1. A transmission line interface for inputting to an ATM switch, characterized in that it has a synchronization section (22). 4) In claim 1, the accompanying information section detection means (11) includes a receiving section (21) that receives a signal from the transmission path and detects a clock signal from a game player on the transmission path; a cell synchronization section (23) for detecting a cell division in the received signal excluding the incidental information based on the incidental information section detection signal; a memory (24) for storing the received cells according to the reception order; a pointer memory (25) for storing the number of cells stored in the memory (24); and a pointer memory (25) for storing the number of cells stored in the memory (24); a write control unit (26) that controls writing of cells to the memory (24) based on a clock signal from the ATM switch and the cell division detected by the cell synchronization unit (23); and an output from the ATM switch. The number of cells stored in the pointer memory (25) changes to 1 based on the control signal
A transmission line interface for inputting to an ATM switch, characterized in that it has a readout control section (27) that controls reading out of cells stored in the memory (24) according to the reception order when the above conditions are met. 5) In claim 1, the cell alignment means (12) comprises: a memory (24) for storing cells in accordance with the reception order; and a pointer memory (25) for storing the number of cells stored in the memory (24). ), and when the number of cells stored in the pointer memory (25) is one or more, the reception of the cells stored in the memory (24) is performed based on a control signal output from the ATM switch. The cell multiplexing means (13) includes an empty cell generation unit (28) that generates empty cells, and a storage of the pointer memory (25). The number of cells to be
The cells read out from the memory (24) under the control of the read control unit (27) when the above conditions are the same, and the empty cells generated by the empty cell generation unit (28) when the cell number is 0 are multiplexed. 1. A transmission line interface for inputting to an ATM exchange, characterized in that it has a multiplexing section (29) for converting the converted data into a multiplexer and outputting the converted data to the ATM switch. 6) In claim 2, the multiplexing means (15) includes an overhead pattern generation section (35) as the accompanying information and a timing signal generation section indicating the timing at which the output of the overhead pattern generation section (35) should be multiplexed. (36), multiplexing the overhead pattern created by the overhead pattern creation section (35) based on the output of the timing signal generation section (36) and the cells stored in the inter-user transfer cell storage means (14); 1. A transmission line interface for outputting an ATM switch, characterized in that it has a multiplexing section (37) for outputting to a transmission line. 7) In claim 1, the accompanying information section detection means (11), the cell alignment means (12), and the cell multiplexing means (for each of the plurality of transmission paths input to the ATM switch)
13); and a multiplexing unit that multiplexes cells output from the plurality of input transmission line interfaces and outputs the same to the ATM switch according to a control signal from the ATM switch. An ATM switching system comprising: 8) In claim 2, multiplexed signal separation means for separating and outputting the multiplexed signal output from the ATM switch into a plurality of transmission paths in response to a control signal from the ATM switch; The inter-user transfer cell storage means (14) and the multiplexing means (15) are provided for each of the plurality of transmission paths to be transmitted, and the output of the multiplexed signal separation means is multiplexed with the accompanying information. 1. An ATM switching system comprising: a plurality of transmission line interfaces for outputting an ATM exchange to a transmission line.