JPH0478202A - Frequency mixer circuit - Google Patents

Abstract

PURPOSE:To reduce required power by inputting a reception signal inputted from a 1st signal input terminal to a gate of a MOS transistor(TR) and inputting a local oscillation signal inputted from a 2nd signal input terminal to a base of a balanced bipolar TR. CONSTITUTION:A reception input signal tuned and selected by an input tuning circuit 1 is fed to a gate of a MOS TR Q1 for reception signal input via a 1st signal input terminal 4 and a local oscillation signal from a local oscillation circuit (not shown in figure is fed to a base of an NPN TR Q2 via a 2nd signal input terminal 5, then frequency mixture is implemented and its output is extracted from an output terminal 6 and an intermediate frequency component is tuned and selected by an output tuning circuit 2 and the result is outputted. In this case, the operating current of the circuit is decided by the bias condition of the TR Q1 and a bias voltage V1 of TRs Q2, Q3 and a bias voltage V2 of the TR Q1 are set to an optimum value by taking the cross modulation characteristic, intermodulation characteristic, frequency conversion gain and frequency conversion noise figure totally into account.

Description

Detailed Description of the Invention [Object of the Invention] (Industrial Application Field) The present invention is applicable to high frequency stages such as VHF band 0 television broadcast reception tuners, FM broadcast reception tuners, and wireless receivers. The present invention relates to a frequency conversion circuit used in a frequency conversion circuit, and particularly to a frequency mixing circuit.

(Prior Art) Conventionally, for example, in a tuner for the VHF band, a frequency conversion circuit used in a high frequency stage to convert a received input signal (high frequency signal) into a first intermediate frequency signal is as shown in FIG. A bipolar single-balanced frequency mixing circuit using bipolar transistors or a dual gate MOS transistor frequency mixing circuit as shown in FIG. 8 is used.

In the circuit shown in FIG. 7, 1 is an input tuning circuit in which a reception input signal received by a reception antenna is input manually, 70 is a single-balanced frequency mixing circuit, and 2 is an output tuning circuit. In the above frequency mixing circuit, 3 is a Vcc power supply terminal;
4 is a first signal input terminal, 5 is a second signal input terminal, 6
is a balanced output type frequency mixed signal output terminal, 71 is an NPN l-run transistor for receiving signal input, 72 and 73 are NPN transistors with uniform characteristics forming a differential pair, R] ~
R6 is a bias resistor, 01 to C3 are bypass capacitors, and RFC is a choke coil. Normally, transistors 71 to 73 and bias resistors R1 to R6 are integrated circuits, and bypass capacitors 01 to C3 and choke coils RFC are externally connected to the integrated circuit.

In the circuit shown in FIG. 7, the received input signal whose tuning is selected by the input tuning circuit is inputted to the hemisphere of the NPN transistor 71 for inputting the received signal via the first signal input terminal 4. Frequency mixing is performed by inputting the local oscillation signal from the NPN transistor (not shown) to the base of the NPN transistor 3 via the second signal input terminal 5, and the frequency mixed signal output is taken out from the output terminal 6, and the intermediate frequency component is is tuned and selected by the output tuning circuit 2 and output.

However, in the circuit shown in FIG. 7, the distortion characteristics of the bipolar transistor 72 for inputting the received signal are poor, so there is a problem that cross-modulation and intermodulation characteristics, which are important performances of a frequency conversion circuit, are poor.

On the other hand, in the circuit shown in FIG. 8, 1 is an input tuning circuit into which the reception input signal received by the reception antenna is input, 80 is a dual gate MOSFET (insulated gate field effect transistor) type frequency mixing circuit, and 2 is a frequency mixing circuit of the dual gate MOSFET (insulated gate field effect transistor) type. This is an output tuning circuit. In the frequency mixing circuit 80, 3 is VCC
Power supply terminal, 81 is a signal input terminal, 82 is a dual gate MO8 for receiving signal input and local oscillation signal input.
I-transistor, R1-R3 are bias resistors, C]~
C2 is a bypass capacitor, 6 is a frequency mixing signal output terminal, and RFC is a choke coil. In the circuit of FIG. 8, a received input signal whose tuning is selected by the input tuning circuit 1 and a local oscillation signal from a local oscillation circuit (not shown) are input to the gate of a dual gate MOS transistor 82 via a signal input terminal 81. Frequency mixing is performed manually, the frequency mixed signal output is taken out from the output terminal 6, and the intermediate frequency component is tuned and outputted by the output tuning circuit 2, and the cross modulation and intermodulation characteristics are good. be.

However, the local oscillation signal from the local oscillator circuit is transmitted along with the received input signal to a dual-gate circuit with high input impedance.
Since it is input to the gate of the MO5I transistor 82, there is a problem that the local oscillation signal tends to leak to the receiving antenna side.

(Problem to be solved by the invention) As mentioned above, when using the conventional bipolar/single balance type frequency mixing circuit, there is a problem of poor intermodulation and intermodulation characteristics. When using a run transistor wave number mixing circuit, there is a problem in that the local oscillation signal tends to leak to the receiving antenna side.

The present invention has been made to solve the above problems, and its purpose is to provide a simple configuration using a small number of elements, while improving cross-modulation/intermodulation characteristics and leakage characteristics of local oscillation signals to the reception input side. The purpose of both is to provide a good frequency mixing circuit.

[Structure of the Invention] (Means for Solving the Problems) The frequency mixing circuit of the present invention is an N-channel enhancement type in which the input signal of the first signal input terminal is applied to the gate and the source is grounded in an alternating current manner. Alternatively, the emitter and collector of each depletion type insulated gate field effect transistor are connected between the drain of the insulated gate field effect transistor and a balanced output type signal output terminal, and the balanced output type signal input terminal is connected to the depletion type insulated gate field effect transistor. A bipolar transistor forming a differential pair which receives an input signal and outputs a balanced frequency mixed signal to the balanced output signal output terminal, each base of the bipolar transistor forming the differential pair, and the base of the insulated gate field effect transistor. The device is characterized by comprising a bias circuit that applies a bias potential to the gate.

(Function) In the frequency mixing circuit of the present invention, for example, a received signal inputted from the first signal input terminal is inputted to the gate of the MOS transistor, and for example, a local oscillation signal inputted from the second signal input terminal is inputted to the gate of the MOS transistor. The advantage of the MOSl-transistor type frequency mixing circuit is that it has excellent intermodulation and intermodulation characteristics because it is input to the base of the bipolar transistor, and the bipolar balance has excellent leakage characteristics to the receiving input side of the local oscillation signal. It combines the advantages of conventional frequency mixing circuits. Furthermore, compared to a MOS balanced frequency mixing circuit in which all of the transistors for inputting the received signal and the transistors for inputting the local oscillation signal are MOS transistors, the power required for inputting the local oscillation signal is smaller. Furthermore, the number of elements used is small and the configuration is simple.

(Example) Hereinafter, an example of the present invention will be described in detail with reference to the drawings.

Figure 1 shows a frequency conversion circuit used in a high frequency stage to convert a received input signal (high frequency signal) into a first intermediate frequency signal in a tuner for the VHF band. 10 is a single-balanced frequency mixing circuit, and 2 is an output tuning circuit.

The frequency mixing circuit 10 is an N-channel enhancement type (or depletion type) whose gate is DC-connected to the first signal input terminal 4, and whose source is DC-connected to a predetermined potential and AC-grounded. ), the base of one transistor Q2 is connected to the second signal input terminal 5 in a direct current manner, the base of the other transistor Q3 is connected to the ground in an alternating current manner, and a common emitter is connected to the second signal input terminal 5. The end is the MO3
The transistors Q1 are connected in a direct current manner to the drain of the transistor Q1, each collector is supplied with the power supply potential VCC, and a frequency mixed signal is taken out from the collector of the other transistor Q3 to the balanced output type signal output terminal 6. N
It consists of PN transistors Q2 and Q3, and a bias circuit section that applies a bias potential to the bases of the bipolar transistors Q2 and Q3 forming the differential pair and to the gate of the MOS transistor Q1. Here, 3 is VC
C power supply terminal, R1-R6 are bias resistors, 01-C3
is a bypass capacitor, and RFC is a choke coil.

Note that transistors Q1 to Q3 and bias resistor R
1 to R6 are integrated into a bypass capacitor 01.
~C3 and the choke coil RFC are externally connected to the integrated circuit.

In the circuit shown in FIG. 1, the received input signal (for example, 200 MHz) whose tuning is selected by the input tuning circuit 1 is inputted to the gate of the received signal input MOS transistor Q1 via the first signal input terminal 4, and the local oscillator is generated. Circuit (not shown)
Frequency mixing is performed by inputting the local oscillation signal (for example, 260 MHz) from the input terminal 5 to the base of the NPN transistor Q2 through the second signal input terminal 5, and the frequency mixed signal output is taken out from the output terminal 6, and the intermediate A frequency component (60 MHz in this example) is tuned and selected by the output tuning circuit 2 and output. In this case, the operating current of the circuit is determined by the bias condition of the MOS transistor Q1, and the bias voltage 1 of the NPN transistors Q2 and Q3 and the bias voltage V2 of the MOS transistor Q1 are determined by the cross-modulation characteristics, intermodulation characteristics, frequency conversion gain, It is necessary to set the optimum value by comprehensively considering factors such as frequency conversion noise figure.

According to the circuit shown in Fig. 1, the MOS transistor Q1 is used in the reception input section, and the balanced bipolar transistors Q2 and Q3 are used in the local oscillation signal input section, so cross-modulation and intermodulation characteristics are excellent. MO
This combines the advantages of the S-transistor type frequency mixing circuit with the advantages of the bipolar balanced type frequency mixing circuit, which has excellent leakage characteristics of local oscillation signals to the receiving input side.

2 to 4 show the frequency mixing circuit 1 in the above embodiment.
0 operating current, cross modulation/intermodulation, frequency conversion gain, and frequency conversion noise figure, and Figure 5 shows the relationship between the local oscillation signal input level and cross modulation/intermodulation of the frequency conversion circuit of the above embodiment. It shows the relationship, and for comparison,
This shows the characteristics when a conventional high voltage single balanced frequency mixing circuit 70 is used.

In FIGS. 2 to 4, when the characteristics of the above embodiment are compared with those of the conventional example, the frequency conversion gain is reduced by approximately 4 to 6 dB in the operating current range of 6 to 1 QmA.
Intermodulation characteristics are approximately 17 to 12 dBμ, intermodulation characteristics are approximately 2
4 to 12 dB, frequency conversion noise figure or approximately 1. dB
I can see that it has been improved. Also, in Figure 5,
Comparing the characteristics of the above embodiment with the characteristics of the conventional example, it is found that the above embodiment has a local oscillation signal input level of 15 to 15% compared to the conventional example.
In the range of -5 dBm, the cross modulation is approximately lO~18 dBμ,
It can be seen that the intermodulation characteristics have been improved by approximately 10 to 20 dB.

In addition, a MOS single transistor in which all of the bipolar transistors 71 to 73 in FIG. 7 are replaced with MOS transistors is used.
It is also possible to configure a balanced frequency mixing circuit, that is, a frequency mixing circuit in which all the transistors for inputting the received signal and the transistors for inputting the local oscillation signal are MOS transistors, but in this case, the above embodiment Compared to the frequency mixing circuit 10 shown in FIG. In other words, in the frequency mixing circuit 10 of the above embodiment, all of the transistors for inputting the received signal and the transistors for inputting the local oscillation signal are M.
Compared to the case of configuring a balanced frequency mixing circuit in which OS transistors are replaced, the power required for inputting the local oscillation signal is smaller. Further, the number of elements used in the frequency mixing circuit 10 in the above embodiment is the same as that of the frequency mixing circuit 70 of FIG. 7 of the conventional example, and the configuration is quite simple.

FIG. 6 shows, as an application example of the frequency mixing circuit 10 in FIG. 1, an example of a double-balanced frequency mixing circuit 60 suitable for integration into an integrated circuit.

Here, Ql and Qlo are an N-channel enhancement type (or depletion type) single-gate first MOS transistor and a second N-channel enhancement type (or depletion type) MOS transistor.
MOS transistors Q2 and Q3 form a first differential pair of NPN l-transistors, Q2' and Q3'
are NPN transistors forming a second differential pair, and 5 and 5° are second differential signal input terminals. The first N
The 10S transistor Q] and the second MOS transistor Ql' have respective gates connected to the first differential signal input terminal pair 4.4' in a direct current manner, and sources grounded in an alternating current manner. Further, the first differential pair transistor Q
2 and Q3, the base of one transistor Q2 is DC connected to the second differential signal input terminal 5 and AC grounded, and the base of the other transistor Q3 is connected to the second differential signal input terminal 5. 5', the emitter common terminal is connected in direct current to the drain of the first MOS transistor Ql, each collector is given the power supply potential Vcc, and a balanced output type signal is output from the collector of the other transistor Q3. A terminal frequency mixed signal is taken out to output 6. Further, in the second differential pair transistors Q2'' and Q3°, the base of one transistor Q2' is connected to the second differential signal input terminal 5 in a direct current manner and is grounded in an alternating current manner, and the other is connected to the base of the transistor Q3° or the second differential signal input terminal 5',
The emitter common end is the second MOS transistor Q1°
The respective collectors are connected to the respective collectors of the first differential pair transistors Q3 and Q2, respectively. Furthermore, a bias circuit section is provided for applying a bias potential to the bases of each NPN transistor Q2, Q3, Q2' and Q3' and the gate of each MO3 transistor Q1 and Ql'. Here, 3 is a Vcc power supply terminal, R1-R8 are bias resistors, C1-C2 are bypass capacitors, and RFC is a choke coil.

[Effects of the Invention] As described above, according to the present invention, although it has a simple configuration using a small number of elements, it has good frequency characteristics in both cross-modulation/intermodulation characteristics and leakage characteristics of local oscillation signals to the receiving input side. A mixed circuit can be realized.

Therefore, the frequency mixing circuit of the present invention is extremely effective when employed in a tuner for receiving VHF band 0 television broadcasting, a tuner for receiving FM broadcasting, a radio receiver, and the like.

[Brief explanation of drawings]

Fig. 1 is a circuit diagram showing a frequency conversion circuit using an embodiment of the frequency mixing circuit of the present invention, and Figs. 2 to 4 show the operating current and cross-modulation/intermodulation of the frequency conversion circuit in Fig. 1. FIG. 5 is a characteristic diagram showing the relationship between the frequency conversion gain and frequency conversion noise figure; FIG. 5 is a characteristic diagram showing the relationship between the local oscillation signal input level of the frequency conversion circuit in FIG. This figure is a circuit diagram showing an example of application of the frequency mixing circuit shown in FIG. 1, and FIGS. 7 and 8 are circuit diagrams showing conventional frequency conversion circuits, respectively. 1... Input tuning circuit, 2... Output tuning circuit, 3...
・Vcc power supply terminal, 4... first signal input terminal, 5.
...Second signal input terminal, 6...Balanced output type signal output terminal, 10...Single balanced type frequency mixing circuit, 60...Double balanced type frequency mixing circuit, Q
l, Ql'...MOS transistor, Q2, Q3,
Q2° Q3°...NPN transistor, R1-R
8...Bias resistor, 01-C3...Bypass capacitor, R, FC...Choke coil. Applicant's representative Patent attorney Takehiko Suzue Figure 1 Operating current (mA) Figure Cross-modulation local oscillation signal input level (aBm) Figure Local oscillation No. 1 Figure 8

Claims (2)

[Claims] (1) An N-channel enhancement type or depletion type insulated gate field effect transistor whose gate is applied with an input signal from a first signal input terminal and whose source is AC grounded; and this insulated gate field effect transistor. The emitter-collector of each is connected between the drain of the second terminal and the balanced output type signal output terminal.
bipolar transistors forming a differential pair to which a balanced input signal is applied from the signal input terminal and outputting a frequency mixed signal in a balanced manner to the balanced output type signal output terminal, each base of the bipolar transistors forming the differential pair and the insulating 1. A frequency mixing circuit comprising: a bias circuit that applies a bias potential to the gate of a gate-type field effect transistor. (2) The gate is connected to the received signal input terminal in a DC manner,
An N-channel enhancement type or depletion type insulated gate field effect transistor whose source is supplied with a predetermined potential in DC terms and grounded in AC terms; The base of the other transistor is connected to the AC ground, the common emitter terminal is connected to the drain of the insulated gate field effect transistor in a DC manner, a power supply potential is applied to each collector, and the collector of the other transistor is connected to the drain of the insulated gate field effect transistor. A differential pair of NPN transistors from which a frequency mixed signal is taken out to a balanced output signal output terminal, and a bias that applies a bias potential to the bases of the NPN transistors and the gate of the insulated gate field effect transistor. The frequency mixing circuit according to claim 1, further comprising a circuit.