JPH0477930A - Microcomputer - Google Patents

Abstract

PURPOSE:To reduce the response time of interruption by automatically altering the mask state state of an interruption request independently of a user program before and after the switching of register banks whenever they are switched. CONSTITUTION:At the time of initialization, CPU 12 sets interruption mask information in respective mask state holding registers 10 and 11 in accordance with the content of a program memory 13. When a bus selector 2 switches the register bank being the object of access for the CPU bus 1 from the register bank 3 to the register bank 4 by an instruction or the occurrence of interruption, the content of the interruption request mask control register 5 is stored in the mask state holding register 10 corresponding to the register bank 3. Thus, the response time of interruption can be reduced since the control register 5 holding the mask state of respective interruption requests is automatically updated at the time of switching the register banks.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a microcomputer, and in particular to a register/microcomputer.
This invention relates to a microcomputer with a bank and an interrupt controller.

[Conventional technology]

Conventionally, this type of microcomputer has been used to save register contents depending on the purpose.
Every time banks are switched, it is necessary to set the mask status of each interrupt request in the mask control register on the user program.

FIG. 2 is a block diagram showing an example of a conventional microcomputer. Assume that the bus selector 2 switches the register bank to be accessed by the CPU bus 1 from the register bank 3 to the register bank 4 in response to an instruction or the occurrence of an interrupt. A program that accesses register bank 4 is started, and CPU 12 loads interrupt mask information corresponding to register bank 4 from program memory 13 and stores it in interrupt request mask control register 5. Therefore, the interrupt mask information corresponding to register bank 3, which was stored in the interrupt request mask control register before bank switching, is lost.

In this example, the first and third bits from the higher order of the interrupt request mask control register 5 can mask signal transmission from the external interrupt input signal lines 6 and 8 to the interrupt request signal line 7.9, respectively.

Next, register bank 3 is changed from register bank 4 again.
When switching the access target to register bank 3, the interrupt mask information corresponding to register bank 3 is lost, so the CPU 12 loads this information from program memory 13 and transfers it to interrupt request mask control register 5. Store in.

[Problem to be solved by the invention]

In this conventional microcomputer, each register bank does not have a mask state holding register, so there is a drawback that mask information before switching due to an instruction or an interrupt is lost. Furthermore, when switching register banks, the control registers that hold the mask status of individual interrupt requests cannot be automatically updated. The disadvantage is that the state must be set to match the new register bank, increasing the code size of the user program and the response time of interrupts.

An object of the present invention is to provide a microcomputer that can reduce code size and interrupt response time.

[Means to solve the problem]

A microcomputer according to the present invention includes a plurality of register banks, a group of registers corresponding to each of the register banks and holding mask states of a plurality of interrupt requests, a mask control register, and a register that controls the mask according to an instruction or the occurrence of an interrupt. The contents of the register are stored in the mask state holding register corresponding to the previously selected register bank, and the register bank is switched from the mask state holding register corresponding to the newly selected register bank to the mask control register. and means for storing the contents.

〔Example〕

Next, the present invention will be explained with reference to the drawings. 1st
The figure is a block diagram of one embodiment of the present invention. As shown in the figure, register banks 3 and 4 are each provided with mask state holding registers 10 and 11.

At the time of initialization, the CPtJ 12 has interrupt mask information set in each mask state holding register 10.11 according to the contents of the program memory 13.

Assume that the bus selector 2 switches the register bank to be accessed by the CPU bus 1 from the register bank 3 to the register bank 4 in response to an instruction or the occurrence of an interrupt. At this time, the contents of the interrupt request mask control register 5, which holds the masked state of each interrupt request, are transferred to the masked state holding register 10 corresponding to the register bank 3. This prevents the mask information from disappearing when switching as in the conventional case. When the mask information is stored in the mask information holding register 10, the mask status holding register 11 corresponding to register bank 4 is stored.
The contents of are loaded into the interrupt request mask control register 5. Therefore, the interrupt request mask control register 5 can mask external interrupt input signal lines according to the mask state.

On the other hand, when switching the register bank from register bank 4 to register bank 3, a similar operation is performed.
The mask state is stored in the mask state holding register 11, and the contents of the interrupt request mask control register are changed.

〔Effect of the invention〕

As explained above, the present invention can automatically change the interrupt request masking state before and after register bank switching without depending on the user program.
This makes it possible to omit the processing conventionally performed by the user program, thereby reducing the interrupt response time. In addition, there is no need to prepare mask information setting routines for the number of interrupt sources, and interrupt masking can be achieved with an initialization routine that sets as many register banks as there are to be used, resulting in a reduction in program code size. has.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an embodiment of the present invention, and FIG. 2 is a block diagram of a conventional microcomputer. 1...CPU bus, 2...Bus selector, 3゜4
...Register bank, 5...Interrupt request mask control register, 6.8...External interrupt input signal line,
7, 9...Interrupt request signal line, 10.11...Mask status holding register, 12...CPU, 13...
program memory.

Claims (1)

[Claims] A plurality of register banks, a group of registers corresponding to each of the register banks and holding mask states of a plurality of interrupt requests, a mask control register, and a mask control register whose contents have already been selected by an instruction or an interrupt occurrence. means for storing contents in a mask state holding register corresponding to the newly selected register bank, and storing contents in the mask control register from the mask state holding register corresponding to the newly selected register bank by switching register banks; A microcomputer characterized by comprising: