JPH0475152A - Nonvolatile memory system - Google Patents

Abstract

PURPOSE:To realize a stable nonvolatile memory system by reducing influence by dispersion in the service life of the element of nonvolatile memory by automatically substituting a prescribed spare area for the area of nonvolatile memory in which a write error occurs by using dedicated hardware. CONSTITUTION:A write circuit 13 writes the content of memory 11 on the nonvolatile memory 12 corresponding to a supplied write request, and issues a readout/inspection request. A readout and inspection circuit 14 reads out the content of the nonvolatile memory 12 accordingly, and issues a substitution page decision request when the content is incorrect. A substitution page decision circuit 15 designates the substitution page of a page in which an error occurs accordingly, and sends out substitution page designation information. The write circuit 13 writes the same content of the memory 11 on the substitution page corresponding to the substitution page designation information, and issues the readout/inspection request. Thereby, it is possible to substitute the prescribed spare area for the area in which the write error occurs by reducing the influence due to the dispersion in the service life of the element and a load on software.

Description

[Detailed Description of the Invention] [Summary] In an information processing system that performs processing based on information generated before the interruption of operation due to a power outage or maintenance operation, a non-volatile system that retains predetermined information during a power outage is used. With regard to memory systems, the purpose is to reduce the effects of variations in element life and the software load, and to replace areas where write errors have occurred with predetermined spare areas.
A memory in which predetermined data is stored, a non-volatile memory including a spare area that is accessed for each page containing an area of a certain size and is appropriately allocated as a replacement page to replace a page in which a write error has occurred, and a write request or A write circuit that stores the contents of the memory in a nonvolatile memory according to replacement page specification information and issues a read/inspection request, and reads out the contents of the nonvolatile memory according to the given read/inspection request and replacement page specification information. , a reading/inspection circuit that issues a replacement page determination request depending on whether the content is correct, and a replacement circuit that specifies a replacement page in response to the replacement page determination request and sends out replacement page designation information that requests writing to the replacement page. and a page determination circuit.

[Industrial application field]

The present invention relates to a nonvolatile memory system that retains predetermined information during a power outage in an information processing system that performs processing based on information generated before the interruption of operation after a power outage or maintenance operation.

[Conventional technology]

In an information processing system that performs predetermined processing after power restoration based on data generated before a power outage, a nonvolatile memory is used to hold data necessary for processing after power restoration during a power outage. Such a non-volatile memory is constituted by, for example, a writable E''FROM semiconductor memory element, and when the number of writes/updates reaches a certain number of times, normal write/update operations are not guaranteed due to the characteristics of the element.

Conventionally, as a memory area management method that corresponds to the characteristics of such nonvolatile memory elements, a predetermined test code is added to the data to be written and written, and after writing, the data and test code are read out to determine whether the test code is correct or not. A method is adopted in which the presence or absence of a write error is checked. Further, in such a method, two-sided management in which data in which a write error has been detected is allocated to another area on the nonvolatile memory is performed under software control.

[Problem to be solved by the invention]

By the way, in order to carry out two-sided management in such a conventional memory area management method, a nonvolatile memory twice the memory capacity originally required by the system is required. In addition, the period until the nonvolatile memory can no longer be written or updated normally (element lifespan) varies depending on the individual element, and if a unit pit cell in a separate area allocated by two-sided management reaches its element lifespan, becomes unusable.

As described above, in the conventional method, although the redundancy effect due to two-sided management cannot always be obtained sufficiently due to variations in elements, the cost is high, and the control operation to allocate another area by two-sided management is difficult to achieve in software. It was becoming a burden.

Further, in systems where large amounts of data are required to be held in non-volatile memory, the conventional methods have poor applicability in terms of both performance and cost.

SUMMARY OF THE INVENTION An object of the present invention is to provide a nonvolatile memory system that can replace an area where a write error has occurred with a predetermined spare area while reducing the influence of variations in element life and the software load.

[Means to solve the problem]

FIG. 1 is a block diagram of the principle of the present invention.

In the figure, a memory 11 stores predetermined data.

The nonvolatile memory 12 includes a spare area that is accessed for each page that includes an area of a fixed size and is allocated as a replacement page for a page in which a write error has occurred.

The write circuit 13 stores the contents of the memory 11 in the nonvolatile memory 12 according to the write request or replacement page designation information given, and issues a read/inspection request.

The readout/inspection circuit 14 reads the nonvolatile memory 1 in response to the readout/inspection request and replacement page designation information provided.
2 and issues a replacement page determination request depending on whether the content is correct or not.

The replacement page determination circuit 15 specifies a replacement page in response to the replacement page determination request, and sends out replacement page designation information requesting writing to the replacement page.

[For production]

In the present invention, a write circuit 13 writes the contents of a memory 1 into the nonvolatile memory 12 in response to a given write request, and issues a read/inspection request. The readout/inspection circuit 14 reads the contents of the nonvolatile memory 12 in response to the inspection request, and issues a replacement page determination request if the contents are incorrect. In response to the replacement page determination request, the replacement page determination circuit 15 specifies a replacement page for the page in which the write error has occurred, and sends out replacement page designation information requesting writing to the replacement page. The write circuit 13 writes the same contents of the memory 11 to the replacement page according to this replacement page designation information, and performs read/write operations.
Issue an inspection request. Note that such operations are repeated until correct data is written into the nonvolatile memory 12.

In addition, in the read operation of the nonvolatile memory 12, the readout/inspection circuit 14 reads out the contents of the nonvolatile memory 12 in response to the given readout/inspection request, and if the contents are correct, transfers the readout contents to the memory 11. store,
If the read content is incorrect, a replacement page determination request is issued.

In response to the replacement page determination request, the replacement page determination circuit 15 sends replacement page designation information requesting reading of the replacement page allocated to the corresponding page. The readout/inspection circuit 14 reads out the contents of the replacement page according to this replacement page designation information. Note that such operations are repeated until correct data is read from the nonvolatile memory 12.

Therefore, in any area of the nonvolatile memory 12, an area where a write error has occurred can be automatically and quickly replaced with another empty area using dedicated hardware.

〔Example〕

Hereinafter, embodiments of the present invention will be described in detail based on the drawings.

FIG. 2 is a diagram showing an embodiment of the present invention.

In the figure, a processor (CPU) 21 that processes information according to a predetermined program has a control register 22 that holds predetermined control signals via an address/data bus.
, a status register 23 that holds status information to be notified to the processor 21, and a write/read memory 24 that arranges various information depending on the software. The write/read memory 24 is a nonvolatile memory 251 to 25N that retains stored data during a power outage via a local bus that performs high-speed data transfer using a direct memory access (DMA) method, and a nonvolatile memory 251 to 25N that retains data stored in the write/read memory 24. Nonvolatile memory 251
A storage circuit 26 and a nonvolatile memory 25 for storing data in a predetermined area for ~25 seconds. A read/inspection circuit 27 stores the data stored in ~25N in a predetermined area of the write/read memory 24, a replacement page creation circuit 28 that allocates an empty area above the nonvolatile memory 25t~25 in place of the area where a write error has occurred; The area already allocated to the area where the write error occurred is saved in the non-volatile memory 25. ~25
It is connected to a replacement page search circuit 29 that searches from N predetermined areas.

Further, one output of the control register 22 is connected to a map register setting circuit 30 that generates addresses of the nonvolatile memories 25, .about.25N. Map register setting circuit 30
The output of is connected to a map register 31 which generates the physical address of the non-volatile memory 25, to 25g. The output of the three map registers is connected to a storage circuit 26 and a readout/inspection circuit 27. The output of the storage circuit 26 is connected to the status register 23 and the read/test circuit 27. The output of the readout/inspection circuit 27 is connected to the status register 23, the replacement page creation circuit 2, and the replacement page search circuit 29. Replacement page creation circuit 2
8 and the output of the replacement page search circuit 29 are both connected to a map register 31.

Regarding the correspondence between this embodiment and the principle block diagram of the present invention shown in FIG.
4 corresponds to the memory 11, the storage circuit 26 corresponds to the write circuit 13, the read/inspect circuit 27 corresponds to the read/inspect circuit 14, and the replacement page creation circuit 28 and replacement page search circuit 29 are replacement page determination circuits. 15, and nonvolatile memories 25□ to 25.4 correspond to nonvolatile memories 12
corresponds to

FIG. 3 is a diagram showing an example of the structure of data set in the nonvolatile memory.

At the time, the area of the nonvolatile memories 251 to 25N is (
As shown in a), the memory area allocation in this embodiment consists of a spare area used for control and a normally used area where information necessary for the system to which this embodiment is applied is stored. All data stored in the spare area and the normally used area is stored in blocks of the maximum data length that can be written continuously at - times, as shown in (b) and (C).
Hereinafter referred to as "page". )41 as the basic unit. At the beginning of each page, a flag (hereinafter referred to as "data identification flag") 43 is set that identifies the type of data 42 stored in that page. At the end of each page, there is a data identification flag 43 stored in that page.
and an inspection code 44 corresponding to the data 42. Note that the check code 44 is generated using, for example, a horizontal parity check code or a CRC code. Also,
In the spare area, an empty page (data identification flag = rO(
b) The correspondence between the replacement page (data identification flag = "FF") that has already been allocated in place of the error page, the invalid page whose use should be prohibited (data identification flag = "rlA"), and the error page and the replacement page. An error page management table (data identification flag=rlo") in which information indicating the error page is set is stored.

The operation of this embodiment will be explained below with reference to the second section and FIG. 3.

Non-volatile memory 25. ~25. The write operation for
Processor 21 writes to non-volatile memory 25. ~
Array number (KO) indicating the start address of the 25N area,
It is activated by determining the size (L) of data to be written for each desired page and setting these parameters and write command bits in the control register 22.

The map register setting circuit 30 determines the start address corresponding to each page according to the information set in the control register 22, and stores the nonvolatile memory 25. Map the write address of ~25N to map register 3.
Set to 1.

On the other hand, the storage circuit 26 is activated by the write command bit set in the control register 22, reads the contents of the page corresponding to the write address from the write/read memory 24, and adds a predetermined inspection code to the end of each page. and write into the nonvolatile memories 251 to 258. Note that the write address set in the map register 31 is composed of a chip number, a page number, and a corresponding physical address of the nonvolatile memory, and is written in the write/read memory 24 and the nonvolatile memory 25 . ~25N, and data transfer and storage circuit 26 and readout/inspection circuit 27 between these memories.
, the replacement page creation circuit 28, and the replacement page search circuit 29. Storage circuit 26
performs such a write operation on a chip-by-chip basis of the nonvolatile memory, and activates the readout/inspection circuit 27 when writing to the last chip is completed. The read/check circuit 27 checks whether all data has been correctly written in accordance with the write address set in the map register.

It should be noted that these nine testing procedures are the same as the read operation of a nonvolatile memory, which will be described later, so the explanation thereof will be omitted here. In addition, the test results are sent to the readout/test circuit 27
is set in the status register 23 by the write operation for all pages, and is notified to the processor 21 along with the end status bit set by the storage circuit 26 when the write operation for all pages is completed.

Non-volatile memory 25. ~25. The processor 21 performs a read operation of data stored in the nonvolatile memories 251 to 25 . Array number indicating the top address (
K,), the size of the data to be read (L) for each desired page, and setting these parameters and the read command bit in the control register 22. The map register setting circuit 30 stores the set array number (Ko) in the nonvolatile memory 25. It is converted to a corresponding start address (read address) ~25° above and set in the map register 31.

On the other hand, the readout/inspection circuit 27 is activated by the readout command bit set in the control register 22, and reads the contents of the page indicated by the readout address into the nonvolatile memory 22.
5. Read from ~25N.

Further, the readout/inspection circuit 27 checks whether or not a predetermined inspection code matches the inspection code at the end of the read page for each read page, and if they match, the status register 23 is set to normal status. The readout/inspection circuit 27 performs such a readout/inspection operation for all pages set in the control register 22, and when the readout operation of the final page is completed, sets an end status bit in the status register 23, and sends a message to the processor 21. Notifies completion of read operation.

Note that such checking of the contents of each page is similarly performed when checking whether all data has been correctly written during the write operation of the nonvolatile memory described above.

In a write operation to nonvolatile memory, the storage circuit 26
The readout/inspection circuit 27 activated by , recognizes that a write error has occurred if the inspection code at the end of the read page does not match a predetermined inspection code,
The replacement page creation circuit 28 is notified of the nonvolatile memory chip number and page number corresponding to the page. As shown in the flowchart of FIG. 4, the replacement page creation circuit 28 creates an empty page 4 to be allocated as a replacement page from a spare area located on the same chip as the error page 45.
6 is searched for, its data identification flag is rewritten to rFFJ, and the page is reserved as a replacement page.

Furthermore, the replacement page creation circuit 28 generates an error page management table 47 which is arranged on the spare area and includes an empty area.
, and set the error page number and the number of the reserved empty page (replacement page) 46 in the error page management table 47, as shown in FIG. 3(b). Note that the setting operation for the error page management table 47 is as shown in FIG. The data identification flag of the new empty page found through the search is
10'' and generates a new error page management table. The replacement page creation circuit 28 sends the page number of the replacement page 46 to the map register 31 and activates the storage circuit 26 again. The storage circuit 26 writes the data stored in a predetermined area of the write/read memory 24 to the replacement page 46 in accordance with the write address output from the map register 31 corresponding to the replacement page number.

When reading data from the replacement page 46 allocated corresponding to the error page 45, the read/check circuit 27 first reads the contents of the error page 45 according to a normal read operation procedure. The readout/inspection circuit 27 recognizes that it is an error page according to the readout inspection code 44, and notifies the replacement page search circuit 29 of the chip number and page number of the nonvolatile memory corresponding to the error page 45. As shown in the flowchart of FIG. 5, the replacement page search circuit 29 searches for the page number corresponding to the error page 45 from the contents of all error page management tables (data identification flag -11oJ) set in the reserve area. Then, the replacement page number of the replacement page 46 stored together with this page number is read out.

The replacement page search circuit 29 sends the read replacement page number to the map register 31 and activates the readout/inspection circuit 27 again. Readout/inspection DOIm27 is
The data stored in the replacement page 46 is read out in accordance with the read address output by the map register 31 corresponding to this replacement page number, and the data is written in the corresponding area of the write/read memory 24.

Furthermore, in this embodiment, even if a write error occurs in the error page management table, replacement page, etc. located in the spare area of the nonvolatile memory, another empty page is allocated as a replacement page according to the same procedure. Note that there are no restrictions on the arrangement of such a spare area as long as it can be accessed by the storage circuit 26 or the like connected via the local bus.

In this manner, according to this embodiment, an area of the nonvolatile memory where a write error has occurred can be automatically replaced with a predetermined spare area using dedicated hardware.

〔Effect of the invention〕

As described above, according to the present invention, any area of the nonvolatile memory where a write error has occurred can be automatically replaced with a predetermined spare area using dedicated hardware.

Furthermore, in the information processing device to which the present invention is applied, the apparent data arrangement arranged on the nonvolatile memory does not change due to the occurrence of a write error, so software can access the nonvolatile memory based on a fixed data arrangement. .

Therefore, it is possible to realize a stable nonvolatile memory system by reducing the effects of variations in the lifespan of nonvolatile memory elements, and the software load required for two-sided management and other control processing in conventional methods is significantly reduced. Ru.

Furthermore, since the operation of replacing the area where a write error has occurred and the operation of accessing the replaced area are performed at high speed by dedicated hardware, it is possible to improve the processing performance of the entire system.

[Brief explanation of drawings]

Figure 1 is a block diagram of the principle of the present invention. Figure 2 is a diagram showing an embodiment of the present invention. Figure 3 is a diagram showing an example of the structure of data set in non-volatile memory. Figure 4 is replacement page creation. Flowchart showing the procedure of the process. FIG. 5 is a flowchart showing the procedure of the replacement page search process. In the figure, l is memory, 2.251 to 25N are non-volatile memories, 3 is a write circuit, 4.27 is a read/inspection circuit, 5 is a replacement page determination circuit, l is a processor (CPU), 2 is a control register, 3 is a status register, 4 is a write/read memory, 6 is a storage circuit, 8 is a replacement page creation circuit, 9 is a replacement page search circuit, 30 is a map register setting circuit, 31 is a map register, 41 is a page, 42 is data, 43 is a data identification flag, 44 is an inspection code, 45 is an error page, 46 is an empty page (replacement page), and 47 is an error page management table.

Claims (1)

[Claims] (1) A memory (11) in which predetermined data is stored, and a non-volatile memory (11) that includes a spare area that is accessed for each page containing an area of a certain size and is allocated as a replacement page to replace a page where a write error has occurred. 12)
and transfer the contents of the memory (11) to the non-volatile memory (11) in response to a given write request or replacement page designation information.
2), and a write circuit (13) that issues a read/inspection request; and a write circuit (13) that reads the contents of the nonvolatile memory (12) according to the given read/inspection request and the replacement page designation information, and determines whether the contents are correct or not. a read/inspection circuit (14) that issues a replacement page determination request in response to the replacement page determination request; and a read/inspection circuit (14) that specifies the replacement page in response to the replacement page determination request and sends out the replacement page designation information that requests writing to the replacement page. A nonvolatile memory system comprising: a replacement page determination circuit (15).