JPH0473225U - - Google Patents
Info
- Publication number
- JPH0473225U JPH0473225U JP11240990U JP11240990U JPH0473225U JP H0473225 U JPH0473225 U JP H0473225U JP 11240990 U JP11240990 U JP 11240990U JP 11240990 U JP11240990 U JP 11240990U JP H0473225 U JPH0473225 U JP H0473225U
- Authority
- JP
- Japan
- Prior art keywords
- plug
- unit
- determination
- determination device
- subrack
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)
- Tests Of Electronic Circuits (AREA)
- Mounting Of Printed Circuit Boards And The Like (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11240990U JPH0473225U (en:Method) | 1990-10-25 | 1990-10-25 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11240990U JPH0473225U (en:Method) | 1990-10-25 | 1990-10-25 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0473225U true JPH0473225U (en:Method) | 1992-06-26 |
Family
ID=31859915
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11240990U Pending JPH0473225U (en:Method) | 1990-10-25 | 1990-10-25 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0473225U (en:Method) |
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1990
- 1990-10-25 JP JP11240990U patent/JPH0473225U/ja active Pending