JPH0472702B2 - - Google Patents

Info

Publication number
JPH0472702B2
JPH0472702B2 JP59132369A JP13236984A JPH0472702B2 JP H0472702 B2 JPH0472702 B2 JP H0472702B2 JP 59132369 A JP59132369 A JP 59132369A JP 13236984 A JP13236984 A JP 13236984A JP H0472702 B2 JPH0472702 B2 JP H0472702B2
Authority
JP
Japan
Prior art keywords
conductor
recording current
image signal
thermal head
ics
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP59132369A
Other languages
Japanese (ja)
Other versions
JPS6111260A (en
Inventor
Yoshihiko Sato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP59132369A priority Critical patent/JPS6111260A/en
Publication of JPS6111260A publication Critical patent/JPS6111260A/en
Publication of JPH0472702B2 publication Critical patent/JPH0472702B2/ja
Granted legal-status Critical Current

Links

Classifications

    • BPERFORMING OPERATIONS; TRANSPORTING
    • B41PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41JTYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/315Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective application of heat to a heat sensitive printing or impression-transfer material
    • B41J2/32Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective application of heat to a heat sensitive printing or impression-transfer material using thermal heads
    • B41J2/345Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective application of heat to a heat sensitive printing or impression-transfer material using thermal heads characterised by the arrangement of resistors or conductors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for

Landscapes

  • Structure Of Printed Boards (AREA)
  • Electronic Switches (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)

Description

【発明の詳細な説明】 本発明はサーマルヘツドに関し、とくに発熱抵
抗体を直接駆動する複数個のドライバICを用い
るサーマルヘツドに関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a thermal head, and more particularly to a thermal head using a plurality of driver ICs that directly drive a heating resistor.

半導体ICは技術の進歩に伴なつて高集積度化
し、従来と同一の機能を実現するICの外形寸法
は、高集積度IC技術を用いることによつて著し
く小型となる。このために、外形寸法を従来と同
一とするICは、従来の2倍程度の機能を実現す
ることができる。例えば、サーマルヘツドに用い
られるドライバICが駆動する発熱抵抗体数を64
本(m=64)/ICとすると、このICは横幅が2
〜2.5mm前後であり、縦方向が6〜8mm前後の寸
法として実現することができる。
Semiconductor ICs have become highly integrated as technology advances, and the external dimensions of ICs that achieve the same functions as conventional ICs have become significantly smaller by using highly integrated IC technology. For this reason, an IC with the same external dimensions as a conventional IC can realize twice the functionality of a conventional IC. For example, the number of heating resistors driven by a driver IC used in a thermal head is 64.
Assuming book (m=64)/IC, this IC has a width of 2
It is approximately 2.5 mm, and can be realized with a vertical dimension of approximately 6 to 8 mm.

従つて解像度が12本/mmで総抵抗本体数が2560
本のA4判サーマルヘツドを例にとると、ICは
5.418mmピツチで合計40個基板上に並列配置され
ることになるが、ICとICとの間隙は、1〜2mm
と広く形成させることができる。この効果は、発
熱抵抗体の解像度を8本/mmから16本/mm程度に
高めても同様である。
Therefore, the resolution is 12 lines/mm and the total number of resistors is 2560.
Taking an A4 book thermal head as an example, the IC is
A total of 40 ICs will be arranged in parallel on the board with a pitch of 5.418 mm, but the gap between the ICs should be 1 to 2 mm.
It can be formed widely. This effect remains the same even when the resolution of the heating resistor is increased from about 8 lines/mm to about 16 lines/mm.

本発明は、従つて上記間隙に記録電流接地導電
体を設け、しかも画像信号の並列入力を必要とす
るICへ、記録電流接地導電体近傍に設けた導電
体によつてい画像信号を並列供給することにあ
る。
Therefore, the present invention provides a recording current grounding conductor in the above-mentioned gap, and supplies image signals in parallel to an IC that requires parallel input of image signals by means of a conductor provided near the recording current grounding conductor. It's about doing.

本構成の基本的なサーマルヘツドは、例えば特
願昭59−42332にある。これを第1図によつて説
明する。発熱抵抗体列の一端は共通電極から短冊
形に分岐した導電体に接続される。抵抗体の他端
は各々個別導電体L1〜Lnに接続される。従つて
単一のICが64本の抵抗体を駆動する場合にはm
=64となる。個別導電体L1〜LnはICへの接続端
子T1〜Tnまで延長して形成される。端子T1
Tnは第1図に示すように、異なるIC毎に、記録
電流接地導電体PGによつて分離配置される。即
ち、隣接したICの接続端子T1〜Tnの中央近傍に
は、記録電流接地導電体PGが配置される。導電
体PGは第1図に示すように1IC毎に基板の端子部
まで延長して形成させることもできるが、数IC
毎に基板の端子部まで延長して形成されると、サ
ーマルヘツドを駆動する外部端子数は極端に少な
くなる。この場合には、所望により信号線S1
SKをIC間で共通接続することもできる。
A basic thermal head of this configuration is disclosed in, for example, Japanese Patent Application No. 59-42332. This will be explained with reference to FIG. One end of the heating resistor array is connected to a conductor branched into a rectangular shape from the common electrode. The other ends of the resistors are connected to individual conductors L 1 -L n , respectively. Therefore, if a single IC drives 64 resistors, m
=64. The individual conductors L 1 to L n are formed to extend to connection terminals T 1 to T n to the IC. Terminal T 1 ~
As shown in FIG. 1, T n is separated for each different IC by a recording current ground conductor PG . That is, the recording current ground conductor PG is arranged near the center of the connection terminals T 1 to T n of adjacent ICs. The conductor P G can be formed by extending it to the terminal part of the board every 1 IC as shown in Fig.
If each external terminal is formed to extend to the terminal portion of the board, the number of external terminals for driving the thermal head will be extremely reduced. In this case, the signal lines S 1 to
S K can also be commonly connected between ICs.

基板上に搭載されたICはワイヤボンデイング
法、TAB法等により基板と接続される。該搭
載・接続された複数個のICにおいて、並列に画
像信号を入力すべきICには、記録電流接地導電
体PGを2つに分割し、その中央部近傍に新たに
設けられた画像信号入力導電体S′Pより画像信号
が供給される、即ち第1の画像信号入力導電体SP
は、接続端子TP1からIC列の一端に配置されたか
らIC内の最初のシフトレジスタに伝達され、画
像信号はIC内のシフトレジスタを順次転送され
て、画像信号を出力すべき接続端子TP2へ出力さ
れる。接続端子TP2は、次のICの画像信号を入力
すべき接続端子TP1に接続される。従つて画像信
号は複数個のIC内のシフトレジスタを玉突き状
に押し出されて転送される。ところが、並列に画
像信号が入力されるべき最初のICの接続端子TP1
は、隣接したICの画像信号出力端子TP2とは接続
されず、上記記録電流接地導電体を分割して中央
部に配置した第2の画像信号入力導電体S′Pと接
続される。
The IC mounted on the board is connected to the board by wire bonding, TAB method, etc. Among the multiple ICs installed and connected, the recording current grounding conductor PG is divided into two, and a new image signal is provided near the center of the IC to which image signals are input in parallel. An image signal is supplied from the input conductor S′ P , that is, the first image signal input conductor S P
is transmitted from the connection terminal T P1 placed at one end of the IC column to the first shift register in the IC, and the image signal is sequentially transferred through the shift registers in the IC to the connection terminal T P2 that should output the image signal. Output to. The connection terminal T P2 is connected to the connection terminal T P1 to which the image signal of the next IC is to be input. Therefore, the image signal is pushed through shift registers in a plurality of ICs and transferred. However, the connection terminal T P1 of the first IC to which the image signal should be input in parallel
is not connected to the image signal output terminal T P2 of the adjacent IC, but is connected to a second image signal input conductor S′ P which is arranged in the center by dividing the recording current ground conductor.

このような構成のサーマルヘツドは、第1の画
像信号入力導電体SPを具備し、しかもドライバ
ICの接続端子T1〜Tnと、隣接したドライバICの
接続端子T1〜Tnとの間に記録電流接地導電体PG
を配置し、この導電体の中央部に配置した第2の
画像信号入力導電体SP′によつて、所望とするIC
の画像信号入力端子へ画像信号を並列供給するも
のであり、而も実質的に導電体層を一層とする安
価で高信頼度のサーマルヘツドを提供するもので
ある。
A thermal head having such a configuration includes a first image signal input conductor S P and a driver.
A recording current grounding conductor P G is connected between the connection terminals T 1 to T n of the IC and the connection terminals T 1 to T n of the adjacent driver IC.
A second image signal input conductor S P ' placed in the center of this conductor allows the desired IC to be
Image signals are supplied in parallel to the image signal input terminals of the head, and the present invention provides an inexpensive and highly reliable thermal head that has substantially a single conductor layer.

しかし本構成のサーマルヘツドにおいては、画
像信号入力導電体SP′が配置されている両側に記
録電流接地導電体PGが配置されているために、
発熱抵抗体の解像度が高くなりICとICとの間隙
が狭くなつた場合には、導電体のパタン幅が狭く
なつて大電流を流すべき導電体の導体抵抗が大き
くなる欠点があつた。
However, in the thermal head of this configuration, since the recording current ground conductor P G is arranged on both sides of the image signal input conductor S P ',
When the resolution of the heating resistor becomes higher and the gap between the ICs becomes narrower, the pattern width of the conductor becomes narrower, resulting in a disadvantage that the conductor resistance of the conductor through which a large current should flow increases.

本発明の目的は上記欠点を除去し、記録電流接
地導電体幅を広く形成し損失電圧の少ないサーマ
ルヘツドを提供することにある。
SUMMARY OF THE INVENTION An object of the present invention is to eliminate the above-mentioned drawbacks, to provide a thermal head in which the width of the recording current grounding conductor is wide and the loss voltage is low.

本発明によれば、実質的導電体層を一層とする
配線基盤上に複数のICを搭載し、第1の画像入
力信号導電体を前記複数のICのうちの一端に接
続したサーマルヘツドにおいて、発熱抵抗体に接
続ししかも該抵抗体から延長して形成された個別
導電体を各ICへの各接続端子群として各搭載IC
の両側に配置し、隣接した各搭載ICの間の前記
各接続端子群の間に記録電流を接地するための記
録電流接地導電体を設け、第2の画像信号が入力
されるべきICの接続端子群と前記該記録電流接
地導電体との間に第2の画像信号入力導電体を配
し、かつ前記第2の画像信号が入力されるべき
ICの記録電流接地端子を前記記録電流接地導電
体側に配したことを特徴とするサーマルヘツドが
得られる。またこのようなサーマルヘツドにおい
て、上記記録電流接地導電体と第2の画像信号入
力導電体との間に新たな導電体を配することを特
徴とするサーマルヘツドをも得られる。
According to the present invention, in a thermal head in which a plurality of ICs are mounted on a wiring board having a substantially single conductor layer, and a first image input signal conductor is connected to one end of the plurality of ICs, Individual conductors connected to the heating resistor and extending from the resistor are connected to each IC as a group of connection terminals to each mounted IC.
A recording current grounding conductor is provided between each connection terminal group between adjacent mounted ICs to ground the recording current, and the connection of the IC to which the second image signal is to be input is provided. A second image signal input conductor is disposed between the terminal group and the recording current ground conductor, and the second image signal is to be input.
There is obtained a thermal head characterized in that the recording current grounding terminal of the IC is arranged on the recording current grounding conductor side. Furthermore, in such a thermal head, a new conductor is provided between the recording current ground conductor and the second image signal input conductor.

以下に本発明の一実施例を図面を参照して説明
する。
An embodiment of the present invention will be described below with reference to the drawings.

第2図は本発明の一実施例を示した図である。
本発明は図に示すように、第2の画像信号を供給
すべき導電体SP′を記録電流接地導電体PGとICへ
の接続端子T1Tn′との間に配置し、しかも画像
信号を入力すべきICの記録電流接地端子TG′を画
像信号入力導電体SP′を狭んで、ICへの接続端子
T1〜Tn′の側とは反対の側に配置したものであ
る。従つて本発明のサーマルヘツドにおいては、
IC上の電極と接地端子TG′との接続はワイヤボン
デイング法により実施される。
FIG. 2 is a diagram showing an embodiment of the present invention.
As shown in the figure, the present invention arranges a conductor S P ' to supply the second image signal between the recording current ground conductor P G and the connection terminal T 1 T n ' to the IC, and Connect the recording current ground terminal T G ′ of the IC to which the image signal is to be input to the image signal input conductor S P ′ and connect the connection terminal to the IC.
It is arranged on the side opposite to the side of T 1 to T n ′. Therefore, in the thermal head of the present invention,
The electrode on the IC and the ground terminal T G ' are connected by wire bonding.

本発明を実施したサーマルヘツドにおいては、
例えば12本/mmのサーマルヘツドを例にとると、
記録電流接地導電体幅を0.6mm程度とすることが
できた。これに対して、従来のサーマルヘツドに
おいては導体幅は画像信号入力導電体の両側に配
置された2つの導電体を合わせても0.4mm程度に
しかできなかつたものである。従つて本発明のサ
ーマルヘツドは導体抵抗が小さいために印字記録
電圧の損失電圧変動が小さく、印字ムラの小さな
サーマルヘツドを提供することができる。
In the thermal head implementing the present invention,
For example, if we take a thermal head with 12 lines/mm,
The width of the recording current grounding conductor could be approximately 0.6 mm. In contrast, in a conventional thermal head, the conductor width can be only about 0.4 mm, including the two conductors placed on both sides of the image signal input conductor. Therefore, since the thermal head of the present invention has a small conductor resistance, the loss voltage fluctuation of the printing recording voltage is small, and a thermal head with small printing unevenness can be provided.

本発明が上記した効果を呈する以上、本発明の
サーマルヘツドの用途及び発熱抵抗体の解像度、
並列入力すべき画像信号入力導電体数、あるいは
単一のICが駆動できる発熱抵抗体数等は特に限
定されるべきものではなく、またT1〜Tn′の間
に予め接続端子TGを設け、TGとTG′とをワイヤ
ボンデイング法によつて接続すると、ICの搭
載・接続方法も制限されなくなる利点がある。
Since the present invention exhibits the above-described effects, the use of the thermal head and the resolution of the heating resistor of the present invention,
There are no particular limitations on the number of image signal input conductors that should be input in parallel or the number of heating resistors that can be driven by a single IC . If T G and T G ′ are connected by the wire bonding method, there is no restriction on the method of mounting and connecting the IC.

サーマルヘツドにおいては、共通電極あるいは
記録電流接地導電体等導電体部に大電流が流れる
ために、その導電体部を部分的に厚く形成し、あ
るいはメツキ操作等を施して部分的に厚く形成し
ても、本発明の趣旨は何ら損なわれるものではな
い。また、上記第2の画像信号入力導電体SP′と
記録電流接地導電体PGとの間に新たな導電体を
配置し、この新たな導電体を接地電位、ICの論
理部電源、あるいは接地電位と論理部電源電位と
の間を周期的に変動する信号線等に接続して、画
像信号入力電圧に重畳される漏話雑音を小さくす
ることも勿論できる。即ち、上記新たな導電体に
は画像信号出力端子等を接続することができる。
しかし、画像信号出力端子は任意の位置から基板
端子部へ配線されることができるのは当然であ
る。
In thermal heads, large currents flow through conductive parts such as the common electrode or the recording current grounding conductor, so the conductive parts are made thicker in some areas, or by plating, etc. However, the spirit of the present invention is not impaired in any way. Additionally, a new conductor is arranged between the second image signal input conductor S P ′ and the recording current ground conductor P G , and this new conductor is connected to the ground potential, the logic part power supply of the IC, or Of course, crosstalk noise superimposed on the image signal input voltage can be reduced by connecting a signal line or the like that periodically fluctuates between the ground potential and the logic section power supply potential. That is, an image signal output terminal or the like can be connected to the new conductor.
However, it is a matter of course that the image signal output terminal can be wired from any position to the board terminal section.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来のサーマルヘツドを示す模式平面
図、第2図は本発明のサーマルヘツドの一実施例
を示す模式平面図である。 L1〜Ln……個別導電体、T1〜Tn,Tn′……IC
接続端子、TG,TG′……記録電流接地端子、TP1
……画像信号入力端子、TP2……画像信号出力端
子、SP,SP′……画像信号入力導電体、PG……記
録電流接地導電体、S1〜SK……信号線。
FIG. 1 is a schematic plan view showing a conventional thermal head, and FIG. 2 is a schematic plan view showing an embodiment of the thermal head of the present invention. L 1 ~ L n ... Individual conductor, T 1 ~ T n , T n ′... IC
Connection terminal, T G , T G ′... Recording current ground terminal, T P1
...Image signal input terminal, T P2 ...Image signal output terminal, S P , S P ' ...Image signal input conductor, P G ... Recording current grounding conductor, S 1 to S K ... Signal line.

Claims (1)

【特許請求の範囲】 1 実質的導電体層を一層とする配線基盤上に複
数のICを搭載し、第1の画像入力信号導電体SP
を前記複数のICのうちの一端のICを接続したサ
ーマルヘツドにおいて、発熱抵抗体に接続された
個別導電体L1〜Lnを各ICへの各接続端子群T1
Tnとして各搭載ICの両側に配置し、隣接した各
搭載ICの間の前記各接続端子群T1〜Tnの間に記
録電流を接地するための記録電流接地端子TG
TG′を有する記録電流接地導電体PGを設け、第2
の画像信号が入力されるべきICの接続端子群T1
〜Tn′と前記記録電流接地導電体PGとの間に第2
の画像信号入力導電体SP′を配し、かつ前記記録
電流接地端子TG,TG′のうち前記第2の画像信号
が入力されるべきICに接続される方の前記記録
電流接地端子TG′は前記記録電流設置導電体PG
前記第2の画像信号入力導電体SP′に近い側に配
されるとともに前記記録電流接地端子TGよりも
短く形成されていることを特徴とするサーマルヘ
ツド。 2 特許請求の範囲の第1項記載のサーマルヘツ
ドにおいて、前記記録電流接地導電体と第2の画
像信号入力導電体との間に新たな導電体を配する
ことを特徴とするサーマルヘツド。
[Claims] 1. A plurality of ICs are mounted on a wiring board having a single conductive layer, and a first image input signal conductor S P
In the thermal head to which one of the plurality of ICs is connected, the individual conductors L 1 to L n connected to the heating resistor are connected to each connection terminal group T 1 to each IC.
A recording current grounding terminal T G is arranged as Tn on both sides of each mounted IC and is used to ground the recording current between each of the connection terminal groups T 1 to T n between adjacent mounted ICs,
A recording current grounding conductor P G having T G ′ is provided, and a second
Connecting terminal group T 1 of the IC to which the image signal of is to be input
~T n ′ and the recording current ground conductor P G
image signal input conductor S P ′ is disposed, and the recording current ground terminal which is connected to the IC to which the second image signal is inputted among the recording current ground terminals T G and T G ′; T G ′ is arranged on the side of the recording current installation conductor PG closer to the second image signal input conductor S P ′, and is formed shorter than the recording current grounding terminal TG . thermal head. 2. The thermal head according to claim 1, characterized in that a new conductor is disposed between the recording current ground conductor and the second image signal input conductor.
JP59132369A 1984-06-27 1984-06-27 Thermal head Granted JPS6111260A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59132369A JPS6111260A (en) 1984-06-27 1984-06-27 Thermal head

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59132369A JPS6111260A (en) 1984-06-27 1984-06-27 Thermal head

Publications (2)

Publication Number Publication Date
JPS6111260A JPS6111260A (en) 1986-01-18
JPH0472702B2 true JPH0472702B2 (en) 1992-11-18

Family

ID=15079762

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59132369A Granted JPS6111260A (en) 1984-06-27 1984-06-27 Thermal head

Country Status (1)

Country Link
JP (1) JPS6111260A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0533621U (en) * 1991-10-03 1993-04-30 日本オートマチツクマシン株式会社 Wire stripping device

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Publication number Publication date
JPS6111260A (en) 1986-01-18

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