JPH046275Y2 - - Google Patents
Info
- Publication number
- JPH046275Y2 JPH046275Y2 JP1983101251U JP10125183U JPH046275Y2 JP H046275 Y2 JPH046275 Y2 JP H046275Y2 JP 1983101251 U JP1983101251 U JP 1983101251U JP 10125183 U JP10125183 U JP 10125183U JP H046275 Y2 JPH046275 Y2 JP H046275Y2
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- section
- transistor
- power supply
- receiving section
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000010586 diagram Methods 0.000 description 3
- 239000003990 capacitor Substances 0.000 description 1
Landscapes
- Circuits Of Receivers In General (AREA)
- Mobile Radio Communication Systems (AREA)
Description
【考案の詳細な説明】
考案の属する技術分野
本考案は、個別選択呼出受信機に係り、特に受
信部に印加される電圧が周期的に断続するバツテ
リー・セイビング機能を有する個別選択呼出受信
機に関する。[Detailed description of the invention] Technical field to which the invention pertains The present invention relates to an individual selective calling receiver, and more particularly to an individual selective calling receiver having a battery saving function in which the voltage applied to the receiving section is periodically intermittent. .
従来技術の説明
従来、受信部の電源を周期的に断続制御するバ
ツテリー・セイビング機能を有する個別選択呼出
受信機は、第1図に示す様にデコーダ部2より出
力される制御信号aによつてスイツチング用トラ
ンジスタ4をスイツチングし、定電圧電源部5の
出力を断続し、受信部1への電源供給を制御して
いた。又、第2の従来例は第2図に示す様に、前
記スイツチング用トランジスタ4を電池6と定電
圧電源部5の間に接続し、前記定電圧電源部5へ
の電源供給を制御していた。これら、第1及び第
2の従来例においては、電池電源の最低使用可能
電圧VBMINは下記の式で表わされる。Description of the Prior Art Conventionally, an individual selective calling receiver having a battery saving function that periodically controls the power supply of the receiving section on and off uses a control signal a output from a decoder section 2 as shown in FIG. The switching transistor 4 was switched, the output of the constant voltage power supply section 5 was turned on and off, and the power supply to the reception section 1 was controlled. Further, in the second conventional example, as shown in FIG. 2, the switching transistor 4 is connected between the battery 6 and the constant voltage power supply section 5, and the power supply to the constant voltage power supply section 5 is controlled. Ta. In these first and second conventional examples, the minimum usable voltage V BMIN of the battery power source is expressed by the following formula.
VBMIN=VOPMIN+VCE(sat)+VSTBMIN
ここでVOPMINは受信部1の最低動作電圧、
VCE(sat)はスイツチング用トランジスタ4の飽和電
圧、VSTBMINは定電圧電源部5における最小電圧
降下。 V BMIN = V OPMIN +V CE(sat) +V STBMIN where V OPMIN is the minimum operating voltage of receiver 1,
V CE(sat) is the saturation voltage of the switching transistor 4, and V STBMIN is the minimum voltage drop in the constant voltage power supply section 5.
上記の式において、電池の使用可能電圧は受信
部1の最低使用電圧よりVCE(sat)+VSTBMINの分だ
け高くなり、電池を電源として使用する個別選択
呼出受信機においてはこのために電池寿命が短く
なる欠点があつた。又、電池寿命の点から電池の
最低使用可能電圧が決まつている場合には、受信
部の回路は、前記電池の最低使用可能電圧より
VCE(sat)+VSTBMINの分だけ低い電圧まで動作する
様考慮して設計しなければならない。そのため設
計が難しく、電圧が低いために定数、環境等の変
動に対して弱くなる欠点があつた。 In the above equation, the usable voltage of the battery is higher than the minimum usable voltage of receiver 1 by V CE(sat) +V STBMIN , and for this reason, the battery life is limited in individual selective paging receivers that use batteries as a power source. It has the disadvantage that it becomes shorter. In addition, if the minimum usable voltage of the battery is determined from the viewpoint of battery life, the circuit of the receiving section should be
It must be designed to operate at voltages as low as V CE(sat) + V STBMIN . This makes it difficult to design, and the low voltage makes it vulnerable to changes in constants, environment, etc.
又、スイツチング用トランジスタ4の飽和電圧
VCE(sat)を小さくするために、コレクタ抵抗の小さ
い、すなわち大きなサイズのトランジスタが必要
であり、IC化が極めて難しく、従つてチツプサ
イズを小さくするためにはデイスクリートのトラ
ンジスタを必ず必要とする欠点があつた。 In addition, the saturation voltage of the switching transistor 4
In order to reduce V CE(sat) , a transistor with a small collector resistance, that is, a large size, is required, which is extremely difficult to integrate into an IC, and therefore, a discrete transistor is always required to reduce the chip size. There were flaws.
考案の目的
本考案の目的は、無駄な電圧降下をなくして電
池寿命をより長くするとともにデイスクリートト
ランジスタの必要性をなくし、さらには消費電力
をより小さくして電池寿命を長くした個別選択呼
出受信機を提供することにある。Purpose of the invention The purpose of the invention is to eliminate unnecessary voltage drops, extend battery life, eliminate the need for discrete transistors, and further reduce power consumption to extend battery life. The aim is to provide the opportunity.
考案の構成
本考案は、電圧源と受信部との間に定電圧電源
部を接続して同電圧部をデコーダ部からのバツテ
リー・セイビング用の制御信号で直接制御し、さ
らに、定電圧電源部を、上記電圧源からデコーダ
部への電源供給路にコレクタ・エミツタ通路が直
列に挿入された電圧供給トランジスタと、上記制
御信号により導通・非導通が制御される制御用ト
ランジスタと、この制御用トランジスタと電圧源
との間に接続された回路素子を含み当該回路素子
に上記制御用トランジスタが導通したことによつ
て流れる電流にもとづき基準電圧を発生する手段
と、上記受信部に供給される電圧に応じた帰還電
圧を発生する手段と、上記基準電圧と帰還電圧に
もとづき上記電圧供給トランジスタの導通度を制
御する差動増幅器とを有して構成したことを特徴
とする。Structure of the invention The present invention connects a constant voltage power supply section between the voltage source and the receiving section, directly controls the voltage section with a control signal for battery saving from the decoder section, and furthermore, connects the constant voltage power supply section between the voltage source and the receiving section. a voltage supply transistor in which a collector/emitter path is inserted in series in the power supply path from the voltage source to the decoder section, a control transistor whose conduction/non-conduction is controlled by the control signal, and this control transistor. means for generating a reference voltage based on the current flowing through the circuit element when the control transistor is turned on, including a circuit element connected between the circuit element and the voltage source; The present invention is characterized in that it comprises means for generating a corresponding feedback voltage, and a differential amplifier that controls the degree of conductivity of the voltage supply transistor based on the reference voltage and the feedback voltage.
この構成によれば、第1図、第2図に示したス
イツチングトランジスタ4が削除されるので無駄
な電圧降下は生じずかつ同トランジスタのような
デイスクリート部品が不要となり、さらには、バ
ツテリー・セイビング用制御信号により制御用ト
ランジスタが非導通のときは基準電圧が発生しな
いことから定電圧電源部自体での電力消費も発生
せず、電池寿命はさらにのびる。 According to this configuration, since the switching transistor 4 shown in FIGS. 1 and 2 is omitted, unnecessary voltage drop does not occur and a discrete component such as the transistor is not required. When the control transistor is non-conductive due to the saving control signal, no reference voltage is generated, so no power consumption occurs in the constant voltage power supply unit itself, and the battery life is further extended.
実施例
次に本考案の実施例として図面を参照して説明
する。第1の実施例は、第3図に示す。第3図に
おいてデコーダ部2からのバツテリー・セイビン
グ用制御信号aがHighの時、制御用トランジス
タ10はONとなり、抵抗11,12,16及び
トランジスタ13,14,15に電流が流れ、さ
らに他のトランジスタにも電流が流れトランジス
タ19のベースに基準電圧V1が印加される。ト
ランジスタ17,18,19,20,21からな
る差動増幅器において基準電圧V1と帰還電圧V2
との比較を行ない、前記差動増幅器の出力によつ
てトランジスタ23,24を制御し、安定化され
た出力電圧V0が受信部1に供給される。この場
合出力電圧V0は、V0=I1R1+V1、で設定される。
次に前記デコーダ部2からのバツテリー・セイビ
ング用制御信号aがLowの時、前記制御用トラ
ンジスタ10はOFFとなり基準電圧V1はOVとな
る。又、トランジスタ21,25が作り出す定電
流I0,I1もOとなりトランジスタ24はOFF状態
となる。従つて、出力電圧V0はOVとなり受信部
1には電源が供給されない。Embodiments Next, embodiments of the present invention will be described with reference to the drawings. A first embodiment is shown in FIG. In FIG. 3, when the battery saving control signal a from the decoder section 2 is High, the control transistor 10 is turned on, current flows through the resistors 11, 12, 16 and the transistors 13, 14, 15, and other Current also flows through the transistor, and the reference voltage V1 is applied to the base of the transistor 19. In the differential amplifier consisting of transistors 17, 18, 19, 20, and 21, the reference voltage V 1 and the feedback voltage V 2
The transistors 23 and 24 are controlled by the output of the differential amplifier, and a stabilized output voltage V 0 is supplied to the receiver 1. In this case, the output voltage V 0 is set by V 0 =I 1 R 1 +V 1 .
Next, when the battery saving control signal a from the decoder section 2 is Low, the control transistor 10 is turned off and the reference voltage V1 becomes O V. Further, the constant currents I 0 and I 1 generated by the transistors 21 and 25 also become O, and the transistor 24 is turned off. Therefore, the output voltage V 0 becomes O V and no power is supplied to the receiving section 1 .
第2の実施例は第4図に示す様に、第3図のト
ランジスタ21,25を抵抗28,29におきか
えたもので、この場合は出力電圧V0は、
V0=R1+R2/R2×V1、で設定される。 In the second embodiment, as shown in FIG. 4, the transistors 21 and 25 in FIG. 3 are replaced with resistors 28 and 29. In this case, the output voltage V 0 is V 0 =R 1 +R 2 / It is set as R 2 ×V 1 .
考案の効果
本考案は以上説明した様に、デコーダ部からの
バツテリー・セイビング用制御信号により定電圧
電源部の回路動作を直接制御することにより、部
品数を低減すると同時に、むだな電圧降下をなく
し、又電力消費をより少なくし、電池寿命を大き
くのばす効果がある。Effects of the invention As explained above, this invention reduces the number of components and eliminates unnecessary voltage drops by directly controlling the circuit operation of the constant voltage power supply section using the battery saving control signal from the decoder section. , it also has the effect of further reducing power consumption and greatly extending battery life.
第1図、第2図は従来の構成を示す回路図、第
3図は第1の実施例の構成を示す回路図、第4図
は第2の実施例の構成を示す回路図、である。
なお図において、1……受信部、2……デコー
ダ部、3……スピーカ、4……スイツチング用ト
ランジスタ、5……定電圧電源部、6……電池、
10……制御用トランジスタ、11,12,1
6,26,28,29……抵抗、13,14,1
5,17,18,19,20,21,22,2
3,24,25……トランジスタ、27……コン
デンサ、a……制御信号、である。
1 and 2 are circuit diagrams showing the conventional configuration, FIG. 3 is a circuit diagram showing the configuration of the first embodiment, and FIG. 4 is a circuit diagram showing the configuration of the second embodiment. . In the figure, 1... Receiving section, 2... Decoder section, 3... Speaker, 4... Switching transistor, 5... Constant voltage power supply section, 6... Battery,
10...Control transistor, 11, 12, 1
6, 26, 28, 29...Resistance, 13, 14, 1
5, 17, 18, 19, 20, 21, 22, 2
3, 24, 25...transistor, 27...capacitor, a...control signal.
Claims (1)
論理レベルが周期的に変化する制御信号aを発生
するデコーダ部2、このデコーダ部2に復調信号
を供給する受信部1、ならびに前記電圧源6と前
記受信部1との間に接続され前記受信部1への電
源供給を前記制御信号aに応答して制御する定電
圧電源部5を備え、前記定電圧電源部5は、前記
電圧源6から前記受信部1への電源供給路にコレ
クタ・エミツタ通路が直列に挿入された電圧供給
トランジスタ24と、前記制御信号aの論理レベ
ルに応じて導通・非導通が制御される制御用トラ
ンジスタ10と、この制御用トランジスタ10と
前記電圧源6との間に接続された回路素子11−
13を含み当該回路素子11−13に前記制御用
トランジスタ10が導通したことによつて流れる
電流にもとづき基準電圧V1を発生する手段11
−16と、前記受信部1に供給される電圧に応じ
た帰還電圧V2を発生する手段14,22,25,
26;26,29と、前記基準電圧V1と前記帰
還電圧V2にもとづき前記電圧供給トランジスタ
24の導通度を制御する差動増幅器17−23と
を有することを特徴とする個別選択呼出受信機。 A voltage source 6, a decoder section 2 that receives power supply from the voltage source 6 and generates a control signal a whose logic level changes periodically, a receiver section 1 that supplies a demodulated signal to the decoder section 2, and the voltage source. 6 and the receiving section 1, the constant voltage power supply section 5 is connected between the receiving section 1 and the receiving section 1, and controls the power supply to the receiving section 1 in response to the control signal a. A voltage supply transistor 24 having a collector-emitter path inserted in series in the power supply path from 6 to the receiving section 1, and a control transistor 10 whose conduction/non-conduction is controlled according to the logic level of the control signal a. and a circuit element 11- connected between this control transistor 10 and the voltage source 6.
means 11 for generating the reference voltage V 1 based on the current flowing through the circuit element 11-13 when the control transistor 10 is turned on;
-16, means 14, 22, 25 for generating a feedback voltage V 2 according to the voltage supplied to the receiving section 1;
26; 26, 29; and a differential amplifier 17-23 that controls the conductivity of the voltage supply transistor 24 based on the reference voltage V1 and the feedback voltage V2 . .
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1983101251U JPS609350U (en) | 1983-06-29 | 1983-06-29 | Individual selective call receiver |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1983101251U JPS609350U (en) | 1983-06-29 | 1983-06-29 | Individual selective call receiver |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS609350U JPS609350U (en) | 1985-01-22 |
JPH046275Y2 true JPH046275Y2 (en) | 1992-02-20 |
Family
ID=30239178
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1983101251U Granted JPS609350U (en) | 1983-06-29 | 1983-06-29 | Individual selective call receiver |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS609350U (en) |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5271902A (en) * | 1975-12-11 | 1977-06-15 | Matsushita Electric Ind Co Ltd | Selective call communication system |
JPS543249A (en) * | 1977-06-09 | 1979-01-11 | Matsushita Electric Ind Co Ltd | Stabilized power source |
JPS5442218U (en) * | 1977-08-31 | 1979-03-22 |
-
1983
- 1983-06-29 JP JP1983101251U patent/JPS609350U/en active Granted
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5271902A (en) * | 1975-12-11 | 1977-06-15 | Matsushita Electric Ind Co Ltd | Selective call communication system |
JPS543249A (en) * | 1977-06-09 | 1979-01-11 | Matsushita Electric Ind Co Ltd | Stabilized power source |
JPS5442218U (en) * | 1977-08-31 | 1979-03-22 |
Also Published As
Publication number | Publication date |
---|---|
JPS609350U (en) | 1985-01-22 |
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