JPH0459152U - - Google Patents
Info
- Publication number
- JPH0459152U JPH0459152U JP10121790U JP10121790U JPH0459152U JP H0459152 U JPH0459152 U JP H0459152U JP 10121790 U JP10121790 U JP 10121790U JP 10121790 U JP10121790 U JP 10121790U JP H0459152 U JPH0459152 U JP H0459152U
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- lsi chip
- integrated circuit
- bad
- check
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Testing Of Individual Semiconductor Devices (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10121790U JPH0459152U (sv) | 1990-09-27 | 1990-09-27 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10121790U JPH0459152U (sv) | 1990-09-27 | 1990-09-27 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0459152U true JPH0459152U (sv) | 1992-05-21 |
Family
ID=31844485
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10121790U Pending JPH0459152U (sv) | 1990-09-27 | 1990-09-27 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0459152U (sv) |
-
1990
- 1990-09-27 JP JP10121790U patent/JPH0459152U/ja active Pending