JPH0458759U - - Google Patents
Info
- Publication number
- JPH0458759U JPH0458759U JP9991390U JP9991390U JPH0458759U JP H0458759 U JPH0458759 U JP H0458759U JP 9991390 U JP9991390 U JP 9991390U JP 9991390 U JP9991390 U JP 9991390U JP H0458759 U JPH0458759 U JP H0458759U
- Authority
- JP
- Japan
- Prior art keywords
- output
- control circuit
- output level
- system control
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Debugging And Monitoring (AREA)
- Microcomputers (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9991390U JPH0458759U (nl) | 1990-09-25 | 1990-09-25 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9991390U JPH0458759U (nl) | 1990-09-25 | 1990-09-25 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0458759U true JPH0458759U (nl) | 1992-05-20 |
Family
ID=31842172
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9991390U Pending JPH0458759U (nl) | 1990-09-25 | 1990-09-25 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0458759U (nl) |
-
1990
- 1990-09-25 JP JP9991390U patent/JPH0458759U/ja active Pending