JPH0457977U - - Google Patents
Info
- Publication number
- JPH0457977U JPH0457977U JP9931290U JP9931290U JPH0457977U JP H0457977 U JPH0457977 U JP H0457977U JP 9931290 U JP9931290 U JP 9931290U JP 9931290 U JP9931290 U JP 9931290U JP H0457977 U JPH0457977 U JP H0457977U
- Authority
- JP
- Japan
- Prior art keywords
- contrast
- signal
- integrated circuit
- input
- interface integrated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000011159 matrix material Substances 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Processing Of Color Television Signals (AREA)
- Semiconductor Integrated Circuits (AREA)
- Television Receiver Circuits (AREA)
- Transforming Electric Information Into Light Information (AREA)
Description
第1図は本考案の一実施例を示すインタフエー
ス集積回路のコントラスト可変回路ブロツク図、
第2図は従来のインタフエース集積回路のコント
ラスト可変ブロツク図、第3図は従来のインタフ
エース集積回路のコントラストおよび明るさ可変
ブロツク図である。
1a,1b,1cは輝度信号Yおよび色差信号
R−Y,B−Yの利得を調整する可変利得増幅器
、4はマトリクス2用インタフエース集積回路、
3はコントラスト可変回路、5は明るさ可変回路
である。
FIG. 1 is a block diagram of a contrast variable circuit of an interface integrated circuit showing an embodiment of the present invention;
FIG. 2 is a block diagram of a conventional interface integrated circuit with variable contrast, and FIG. 3 is a block diagram of a conventional interface integrated circuit with variable contrast and brightness. 1a, 1b, 1c are variable gain amplifiers that adjust the gains of the luminance signal Y and the color difference signals R-Y, B-Y; 4 is an interface integrated circuit for matrix 2;
3 is a contrast variable circuit, and 5 is a brightness variable circuit.
Claims (1)
入力輝度信号Yのみコントラスト抑制する輝度信
号Yおよび色差信号R−Y,B−Yを入力しRG
B原色信号を出力するマトリクス用インタフエー
ス集積回路または出力RGB原色信号それぞれの
コントラストおよび明るさを同時に制御するマト
リクス用インタフエース集積回路の輝度信号Yお
よび色差信号R−Y,B−Y入力端子にそれぞれ
可変利得増幅器を接続してなるコントラスト可変
回路。 In color signal processing circuits such as clear vision,
Input only the input luminance signal Y and the color difference signals R-Y and B-Y to suppress the contrast.
To the luminance signal Y and color difference signal R-Y, B-Y input terminal of the matrix interface integrated circuit that outputs the B primary color signal or the matrix interface integrated circuit that simultaneously controls the contrast and brightness of each output RGB primary color signal. A variable contrast circuit consisting of a variable gain amplifier connected to each.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9931290U JPH0457977U (en) | 1990-09-21 | 1990-09-21 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9931290U JPH0457977U (en) | 1990-09-21 | 1990-09-21 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0457977U true JPH0457977U (en) | 1992-05-19 |
Family
ID=31841147
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9931290U Pending JPH0457977U (en) | 1990-09-21 | 1990-09-21 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0457977U (en) |
-
1990
- 1990-09-21 JP JP9931290U patent/JPH0457977U/ja active Pending
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