JPH0456565A - Picture processor - Google Patents

Abstract

PURPOSE:To suppress increase in data quantity even in the case of coding through the use of MH, MR codes by integrating error data of a position of a picture element apart from a noted picture element or a picture element close to the noted picture element in response to a state of a change in a binary level of a binarized picture in a prescribed block. CONSTITUTION:The unit is provided with a change point number detection means 18 comparing an input picture data of one block with a predetermined slice level and obtaining a change point number of a binary level and a surrounding error selection means 19 selecting one set of surrounding picture element position corresponding to a noted picture element in an error storage means 17 depending on number of change points and reading one set of surrounding error from the picture element position, and the error data of one set of picture element position adjacent to or apart from the noted picture element is subject to weighting addition as a surrounding error data in response to the state of an input multi-value picture within a prescribed picture element including the noted picture element, the input level is corrected by the accumulated error to execute the error diffusion processing. Thus, while keeping the picture quality characteristic of the error diffusion processing, the increase in the data quantity is suppressed even in the case of coding while using MH, MR codes.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to image processing devices, particularly facsimiles, copying machines, D
The present invention relates to a device that is used in a TP device, a workstation, etc., and performs halftone processing using an error diffusion method.

2. Description of the Related Art Conventionally, this type of image processing apparatus is known as, for example, Japanese Patent Laid-Open No. 62
There is the one shown in Japanese Patent No.-69773 and the one shown in FIG.

The image processing device shown in FIG. 8 includes an input terminal 1 for inputting a multivalued image signal, an input correction means 2 for adding up integration errors at peripheral pixel positions and outputting a correction level, and a predetermined correction level for the correction level. a binarization means 4 that determines the binarization level of the pixel of interest by comparing it with the slice level 3 obtained by the process; a binarization image output unit 5 that outputs the binarization level;
Difference calculation means 6 for calculating a binarization error based on a difference in digitization levels, error storage means 7 for storing the binarization error in correspondence with the position of the pixel of interest, and error storage means for storing errors of surrounding pixels of the pixel of interest. A weighted addition means 8 reads out the information from the input data, performs weighted addition according to a predetermined coefficient, and obtains an integration error. In such a conventional image processing device, the multilevel image level is processed by error diffusion processing! l) Converted to binary level.

Problems to be Solved by the Invention However, in such conventional image processing devices, the binary image obtained by error diffusion processing has poor gradation characteristics and resolution compared to the binary image obtained by one dither processing. Although it has excellent characteristics in terms of both characteristics and has a large moiré suppression effect, when binary image output data is encoded by MH and MR, the data compression rate does not improve and the amount of data is smaller than before encoding. There was a problem that the communication time became abnormally long.

The present invention has been made in view of the above-mentioned problems, and its purpose is to maintain the image quality characteristics of error diffusion processing while
An object of the present invention is to provide an image processing device capable of suppressing an increase in the amount of data and preventing an abnormally long communication time even when encoding is performed.

Means for Solving the Problems In order to achieve the above object, the present invention binarizes an input multilevel image in which a certain pixel range including the pixel of interest is treated as one block, and determines the level of the binarization. According to the state of change, the error data of a set of pixel positions adjacent to the pixel of interest or a set of pixel positions far from the pixel of interest are weighted and added as peripheral error data to obtain an integrated error, and the input level is corrected using the integrated error. , the gist is to execute error diffusion processing.

Effect With the above configuration, error data at pixel positions far from the pixel of interest are accumulated in the non-character portion of the binarized image within a certain block. The compression ratio can be improved since there is a low probability that a black or white run length of two or more pixels will appear corresponding to the distance between the pixel positions of the error data. At this time, the resolution of the binary image gradually deteriorates as the black and white run lengths increase, but since the input image is a non-text portion with little change in density level, the deterioration in resolution does not affect the image quality. It does not affect.

In addition, in the character part of a binarized image within a certain block of the image, it is necessary to accumulate error data at pixel positions adjacent to the pixel of interest, so a binary image with excellent gradation and resolution similar to conventional ones can be obtained. It will be done.

Embodiment FIGS. 1 to 3 are diagrams showing a first embodiment of an image processing apparatus according to the present invention.

In these figures, reference numeral 11 is an input terminal for inputting a multi-valued image signal, 12 is an input correction means for adding the input level of the pixel of interest and the integrated error of its surrounding pixel positions, and outputting a correction level, and 13 is the above-mentioned correction unit. A binarization means compares the level with a predetermined slice level 14 and determines the binarization level of the pixel of interest; 15 is a binarized image output unit that outputs the binarization level; 16 is the correction level; Difference calculation means calculates a binarization error based on a difference in binarization levels, and 17 is an error storage means that stores the binarization error in correspondence with the pixel position of interest. Further, reference numeral 18 indicates a change in which the input multilevel image data, in which a certain pixel range including the pixel of interest is treated as one block, is compared with a predetermined slice level to determine the binarization level, and the number of change points in the binarization level is determined. point detection means; 19 is peripheral error selection means for selecting a set of peripheral pixel positions corresponding to the pixel of interest in the error storage means based on the number of change points, and reading out a set of peripheral errors from the pixel positions; - A weighted addition means that performs weighted addition based on a set of peripheral errors and a predetermined coefficient to obtain an integrated error.

The operation of the image processing apparatus having such a configuration will be described below.

The input correction means 12 adds the multi-value image data input from the multi-value image input section 11 and the accumulated errors of the peripheral pixel positions of the pixel of interest, and outputs a correction level. The binarization means 13 compares the correction level with a predetermined slice level 14 and determines the binary image data of the pixel of interest to be output from the image output section 15. The difference calculation means 16 calculates the correction level and 2.
A binarization error is obtained from the difference in the digitization levels, and the binarization error is stored in the error storage means 17 in association with the pixel of interest. The change point number detecting means 18 compares the input image data, in which a certain pixel range including the pixel of interest is taken as one block, with a predetermined slice level to determine the binarization level.
Find the number of changes in the value level. Marginal error selection means 19
selects a set of peripheral pixel positions corresponding to the pixel of interest in the error storage means based on the magnitude of the number of change points, and reads out a set of peripheral errors from the selected pixel positions. Further, the weighted addition means weights and adds the - group of peripheral errors and a predetermined coefficient to obtain an integrated error.

FIG. 2 is a block diagram showing an example of the circuit configuration of the peripheral error selection means 19 and the weighted addition means in the block diagram shown in FIG. 1. In this figure, reference numeral 21 is a comparator that compares the change point number input η from the change point number detection means 18 with a predetermined slice level B to obtain a peripheral pixel position selection signal, and 24, 5, and 26 are peripheral pixel position selection signals. Selector for selecting marginal error by 27.28.29.
30 is a multiplier that multiplies a predetermined error diffusion coefficient;
31, 32, and 33 are adders for calculating the sum of the multiplication results.

In such a circuit configuration, when the number of change points n is smaller than the slice level, the selectors 24, 5, and 26 correspond to the pixel position distant from the pixel of interest among the input signals on the A side and B side, respectively. Select the A side signal. Further, when the input change point number n is larger than the slice level n, the selector 24.5.26 selects the B-side signal corresponding to the pixel position adjacent to the pixel of interest. The selected signal is multiplied by an error diffusion coefficient by the weighted addition means, and the sum is outputted as an integrated error.

FIG. 3 is a block diagram of the change point detection means in FIG. 1. In this figure, reference numeral 41 is a comparator that compares the multivalued image input 11 and the slice level 42 to obtain a binary image level, 43 is a latch that shifts the binary image level by one pixel, and 44 is an EXOR (exclusive OR). ) gate, 45 is a change point number counter that counts the number of pixels for which the EXOR output becomes 1 in a block, and 46 is a change point number output.

In this circuit, the comparator 41 compares the multi-valued image input 11 and the slice level 42 to obtain a binary image level, and the latch 43 shifts the binary image level by one pixel and outputs it. The EXOR gate 44 calculates the exclusive OR of the binary image levels before and after the one-pixel shift, and as a result outputs 1'' at the change point of the binary image level.Change point number counter 45
counts the number of pixels in the block whose EXOR output is 1'', and outputs the result as the number of change points n.

FIGS. 4 and 5 are diagrams showing a second embodiment of the image processing apparatus according to the present invention.

The image processing device according to this embodiment basically consists of the first
Since it has the same configuration as the image processing apparatus of the embodiment, the same parts are given the same reference numerals and detailed explanation will be omitted.

The image processing apparatus according to this embodiment inputs multivalued image data instead of the change point detection means 18 in the first embodiment and calculates the maximum level difference between the pixel of interest and image data within a certain range around it. A maximum level difference detection means 50 is provided, and the output of this maximum level difference detection means 50 is sent to the peripheral error selection means 19.

The maximum level difference detection means 50 detects the difference between the maximum level and minimum level within the data range based on the input levels of the pixel of interest and its surrounding pixels, calculates the difference between the maximum level and the minimum level, and calculates the maximum level difference. demand. The detection result of this maximum level difference is input to the peripheral error selection means 19, which selects a set of peripheral pixel positions corresponding to the pixel of interest in the error storage means according to the magnitude of the maximum level difference, and Read out the peripheral error of the pixel position and the set. Next, the weighted addition means weights and adds the - group of peripheral errors and a predetermined coefficient to obtain an integrated error.

FIG. 5 is a block diagram showing a specific example of the maximum level difference detection means 50 in FIG. 4. In this figure, 51.52 is a 1-line buffer memory that shifts the image signal by 1 line, and 53.54.55.56.57.
A latch that shifts the image signal for each pixel, -59 is a maximum value detection means, 60 is a minimum value detection means, 61 is a difference calculation means,
62 indicates the maximum level difference output.

In such a configuration, ■ line buffer memory 51.5;
2 and latches 53, 54, 55, 56, 57, and 58, the target pixel signal e and its peripheral pixel signal a.

by CP d, fy gt hy 1 is generated. The maximum value detection means 59 detects the signals a, b, c,
The maximum level is determined from d, et ft ILh, i, and the minimum value detection means 60 still detects the signal &r by
Find the minimum level from Ct d,et L gt h+1. Then, the difference calculating means 61 subtracts the minimum value from the maximum value to obtain a maximum level difference. This maximum level difference detection method is an example, and it is possible to further increase the number of surrounding pixels, or divide the input pixels into predetermined blocks instead of calculating the maximum level difference for each pixel as in the above method. Possible methods include finding the maximum level difference within a block.

FIGS. 6 and 7 are diagrams showing a third embodiment of the image processing apparatus according to the present invention.

The image processing device according to this embodiment also basically has the same configuration as the image processing device of the first embodiment, so the same parts are given the same reference numerals and detailed explanations will be omitted. . The image processing apparatus according to this embodiment uses the input level of the pixel of interest and its surrounding pixels in place of the change point detection means 18 in the first embodiment and the maximum level difference detection means 50 in the second embodiment. It is equipped with a power spectrum calculation means 70 for determining the spatial frequency of the spatial frequency -1it, and is configured to send the output of the Cr7-spectrum calculation means 70 to the peripheral error selection means 19.

This power spectrum calculation means 70 performs discrete Fourier transform on the input levels of the pixel of interest and its surrounding pixels, and performs a maximum spatial frequency (1/1 of the Sambrinno frequency of the input image).
2) Find the power spectrum amount. The peripheral error selection means 19 selects a set of peripheral pixel positions corresponding to the pixel of interest in the error storage means 17 based on the above-mentioned war spectrum amount, and reads out the peripheral errors of the set from the pixel positions.Then, the weighted addition means adds is weighted and added to the marginal errors of the − group and a predetermined coefficient to obtain an integrated error.

FIG. 7 is a block diagram showing an example of the lower spectrum calculation means 70 in FIG. 6. In this diagram,
71.72 is a one-line buffer memory that shifts the image signal by one line, 73.74.75.76 is a latch that shifts the image signal for each pixel, and 77.78.79.80
81 is an adder, 81 is a multiplication means, and 82 is an absolute value calculation means that outputs a power spectrum output 83 by leaving it as is when the sign of the input signal is positive, or by multiplying by -1 when it is negative.

The general formula for discrete Fourier transform is expressed as follows for N sample data x (n).

When the power spectrum of the maximum spatial frequency between two adjacent pixels is determined in the above equation with N=2 and k=1, it becomes p (1) −1x (]) = l x (0) −x (1) 1, As a result, the power spectrum between the pixel of interest and four pixels adjacent in the main scanning direction and the sub-scanning direction is P-"a e+b-e+c-e+d-ea, where e is the signal level corresponding to the pixel of interest in FIG. 7.
+ b + c + d −4e.

1 line buffer memory 71.72 and latch 73.74
．． 75.76, the above formula lL+ b+ C+ do
The adder 77, 78, 79, 80, coefficient multiplication means 81, and absolute value calculation means 82 perform the calculation of the above equation. This power spectrum calculation method is just an example, and methods such as increasing the number of samples N, or adding data in a diagonal direction as a reference pixel are conceivable.

As described in detail, according to the present invention, an image processing device is provided with a set of pixels adjacent to the pixel of interest or a set of pixels separated from the pixel of interest, depending on the state of an input multilevel image of a certain pixel range including the pixel of interest. The error data of a set of pixel positions is weighted and summed as peripheral error data to obtain an integrated error, and the input level is corrected using the integrated error to perform error diffusion processing, so the image quality characteristics of error diffusion processing are maintained. Tsutsu, MH, MR
Even in the case of encoding, it is possible to suppress an increase in the amount of data and prevent the communication time from becoming abnormally long.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a first embodiment of an image processing apparatus according to the present invention, FIG. 2 is a block diagram showing an example of the circuit configuration of the peripheral error selection means and weighted addition means shown in FIG. 1, and FIG. is a block diagram showing an example of the circuit configuration of the change point detection means in FIG. 1, FIG. 4 is a block diagram showing a second embodiment of the image processing device according to the present invention, and FIG. FIG. 6 is a block diagram showing an example of the circuit configuration of the difference detection means, FIG. 6 is a block diagram showing a third embodiment of the image processing device according to the present invention, and FIG. 7 is a block diagram showing the circuit configuration of the power spectrum calculation means of FIG. 6. Block Diagram Showing an Example FIG. 8 is a block diagram showing an example of a conventional image processing device. 11... Multivalued image input, 12... Input correction means, 1
3... Binarization means, 15... Binary image output, 16.
- Difference calculation output stage, 17...Error storage means, 18...
Change point number detection means, 19... peripheral error selection means,
Addition: Weighted addition means, 50: Maximum level difference detection means, 70: Power spectrum calculation means. Name of agent: Patent attorney Shigetaka Awano and one other person

Claims (3)

[Claims] (1) An image signal input means for inputting an image signal, an input correction means for calculating a correction level from the input level of the pixel of interest and the integrated error of the surrounding pixel positions, and a A difference calculating means for calculating a value conversion error, an error storage means for storing a value corresponding to the position of a pixel of interest, and a means for calculating a value of a value, and a means for calculating a value of a value, and a means for calculating a value of a value. change point number detection means for detecting the number of change points; and peripheral error selection for selecting a set of peripheral pixel positions corresponding to the pixel of interest in the error storage means based on the change point number and reading out a set of peripheral errors from the pixel positions. and weighted addition means for performing weighted addition based on the set of peripheral errors and a predetermined coefficient to obtain an integrated error. (2) In place of the change point number detecting means, a maximum level difference detecting means for determining the maximum level difference between the pixel of interest and the image data within a certain range around it is provided, and furthermore, the peripheral error selecting means detects the maximum level difference according to the maximum level difference. 2. The image processing apparatus according to claim 1, further comprising selecting a set of peripheral pixel positions corresponding to a pixel of interest in the error storage means and reading out a set of peripheral errors from the selected pixel positions. (3) In place of the change point number detection means, a power spectrum calculation means for calculating a power spectrum amount of a predetermined spatial frequency from the input level of the pixel of interest and its surrounding pixels is provided, and furthermore, the peripheral error selection means is configured to calculate the power spectrum amount based on the power spectrum amount. 2. The image processing apparatus according to claim 1, wherein a set of peripheral pixel positions corresponding to the pixel of interest in the error storage means is selected, and a set of peripheral errors is read from the selected pixel positions.