JPH045595A - Input signal noise removing device - Google Patents

Abstract

PURPOSE:To improve long-distance detecting ability by selectively removing noises which have shorter width than a target signal to be extracted, and making the target signal not to drop in level and easily separating and extracting the fine target signal from noises. CONSTITUTION:A level setting circuit 5 supplies a reference voltage to comparators 6a, 6b, and 6c respectively and the outputs of those comparators are clocked for a constant time. Slicers 9a, 9b, and 9d slice the received signal of a receiving circuit 4 with levels supplied from a level setter 5. Namely, the slicer 9a extracts signals exceeding a voltage Va, the slicer 9b extracts signals between voltages Va - Vb, and the slicer 9c extracts signals below the voltage Vb. Then gate circuits 8a - 8c set the output signals of the slicers forcibly to 0 at intervals of clocked time obtained by timer circuits 7a, 7b, and 7c and send the signals to an adding circuit 109 as they are in other periods. Then the noises which have shorter width than the target signal are removed selectively and the target signal is separated from the noises.

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application This invention relates to an input signal noise removal device that is applied to radar, sonar, etc., and effectively removes noise components contained in a signal.

(6) Conventional technology When displaying received images on a display device in radar, sonar, etc., in high-intensity conditions, external noise or noise generated in the signal system is mixed into the received signal, resulting in fine dot-shaped noise. The noise that may be displayed is not only unsightly, but also
When automatically tracking a target object in RPA), etc., a problem arises in that noise is erroneously tracked and the original target object is no longer tracked.

In order to solve the second problem, -S is slightly lowered to prevent unnecessary noise from being mixed in.

(C) Problem to be Solved by the Invention However, if the noise is reduced by lowering the noise level, the level of the target signal will also be lowered, which may result in the inability to extract very weak target signals.

SUMMARY OF THE INVENTION An object of the present invention is to provide an input signal noise removal device that can effectively remove noise without lowering the level of a target signal, thereby solving the above-mentioned conventional problems.

(d) Means for Solving the Problems The input signal noise removal device according to claim (1) of the present invention has a level difference between a target signal to be extracted and an input signal including a noise signal having a width shorter than the target signal. input signal slicing means for slicing at a plurality of different levels; short-time signal removal means for removing the signal for a predetermined time shorter than the width of the target signal from the rise timing of each sliced signal; and each of the removed short-time signals. and signal synthesis means for superimposing signals.

Furthermore, the human-powered signal noise removal device according to claim (2) of the present invention is capable of dividing a target signal to be extracted and an input signal including a noise signal having a width shorter than the target signal using a plurality of threshold values having different levels. An input signal binarization means for converting the input signal into a value, a short-time signal removal means for reducing the binary signal to a 0 level for a predetermined time shorter than the width of the target signal from the rise timing of the plurality of binary signals, It consists of a signal synthesizing means for superimposing each removed binary signal and synthesizing it as a multi-level signal.

(e) Operation In the input signal noise removal device according to claim (1), the input signal slicing means slices the input signal at a plurality of different levels, and the short-time signal removal means slices each sliced signal. The signal is removed for a certain period of time shorter than the width of the target signal from the rise timing.0 The human signal contains the target signal to be extracted and a noise signal whose width is shorter than this target signal, so the width is shorter than the width of the target signal. Noise signals are removed by signal removal for a certain period of time. On the other hand, since the fixed time period is sufficiently shorter than the width of the target signal, the signal removal process for the fixed time period only removes a portion of the sliced target signal, leaving most of it remaining. Then, the signal synthesizing means overlaps each signal from which the short-time signals have been removed, thereby restoring a signal containing only the target signal from which most of the noise has been removed. Note that since the target signal is subjected to signal removal for a certain period of time for each sliced signal, even if the target signal has a sloped rise, the shape of the rise portion is well preserved.

In the input signal noise removal device according to claim (2), the input signal binarization means binarizes the input signal using a plurality of threshold values having different levels, and the short-time signal removal means binarizes each of the binarized signals. The signal level is set to O level for a certain period of time shorter than the width of the target signal from the rising timing of the signal. Since the above-mentioned fixed time is shorter than the width of the target signal, only a part of the target signal is removed by the signal removal process for this fixed time, and most of it remains. On the other hand, since noise has a shorter time width than the target signal, most of the noise is removed by the signal removal process for a certain period of time. Then, the signal synthesizing means synthesizes the binarized signals from which the short-time signals have been removed to form a multi-level signal. Note that since the above-mentioned signal removal process for a certain period of time is performed for each signal binarized with different threshold values, the rising shape of the signal after synthesis is well preserved.

(r) Embodiment FIG. 1 shows a block diagram of the main parts of a radar apparatus according to an embodiment of the present invention, and FIG. 2 shows a waveform diagram of each part.

In FIG. 1, a control circuit 1 provides a transmission trigger signal to a transmission circuit 2. In FIG. The transmitting circuit 2 provides a transmitting signal to the antenna 3 in response to this trigger signal. The receiving circuit 4 amplifies the signal received by the antenna 3. The level setting circuit 5 includes a comparator 6a.

A reference voltage is applied to each of 6b and 6c. Comparators 6a, 6b, and 6c compare the signals received by receiving circuit 4 with reference voltages provided by level setting circuit 5, respectively. The timer circuits 7a, 7b, and 7c each measure a certain period of time (all of the timer circuits may have the same time or may all have different times) after the outputs of the comparators 6a, 6b, and 6C rise, respectively. Slicer 9a
.

9b and 9c slice the received signal of the receiving circuit 4 at the level given from the level setting circuit 5, respectively. That is, the slicer 9a extracts only the signal exceeding the voltage Va,
Slicer 9b extracts only signals between voltages Va and Vb, and slicer 9c extracts only signals below voltage vb.

Gate circuits 8a8b and 8c are timer circuits 7a and 8c, respectively.
7b.

Each slicer 9a, 9b by the time measured by 7c.

The output signal of 9c is forcibly set to 0, and is output to the adder circuit 10 as it is during the other periods. Addition circuit 10 is game) 8
The output signals of a, 8b, and 8c are added (overlaid) to output a composite signal.

(a) to (k) shown in Figure 2 are (a) shown in Figure 1.
It is an example of a waveform of each part of - (k). In FIG. 2, S is a target signal, and N1 and N2 are noise signals. Generally, a noise signal has a lower amplitude level and a shorter duration than a target signal. The slicers 9a, 9b, 9c shown in FIG. 1 receive such received signals at predetermined levels Va and Vb.
By slicing, the signals (b), (c), and (d) are obtained. On the other hand, the comparators 6a, 6b, and 6c shown in FIG. 1 receive the received signals VaVb and Vc, respectively.
The timer circuits 7a, 7b,
7c each maintains the "H" level for a certain period of time from each of the above timings (see (e), (g), (i) in Figure 2),
Therefore, from the gate circuits 8a, 8b, and 8c, the second
Signals from which short-time signals have been removed are obtained as shown in (f), (h), and (j) in the figure. Then, the adder circuit 10 adds the signals (f), (h), and (j), respectively, thereby obtaining a composite signal shown as (k). The noise signals Nl and N2 are removed as shown in step 2. Note that the rising part of the combined target signal S' becomes step-like due to signal slicing and short-time signal removal, but the original target signal S The sloped shape of the rising part is well preserved.

Next, FIG. 3 shows a specific circuit example of the timer circuit 7 shown in FIG. 1, and FIG. 4 shows waveforms at each part thereof.

In Fig. 3, the resistor R and the capacitor C constitute a CR time constant circuit, and when the input signal of the timer circuit is at "L" level, the transistor Q is turned on and the charge of the capacitor C is discharged, and the input signal of the timer circuit is When is at "H" level, transistor Q is turned off and capacitor C is charged with the CR time constant. Therefore, as shown in FIG. 4, the output of the comparator 11 becomes the "H" level after a certain period of time T after the input of the timer circuit becomes the "H" level. In this way C
The gate circuit 8 shown in FIG. 1 cuts the output signal of each slicer 9 for a time (T in FIG. 4) determined by the relationship between the R time constant and the reference voltage of the comparator.

As the timer circuit, it is also possible to use a circuit that counts a certain period of time using an oscillation circuit and a counter, a monostable multivibrator, etc. Next, a block diagram of the main parts of the radar device according to the second embodiment is shown in Fig. 5. Shown below. The difference from the example shown in FIG. 1 is that the timer circuits 7a, 7b,
7C itself measures a certain period of time from the rise of the sliced signal. The rest of the configuration is the same as that in FIG. 1, with slicers 9a, 9b, and 9c slicing the received signal at two levels Va and vb,
Each of the gate circuits 8a, 8b, and 8c is a timer circuit 7a.
, 7b, 7c are used to perform short-time signal removal,
Adder circuit 10 adds these signals.

A block diagram of the main parts of the radar device according to the third embodiment is shown in FIG. 6. The difference from the example shown in FIG.
, 7c, the output signal of the received signal 4 is directly gate-controlled according to the output signal of the slicers 9a, 9b, 9c, respectively.
This is because the output signal of c is sliced. In this way, a similar combined signal can be obtained by first performing short-time signal removal and then performing slicing.

A main block diagram of the radar device according to the fourth embodiment is shown in FIG. 7, and a waveform diagram of each part thereof is shown in FIG. 8.

In FIG. 7, voltage conversion circuits 12a, 12b12c are circuits that convert logic level input signals into predetermined voltage level signals. Comparators 6a, 6b, and 6c compare the output signals of the receiving circuit 4 with reference voltages Va, Vb, and Vc outputted from the level setting circuit 5, and timer circuits 7a, 7b, and 7c respectively compare the output signals of the receiving circuit 4 with reference voltages Va, Vb, and Vc output from the level setting circuit 5.
This is similar to the circuit shown in FIG. 1, in that the output signal of c is kept at the "H'" level for a certain period of time after the output signal rises. The difference from the example shown in FIG. 1 is that comparators 6a, 6b, and 6c perform short-time signal removal on signals binarized at predetermined levels, respectively.

(a) to (k) shown in Fig. 8 are Ua shown in Fig. 7)
It is an example of a waveform of each part of - (k). In FIG. 8, S is the target signal to be extracted, and N1 and N2 are noise signals.

From such human signals, comparators 5a, 6b, 6c
As a result, binarized signals as shown in (b), (c), and (d) are obtained, respectively. Therefore, the timer circuits 7a, 7b,
The output of 7c has 2 as shown in (e), (f), and (g).
A rectangular wave signal that maintains the "H" level for a certain period of time from the rise of the value signal is output. Therefore, AND gate 14a,
As shown in (h), (i), and (j), binarized signals are obtained from 14b and 14c, in which signals are removed for a certain period of time from the rise of the binarized signal. In this example, since the fixed time T is longer than the time width of the noise binary signal, the noise signal is removed. Voltage conversion circuit 12 shown in FIG.
a, 12b, 12c are (h), (i), (j) respectively
Each signal is converted into a voltage signal of a predetermined level, and the adder circuit 10 adds these signals to obtain a composite signal shown in (k).

Although all of the embodiments described above have been concerned with signal noise removal within one sweep, the present invention can be similarly applied to the azimuth direction. An example will be described below.

The circuit diagram of the main part that removes noise in the azimuth direction is shown in Part 9.
The difference between the circuit shown in FIG. 9 and the circuit shown in FIG. 7 is that a memory 15 and an AND gate 18 are provided between the AND gate 14b and the voltage conversion circuit 12b, and
A memory 16. is connected between the D gate 14c and the voltage conversion circuit 12c.
17 and an AND gate 19. The memories 15, 16, and 17 each store the binary received signal for one switch, and the AND gate 18 stores the current signal output from the AND gate 14b and the signal stored in the memory 15. When the signal appears in both the previous signal and the previous signal, the output is set to the "H" level. Furthermore, when the current signal outputted from the AND gate 14c, the previous signal outputted from the memory 16, and the previous signal outputted from the memory 17 are all present, the AND gate 19 changes the output to "°H". ° level.Therefore, the signal binarized at level Va is always valid regardless of the g/absence of the signal in the previous sweep, but
The signal binarized at level vb becomes effective only when it exists for two sweeps or more. Therefore, for signals of this level, the first one sweep of signals that are continuous in the azimuth direction is removed. The signal binarized at level Vc becomes effective only when it exists continuously for three sweeps. Therefore, from the signals of this level, the signals corresponding to the first two switches among the signals continuous in the azimuth direction are removed.

In the example shown in Fig. 9, the number of sweeps to be removed from the leading part of the signal continuous in the azimuth direction is set to differ depending on the threshold value when binarizing, but this number is set to be equal. Depending on the distance from the antenna to the target, the number of sweeps to be removed may be reduced for signals received from a long distance, and the number of sweeps to be removed for signals received from a short distance may be reduced. The configuration may be such that the number is increased. In addition,
In the embodiments described above, short-time signal removal and signal addition are performed using a dedicated circuit. Similar results can also be obtained by controlling a signal processor or the like.

(6) Effects of the Invention According to the present invention, noise having a width shorter than that of the target signal to be extracted is selectively removed, and the level of the target signal does not decrease, so that a weak target signal can be separated from the noise. and can be easily extracted. Moreover, since the input signal is divided according to the level and the signal is removed for a short time for each divided signal, even if the rise of the target signal is sloped, the shape of the slope can be reproduced. Therefore, if this is applied to radar, sonar, etc.,
Detection ability at long distances will be improved.

[Brief explanation of the drawing]

FIGS. 1 and 2 are block diagrams of main parts of a radar device according to a first embodiment and waveform diagrams of each part. 3 and 4 are waveform diagrams of the timer circuit and its respective parts. FIGS. 5 and 6 are block diagrams of the main parts of radar devices according to second and third embodiments. FIGS. 7 and 8 are block diagrams of main parts of a radar device according to a fourth embodiment and waveform diagrams of each part thereof. Figure 9 is the fifth
FIG. 2 is a block diagram of the main parts of the radar device according to the embodiment. 6.11 - Comparators.

Claims (2)

[Claims] (1) An input signal slicing means for slicing an input signal including a target signal to be extracted and a noise signal having a width shorter than the target signal at a plurality of different levels, and a target signal based on the rise timing of each sliced signal. An input signal noise removal device comprising: short-time signal removal means for removing a signal for a predetermined time period shorter than the width of the short-time signal; and signal synthesis means for superimposing signals from which the short-time signals have been removed. (2) input signal binarization means for binarizing an input signal including a target signal to be extracted and a noise signal having a width shorter than the target signal using a plurality of threshold values having different levels; and a plurality of binarizations. A short-time signal removing means sets the binary signal to 0 level for a predetermined time shorter than the width of the target signal from the rising timing of the signal, and superimposes each binary signal from which the short-time signal has been removed to form a multi-level signal. An input signal noise removal device comprising signal synthesis means for synthesizing signals.