JPH0452673B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an audio signal reproducing method in a magnetic recording/reproducing device (hereinafter referred to as VTR), and more specifically, the present invention relates to an audio signal reproducing method for a magnetic recording/reproducing device (hereinafter referred to as VTR), and more specifically, for reproducing an audio signal recorded together with a color television signal by a rotating magnetic head. The present invention relates to an audio signal reproduction method.

In a conventional VTR, an audio signal is recorded on a separate track on the same magnetic tape as a color television signal (referred to as a video signal in this specification) by a fixed head, and then reproduced. On the other hand, in order to enable long-term recording in VTRs, the running speed of the magnetic tape has been slowed down. If the running speed of the magnetic tape is slowed down, it becomes difficult to record and reproduce audio signals using a fixed head.

In this case, it has been proposed to use a rotating magnetic head that records the video signal to record and reproduce the audio signal by superimposing it on the recording track of the video signal. An example of this recording method is shown in Figure 1. It is like that.

The video signal S _a shown in FIG. 2a supplied to the input terminal V _IN is supplied to the low-pass filter 1 and the bandpass filter 3, and from the low-pass filter 1 the luminance signal and horizontal synchronization signal shown in FIG. 2b are combined. A composite signal S _b is taken out, and a composite signal S _C of the color burst signal and color signal shown in FIG. 2c is taken out by the bandpass filter 3. The output signal S _b of the low-pass filter 1 is supplied to the frequency modulator 2 via the switch circuit 16 and frequency-converted.
The output signal S _C of the bandpass filter 3 is supplied to a frequency converter 4 and converted to a lower frequency. On the other hand, the output signal of the frequency modulator 2 and the output signal of the frequency converter 4 are supplied to a mixing recording circuit 5 where they are mixed, and then transferred to a magnetic tape 7 by a rotating magnetic head 6.
recorded in

On the other hand, the output signal S _b of the low-pass filter 1 is supplied to the horizontal synchronization signal separation circuit 8, where the horizontal synchronization signal is separated from the output signal of the low-pass filter 1, and the separated horizontal synchronization signal S _d ' is supplied to the waveform shaping circuit 9 consisting of a monostable multivibrator to obtain the pseudo-horizontal synchronization signal shown in Fig. 2d, which has a width shorter than the pulse width of the horizontal synchronization signal S _d ', and performs pseudo-horizontal synchronization. The signal S _d is supplied to an audio clock generator 10 and an adder 11 .

The audio clock generator 10 outputs an output pulse with a frequency of _3fH ( _fH is the repetition frequency of the horizontal synchronization signal) synchronized with a pseudo-horizontal synchronization signal, an output pulse with a frequency of _455fH /2 synchronized with a pseudo-horizontal synchronization signal, and a pseudo-horizontal pulse. Three output pulses with a frequency of 455f _H /16 are output for each pseudo-horizontal synchronization signal with a slight delay of time Δt from the trailing edge of the synchronization signal and in synchronization with the pseudo-horizontal synchronization signal.

On the other hand, the left channel audio signal and the right channel audio signal supplied to the input terminals A _IN1 and A _IN2 are supplied to the difference detection circuits 12 and 12'. The difference detection circuits 12 and 12' are supplied with an output pulse of frequency 3fH from the audio clock generator 10, and the audio signal supplied to the difference detection circuits 12 and 12' is transmitted every 1/ _3fH seconds, that is, As shown in FIG. 2h, the differential signal is sampled three times during each period of 1/f _H at times t ₁ , t ₂ , and t _{3 and} is output. The output signals of the difference detection circuits 12 and 12' are supplied to A/D converters 13 and 13'. The A/D converters 13 and 13' are supplied with a clock pulse of frequency _3fH output from the audio clock generator 10 as a conversion signal, and convert the output signals of the difference detection circuits 12 and 12' into 8-bit pulse codes. It is modulated and output every 1/3f _H seconds.

Further, the encoded differential audio signals obtained by the A/D converters 13 and 13' are supplied to the multilevel encoder 14,
According to the 3f _H pulse from the audio clock generator 10 that is supplied to the multilevel encoder 14,
It is converted into an 8-bit 4-value logic encoded differential audio signal every _3fH , and the 4-value logic encoded differential audio signal is supplied to a recording circuit constituting the time compression circuit 15. A pulse with a frequency of 3f _H output from the audio clock generator 10 is supplied to this memory circuit as a write pulse, and a pulse with a frequency of 455f _H /16 output from the audio clock generator 10 is supplied as a read pulse. The four-value logic encoded differential sound signal output from the multi-value encoder 14 is stored in the storage device every 1/ _3fH seconds. The four-valued logical differential audio signal stored in the storage device is read out every 16/ _455fH seconds and supplied to a shift register constituting the time compression circuit 15. The shift register is supplied with 455f _H /2 pulses output from the audio clock generator 10, and the 8-bit 4-value logic code differential audio signal read from the storage device is output for 2/455f _H seconds ( One bit is output for every 0.279 μSee) and supplied to the adder 11 as time-compressed serial data S _e . This time compressed serial data
The adder 11 adds S _e and the pseudo horizontal synchronizing signal S _d output from the waveform shaping circuit 9 . Therefore, the output signal S _e of the time compression circuit 15 is as shown in FIG. 3 e ₁ and is inserted at the position shown in FIG. 2 e, and the output signal of the adder 11 is as shown in FIG. 2 f.

On the other hand, the audio clock generator 10 generates an output signal with a slightly longer time width than the period of the output signal of the adder 11, which is the sum of the pseudo horizontal synchronization signal S _d and the output signal from the time compression circuit 15. The signal is supplied to the switch circuit 16, and during the generation period of this output signal, the switch circuit 16 is passed through the low-pass filter 1.
switch from the adder 11 side to the adder 11 side.

Therefore, from the switch circuit 16, as shown in _FIG.
will be output. This composite signal S _g is supplied to the frequency modulator 2 and frequency modulated. This frequency modulated composite signal is mixed with the low frequency converted color signal and recorded on the magnetic tape 7 by the rotating magnetic head 6.

Therefore, the audio signal and the video signal are superimposed and recorded on the same recording track by the rotating magnetic head 6. On the other hand, the total time of the horizontal synchronization signal and the back porch is 9.2μSec or more. The time-compressed four-level logic encoded differential audio signal is (8 bits x 3 x 0.279μSec = 6.7μSec), and the horizontal synchronization signal S _d ' is a pseudo horizontal synchronization signal S _d whose pulse width is shortened. Since the interval Δt between the pseudo horizontal synchronization signal S _d and the time-compressed 4-value logic encoded differential audio signal is small, the time-compressed 4-value logic encoded differential audio signal
The value logic encoded differential audio signal does not extend into the range of the luminance signal, but falls within the back pouch.

The present invention provides a reproduction method for reproducing an audio signal recorded on a magnetic tape by a rotating magnetic head together with a video signal as described above, and the present invention provides a frequency conversion circuit for reproducing a low-frequency conversion color signal when reproducing an audio signal. The oscillation frequency of the color carrier frequency oscillator is divided by a frequency divider, the frequency divider is reset with a signal related to the horizontal synchronization signal, and a clock signal for reproducing the encoded differential audio signal is obtained from the output of the frequency divider. The encoded differential audio signal is read out from the reproduction signal detected by the rotating magnetic head in start-stop synchronization with the reproduction clock signal, and is reproduced as an audio signal.

The present invention will be explained below with reference to Examples.

FIG. 3 is a block diagram of an embodiment to which the regeneration method of the present invention is applied.

The signal recorded on the magnetic tape 7 is detected by the rotating magnetic head 6 and amplified by the reproduction preamplifier 20, which amplifies the amplified signal from the first rotating magnetic head and the signal from the second rotating magnetic head. The output is switched by a 30Hz switching signal related to the vertical synchronization signal. In FIG. 3, the first and second rotating magnetic heads are shown as one rotating magnetic head 6.

The signal from the reproduction preamplifier 20 is supplied to a low-pass filter 21 and a band-pass filter 22, and the low-pass filter 21 extracts a color burst signal and a color signal converted to a low frequency. The output signal of the low-pass filter 21 is supplied to the frequency conversion circuit 23, which produces a 3.58MHz color burst signal and a 3.58M color burst signal as shown in FIG.
It is converted into a composite signal S _c with a color signal of Hz±500KHz and output. A composite signal of a frequency-modulated luminance signal, a four-value logic encoded differential audio signal, and a pseudo-horizontal synchronization signal is extracted from the bandpass filter 22. This signal output from the bandpass filter 22 is supplied to the demodulator 24 and the second
As shown in Figure g, a composite signal consisting of a luminance signal, a four-value logic encoded differential audio signal, and a pseudo-horizontal synchronization signal
Demodulated to S _g . The output signal S _g of the demodulation circuit 24 is supplied to a pseudo-horizontal synchronization signal separation circuit 25 and switch circuits 26, 29, and the pseudo-horizontal synchronization signal separation circuit 25 generates a pseudo-horizontal synchronization signal as shown in FIG. 2d.
S _d is demultiplexed, and the four-value logic encoded differential audio signal S _e shown in FIG. 2e is extracted by the switch circuit 26, as will be described later.

The output signal _Sd of the pseudo horizontal synchronization signal separation circuit 25 is sent to the waveform shaping circuit 27 and the audio clock generator 2.
8. The waveform shaping circuit 27 generates first and second signals triggered by the leading edge of the pseudo horizontal synchronization _signal
It consists of a monostable multivibrator. The first monostable multivibrator has a set time so as to output a pulse having the same length as the pulse width of the horizontal synchronizing signal, and its output signal is supplied to the switch circuit 29. On the other hand, the second monostable multivibrator has a set time so that it outputs a pulse with a slightly longer time than the output pulse width of the first monostable multivibrator, and its output signal is transmitted to the switch circuit. 29, the switch circuit 29 is switched from the demodulator 24 side to the first monostable multivibrator side for only the pulse output period of the second monostable multivibrator. Therefore, the output signal S _b of the switch circuit 29
The output signal S _b of the switch circuit 29 is a superimposed output of the luminance signal and the horizontal synchronization signal as shown in FIG. On the other hand, the output signal S _c of the frequency conversion circuit 23 is also supplied to the adder 30 , and the output signal S _c of the frequency conversion circuit 23 and the output signal S _b of the switch circuit 29 are superimposed in the adder 30 and added. The signal S _a shown in FIG. 2a from the device 30
is output.

On the other hand, the audio clock generator 28 is constructed as shown in FIG. 4, for example.

In FIG. 4, it is shown together with a part of a known frequency conversion circuit 23. 23-1 is a main frequency conversion circuit, which converts the color burst signal and color signal (629KHz±500KHz) converted into low frequency output from the low-pass filter 21 and the 4.2MHz output from the band-pass filter 23-8.
The signal is supplied and frequency converted, and the output signal S _c
(3.58MHz±500KHz) is output. The output signal S _c of the main frequency conversion circuit 23-1 is the burst gate 2
3-2, the color burst signal (3.58MHz) is extracted and sent to the phase comparator 23-2.
4, and its phase is compared with the 3.58MHz oscillation output output from the crystal oscillator 23-3. The output of the phase comparator 23-4 is a variable frequency oscillator (n×
Oscillates at a free running frequency of 3.58MHz = 455nf _H /2. n = 1, 2, 3...) 23-5, and the oscillation output of the variable frequency oscillator 23-5 has a period of n minutes 23-6.
The frequency is divided by n, and the sub frequency conversion circuit 23
-7 is supplied. The sub frequency conversion circuit 23-7 is supplied with a signal (629KHz) from an automatic frequency control circuit (not shown) and the output signal of the frequency divider 26-6, and both input signals are mixed and passed through the bandpass filter 23. -8, the output with a center frequency of 4.2 MHz is output to the main frequency conversion circuit 23-1 and mixed with the output signal from the low-pass filter 21.

On the other hand, the audio clock oscillator 28 is supplied with the oscillation output of the variable frequency oscillator 23-5, and has a frequency divider 28-2 and a frequency divider 28-2 that divides the oscillation frequency by n.
The frequency divider 28-3 divides the frequency by 455n/6, and the frequency divider 28-4 divides the output signal of the frequency divider 28-2 by 8. Therefore, the frequency of the output signal of frequency divider 28-2 is 455f _H /2, the frequency of the output signal of frequency divider 28-3 is 3f _H , and the frequency of the output signal of frequency divider 28-4 is 455f _H /2. /16. The audio clock generator 28 also includes a differentiation circuit 28-5 and a differentiation circuit 2 for differentiating the output signal _Sd of the pseudo horizontal synchronization signal separation circuit 25.
A waveform shaping circuit 28-6 that takes out the positive output pulse of 8-5 and shapes the waveform;
A monostable multivibrator 28-7 is provided which is triggered on the leading edge of the output pulse of. Therefore, the fifth
The pseudo horizontal synchronizing signal _Sd shown in a is the differentiator circuit 28-5.
The output signal of the differentiating circuit 28-5 becomes as shown in FIG. 5b. This differentiation circuit 28-5
The positive pulse of the output signal _S5 is sent to the waveform shaping circuit 28-
The monostable multivibrator 28-7 is triggered by the waveform-shaped output, and the output signal _S6 of the monostable multivibrator 28-7 becomes as shown in FIG. 5c. Here, the setting time for setting the output pulse width of the monostable multivibrator 28-7 is set to the above-mentioned Δt.

Also, the audio clock generator 28 has a frequency divider 28.
-Gate circuit 28- which gates the output pulse of -2.
8. A 24-digit counter 28-9 that counts the output pulses of the gate circuit 28-8, a setting device 28-10 that sets the count output of the 24-decimal counter 28-9 when 24 counts have been made, and a count output of the counter 28-9. A comparator 28-11 which compares the output of the setter 28-10 and outputs an output when they match, is set at the trailing edge of the output _S6 of the monostable multivibrator 28-7, and outputs an output when they match. Q is reset at the leading edge.
The flip-flop 28-12 controls the opening and closing of the gate circuit 28-8 with its output. Frequency divider 28-2 and counter 28-9 are configured to be reset by the output of monostable multivibrator 28-7. Therefore, the output _S7 of the flip-flop 28-12 is the fifth output as shown in FIG. 5d.
Δt set by the monostable multivibrator 28-7 from the trailing edge of the pseudo horizontal synchronization signal S _d shown in Figure a.
A period of counting 24 output pulses of the frequency divider 28-4 with a period of 2/455f _H (0.279μs) from the time elapsed,
A high potential is output, and during this period the gate circuit 28-8
will open the gate. FIG. 5e shows the output pulses from gate circuit 28-8.

On the other hand, the switch circuit 26 is connected to the flip-flop 2
The output pulse _S7 of the flip-flop 28-12 is supplied so that the circuit is closed only during the period when the output pulse _S7 of the flip-flop 28-12 is at a high potential. Therefore, the switch circuit 26 outputs only the four-value logic encoded differential audio signal S _e among the output signals of the demodulator 24, as shown in FIG. 2e.
The four-value logic encoded difference signal S _e output from the switch circuit 26 is supplied to the binarization decoder 31 .
The output pulse of the frequency divider 28-2 is supplied to the binarization decoder 31, and a four-value logic encoded difference is generated every output pulse of the frequency divider 28-2, that is, every period of 2/455f _H seconds. The audio signal is binarized and separated into a left channel binary logic encoded differential audio signal and a right channel binary logic encoded differential audio signal. The time expansion circuit 33 also includes a shift register 32-1 and a shift register 32-1, which are supplied with the encoded differential audio signal of the left and right channels binarized by the binarization decoder 31 and convert it into 8-bit parallel data.
The output pulse of the frequency divider 28-2 is supplied to the shift register 32-1.
The output data of the binary decoder 31 is sequentially read every -2 output pulses. Further, the output pulse of the frequency divider 28-4 is supplied as a write signal to the storage device 32-2, and the output pulse of the frequency divider 28-3 is supplied as a read signal. Frequency divider 28
The period of the -2 output pulse is 2/ _455fH seconds, and the output of the binarization decoder 31 is read every 2/ _455fH seconds and converted into 8-bit parallel data by the shift register 32-1. . Also, frequency divider 28-4
The period of the output pulse is 16/455f _H seconds, and the binary logic encoded differential audio signal converted into 8-bit parallel data by the shift register 32-1 is stored in the storage device 32-2 at intervals of 16/455f _H seconds. will be written to. Read signal of storage device 32-2, that is, frequency divider 28-
The period of the output pulse No. 3 is 1/3f _H seconds, and the period of the output pulse No. 3 is 1/3f H seconds, and the period of the output pulse No.
The value logic code difference audio signal is read out every 1/ _3fH seconds and subjected to time expansion. The binary logic encoded difference signals of the left and right channels read out from the storage device 32-2 are sent to a digital/analog converter (hereinafter referred to as
The signal is supplied to a D/A converter) 33. D/A
The output pulse of the frequency divider 28-3 is supplied to the converter 33, and the stored content read from the storage device 32-2 is converted into an analog signal every 1/3f _H seconds and supplied to the differential demodulation circuit 34. be done. Differential demodulation circuit 34
The frequency divider 34 is supplied with the output pulse of the frequency divider 28-3, samples and holds the analog signal converted by the D/A converter 33 every 1/3f _H seconds, and performs differential demodulation. The differential demodulated signal is passed through low pass filter 3
5, and left and right channel audio signals are obtained from the output terminals of the low-pass filter 35, respectively.

Although digital signals do not fit well into waveform diagram displays,
The audio signal reproduction process is shown in waveforms as shown in FIG. FIG. 6b shows the shift register 32
Signals output from −1 (SN ₁ ) ₀ to (SN ₁ ) ₇ ,
(SN ₂ ) ₀ to (SN ₂ ) ₇ are shown one by one, and FIG. 6a illustrates the output signal S _e of the switch circuit 26. Further, FIG. 6c shows the signals (SP ₁ ) ₀ to (SP ₁ ) ₇ , (SP ₂ ) ₀ to
(SP ₂ ) ₇ are illustrated one by one, and FIG. 6 d shows the differential audio signals SQ ₁ and SQ ₂ converted into analog values by the D/A converter 33, and FIG. indicate output signals SR ₁ and SR ₂ of the differential demodulation circuit 34, respectively.

The differentially encoded audio signal recorded on the magnetic tape 7 by the rotating magnetic head 6 on the same recording track as the video signal is reproduced as described above. In this case, the clock signal for audio signal reproduction is obtained by dividing the output frequency of the variable frequency oscillator 23-5 in the APC circuit in the frequency conversion circuit 23 by n, and the frequency divider 28-2 is obtained by dividing the output frequency by n. It is designed to be reset by the output pulse of the vibrator 28-7. Therefore, by selecting a large value n of the output frequency 455nf _H /2 of the variable frequency oscillator 23-5, the output pulse of the frequency divider 28-4 is synchronized with the rise of the Q output of the flip-flop 28-12. Even if there are fluctuations in the time axis caused by expansion and contraction of the magnetic tape 7 and hunting of the drive system of the magnetic tape 7,
Since it is output in association with the horizontal synchronization signal every horizontal operation period, there is no possibility that the encoded differential audio signal will be missed.

Note that in the above explanation, the variable frequency oscillator 23
-5 is set to 455nf _{H /} 2 and the output is divided into n fractions. n times, i.e.
455nf _H /2, the output of the crystal oscillator 23-3 is divided by the frequency dividers 28-2 and 28-3, and the frequency divider 23 is connected to the output terminal of the crystal oscillator 23-3.
-6 may be inserted to divide the oscillation frequency of the crystal oscillator 23-3 by n and apply it to the phase comparator 23-4.

In any case, there is no need to prepare a special oscillator to obtain the clock signal for audio signal reproduction.
There is no need to consider the removal of beats that would occur if a new oscillator was provided to obtain a clock for audio signal reproduction.

A similar effect can also be obtained by resetting the frequency divider 28-2 using a pseudo horizontal synchronizing signal. This is because the output pulse width Δt of the monostable multivibrator 28-7 is set extremely short and can be set in relation to a period of 2/455f _H.

Note that by recording the same audio signal on the conventional audio signal recording track of the magnetic tape, the audio signal can also be reproduced using a conventional VTR, thereby maintaining compatibility.

As explained above, according to the present invention, in a reproduction method for reproducing an encoded differential audio signal inserted in a horizontal blanking period on a video signal track of a magnetic tape by a rotating magnetic head, a low frequency conversion color signal can be reproduced. A frequency divider is provided to divide the oscillation frequency of the color carrier frequency oscillator of the frequency conversion circuit during reproduction, and the frequency divider is reset by a signal related to the horizontal synchronization signal, and the encoded difference is calculated from the output of the frequency divider. Since a clock signal for reproducing the audio signal is obtained and the encoded differential audio signal is read out in start-stop synchronization with the reproducing clock signal, there is no need to provide a separate oscillator to obtain the reproducing clock signal. Furthermore, even if the position of the encoded differential audio signal changes due to fluctuations in the time axis caused by expansion of the magnetic tape, etc., the frequency divider is reset by a signal related to the horizontal synchronization signal, so the encoded differential audio signal Audio signals can be reliably read.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an example of a recording device for explaining the reproduction method of the present invention. FIG. 2 is a waveform diagram for explaining the operation of the recording apparatus shown in FIG. 1. FIG. 3 is a block diagram showing an embodiment of a reproducing apparatus to which the method of the present invention is applied. FIG. 4 is a block diagram showing an example of an audio clock generator used in the playback device shown in FIG. 3. 5 and 6 are waveform charts for explaining the operation of the reproducing device shown in FIG. 3. 1 and 21...Low pass filter, 2...Modulator, 3 and 22...Band pass filter, 4
...Frequency converter, 6...Rotating magnetic head, 7...
...Magnetic tape, 8...Horizontal synchronization signal separation circuit, 9
and 27... waveform shaping circuit, 10 and 28...
...Audio clock generator, 12 and 12'...
Difference detection circuit, 13 and 13'... A/D converter, 14... Multi-value encoder, 15... Time compression circuit, 16, 26 and 29... Switch circuit, 23... Frequency conversion circuit, 24... ...demodulator,
25...Pseudo horizontal synchronization signal separation circuit, 31...2
Value decoder, 32... Time expansion circuit, 33...
D/A converter, 34...Differential demodulation circuit, 35...
Low-pass filter, 23-3...Crystal oscillator, 2
3-4... Phase comparator, 23-5... Variable frequency oscillator, 23-6, 28-2, 28-3 and 2
8-4... Frequency divider, 28-5... Differentiation circuit, 28
-6... Waveform shaping circuit, 28-7... Monostable multivibrator, 28-8... Gate circuit, 28
-9... Counter, 28-10... Setting device, 28
-11...Comparator, 28-12...Flip-flop.

Claims (1)

[Claims] 1. Sampling the audio signal to be recorded together with the video signal with a signal related to the horizontal synchronization signal,
The difference between the sampled audio signal values is encoded and time-compressed, and the time-compressed encoded differential audio signal is transferred from the magnetic tape recorded within the horizontal blanking period of the video signal to the horizontal blanking line. In an audio signal reproducing method for reproducing a coded differential audio signal recorded within an erasing period, the oscillation frequency of a color carrier frequency oscillator of a frequency conversion circuit during reproduction of a low frequency conversion color signal is divided by a frequency divider, and the The frequency divider is reset by a signal related to the horizontal synchronization signal, a clock signal for reproducing the encoded differential audio signal is obtained from the output of the frequency divider, and the reproduction is performed from the reproduction signal detected by the rotating magnetic head. 1. An audio signal reproducing method characterized in that an encoded differential audio signal is read out in start-stop synchronization with an ordinary clock signal and is reproduced as an audio signal.