JPH0451144U - - Google Patents
Info
- Publication number
- JPH0451144U JPH0451144U JP9161790U JP9161790U JPH0451144U JP H0451144 U JPH0451144 U JP H0451144U JP 9161790 U JP9161790 U JP 9161790U JP 9161790 U JP9161790 U JP 9161790U JP H0451144 U JPH0451144 U JP H0451144U
- Authority
- JP
- Japan
- Prior art keywords
- resin
- substrate
- semiconductor device
- groove
- sealed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 10
- 239000000758 substrate Substances 0.000 claims description 5
- 239000011347 resin Substances 0.000 claims description 3
- 229920005989 resin Polymers 0.000 claims description 3
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15151—Shape the die mounting substrate comprising an aperture, e.g. for underfilling, outgassing, window type wire connections
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Wire Bonding (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9161790U JPH0451144U (US07655746-20100202-C00011.png) | 1990-09-03 | 1990-09-03 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9161790U JPH0451144U (US07655746-20100202-C00011.png) | 1990-09-03 | 1990-09-03 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0451144U true JPH0451144U (US07655746-20100202-C00011.png) | 1992-04-30 |
Family
ID=31827421
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9161790U Pending JPH0451144U (US07655746-20100202-C00011.png) | 1990-09-03 | 1990-09-03 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0451144U (US07655746-20100202-C00011.png) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH1126645A (ja) * | 1997-07-03 | 1999-01-29 | Mitsubishi Electric Corp | 半導体集積回路装置とその製造方法 |
WO2003003445A1 (en) * | 2001-06-29 | 2003-01-09 | Fujitsu Limited | Sheet for underfill, method for underfilling semiconductor chip, and method for mounting semiconductor chip |
WO2008078746A1 (ja) * | 2006-12-26 | 2008-07-03 | Panasonic Corporation | 半導体素子の実装構造体及び半導体素子の実装方法 |
-
1990
- 1990-09-03 JP JP9161790U patent/JPH0451144U/ja active Pending
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH1126645A (ja) * | 1997-07-03 | 1999-01-29 | Mitsubishi Electric Corp | 半導体集積回路装置とその製造方法 |
WO2003003445A1 (en) * | 2001-06-29 | 2003-01-09 | Fujitsu Limited | Sheet for underfill, method for underfilling semiconductor chip, and method for mounting semiconductor chip |
JP4778667B2 (ja) * | 2001-06-29 | 2011-09-21 | 富士通株式会社 | アンダーフィル用シート材、半導体チップのアンダーフィル方法および半導体チップの実装方法 |
WO2008078746A1 (ja) * | 2006-12-26 | 2008-07-03 | Panasonic Corporation | 半導体素子の実装構造体及び半導体素子の実装方法 |
JP5039058B2 (ja) * | 2006-12-26 | 2012-10-03 | パナソニック株式会社 | 半導体素子の実装構造体 |