JPH0449886A - Speed controller for brushless motor - Google Patents

Abstract

PURPOSE:To enable driving control to be stably performed also in a case that speed control is performed at a low speed, by arranging the driving coils of a plurality of the phases of a motor, an electrified-state command circuit, a speed detecting circuit, a speed command circuit, a PWM circuit, a power circuit, and a minimum duty clamp circuit. CONSTITUTION:Position detecting signals VA, VB, VC are logically processed by an electrified-state command circuit 3, and electrified-state command signal is obtained. After that, Vd is turned into the PWM signal of output generated from a PWM circuit 6, and pulse signal having duty. The PWM signal Vd is logically processed as follows, and electrification switching signal is obtained. The input of the electrification switching signal to a power circuit 9 is provided, and driving coils 1a, 1b, 1c are electrified in order. For example, when UH and VL, are H, then current flows from the driving coil 1a to the driving coil 1b, and when UH and WL are H, then current flows from the driving coil 1a to the driving coil 1c. In this manner, the electrified state of the driving coils is switched step by step, and a motor is driven.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a speed control device for brushless motors used in consumer appliances and home appliances.

BACKGROUND OF THE INVENTION In recent years, brushless motors have been increasingly used for various types of motors in order to have longer life, higher reliability, and thinner shapes.

In particular, brushless fan motors used in consumer devices and home appliances require variable speed control of the motor rotation speed over a very wide range in order to adjust the air volume.

Furthermore, as the output of devices increases, PWM control of motors has become an essential condition.

A conventional example of such a speed control device for a brushless motor is shown in FIG.

Hereinafter, a conventional brushless motor speed control device will be described with reference to the drawings.

FIG. 4 is a circuit diagram of a conventional brushless motor speed control device. In FIG. 4, motor drive coils 101a, 101b.

One end of the drive coil 101c is commonly connected to the drive coil 101.
The other ends of a, 101b, , 101c are power circuits 110
connected to the output terminal of The position detection circuit 102 outputs a movable element position detection signal, and its output terminal is connected to the energization state command circuit 1030 input terminal. The energization state command circuit 103 outputs an energization state command signal and a speed detection signal, the output terminal of the energization state command signal is connected to the input terminal of the energization switching circuit 104, and the output terminal of the speed detection signal is connected to the speed control circuit 105. Connected to the input terminal. The energization switching circuit 104 outputs an energization switching signal, whose output terminal is input to the power circuit 110, and the drive coils 101a, 1
01b and 101c are sequentially energized to rotate the motor. The speed command circuit 106 outputs a speed command signal, and its output terminals as well as the speed detection signal of the energization state command circuit 103 are connected to the input terminals of the speed control circuit 105, respectively. The speed control circuit 105 outputs a speed control signal, which is smoothed by a filter circuit 107, and its output terminal is connected to a non-inverting input terminal of a PWM circuit 109. Oscillator (O5
C) 108 outputs a triangular wave signal, and its output terminal is connected to the inverting input terminal of the PWM circuit 109. Said P
The WM circuit 109 outputs a PWM signal which is a pulse signal having a duty, and its output terminal is connected to the input terminal of the energization switching circuit 104.

The operation of the conventional brushless motor drive device configured as described above will be described below.

FIG. 5 shows an operating signal waveform diagram in FIG. 4.

In FIG. 5, V^l+VBI, vc+ are the waveforms of the movable element position detection signals output from the position detection circuit 102. The position detection signal is logically processed by the energization state command circuit 103 as follows, and the energization state command signal UHo+,
VHo+, WHO+, ULoz VLo+, WL
Get o+.

UHO,: Logical product of VAI and VBI VHO,: Logical product of V old and Vc+ WHO,: Logical product of Vc, and VAI U Lo+: Logical product of VBI and VAI (7) V Lo
+: Vc+ Va+(7) Logical product WLOI: VA
Logical product of I and VCI In FIG. 5, Vdl is a PWM signal output from the PWM circuit 109, and is a pulse signal having a duty.

The PWM signal Vdl is logically processed by the energization switching circuit 104 as follows to generate the energization switching signal tJH.

Obtain VBI, WH+, UL+, VBI, WL+.

UHI:UHo+ y　H+　:　V　Ho　’ WH: WHO.

tJI, +: logical product of ULot and Vdt VLI: VLO
The logical product WL of I and vdl, the logical product of +WLo and Vdl, that is, the energization switching signal is the energization state command circuit 103
The PWM output from the PWM circuit 109 is applied to the output of the PWM circuit 109.
The signal is a Vd-type folded signal.

These energization switching signals are input to the power circuit 110,
The drive coils 101a, 101b, and 101c are sequentially energized. For example, when UHI and V L + are H, current flows from the drive coil 101a to the drive coil 101b,
When U H+ and WL are H, current flows from drive coil 101a to drive coil 101c. In this way, the energization state of the drive coils is switched one after another, and the motor is driven.

Next, it will be explained that the speed of the motor is varied by the PWM signal Vdl.

In FIG. 4, Frefl is a speed command signal.

Furthermore, FGI is a motor speed detection signal, which can be obtained by logically processing a position detection signal as follows.

FG1: (VAI ・VBI "VCI)" - (
V^, °VBt ·Vc+) + (vAI-VBI-vcl) where * represents a logical product, and half represents a logical sum.

As the speed of the motor increases, the frequency of FG increases.

First, consider the case where the relationship between the frequency fFGl and the frequency f Frefl of the speed command signal F ref is f PGI > f Prefl.

At this time, the potential of the output v1 of the filter circuit 107, which smoothes the output of the speed control circuit 105, operates to decrease, and as a result, the utility of the PWM signal Vd output from the PWM circuit 109 decreases, and the power supply to the drive coil decreases. It works so that the amount decreases.

Therefore, the motor slows down.

Conversely, as the speed of the motor decreases, the frequency of FG decreases, and the relationship between fFGI and fFrefl changes to fFGI
Consider the case when 〈f Frefl.

At this time, the potential of the output v1 of the filter circuit 107 that has smoothed the output of the speed control circuit 105 operates to increase, and as a result, the utility of the PWM signal signal Vd output from the PWM circuit 109 increases, and the power supply to the drive coil increases. Works to increase the amount.

Therefore, the motor accelerates.

As a result, the speed of the motor is controlled such that the frequency of the speed detection signal FG matches the frequency of the speed command signal F reft.

FIG. 6 shows the output V of the filter circuit 107 and the PWM signal Vd when the motor speed control is performed stably.
This shows the situation. As shown in FIG. 6, the output vl of the filter circuit 107 is generally not a complete DC signal, but a signal having ripples whose fundamental wave is the same frequency component as the motor speed detection signal F G +. .

The PWM signal Vd+c, the triangular wave signal output VOSC+ of the oscillation P(O3C) 108, and the above output V are connected to the PWM circuit 10.
9, and as shown in FIG. 6, it is a pulse signal whose duty changes according to the value of vl.

The amount of power supplied to the drive coil is determined according to the duty of the PWM signal Vd, and in this conventional example, Vdl
When the low period of the duty increases, the amount of power supplied to the drive coil decreases.

Problems to be Solved by the Invention However, with the above configuration, the following problems occur when attempting to control the motor at a relatively low speed. That is, when controlling the motor at a low speed, the amount of power supplied to the motor is not necessary. Therefore, vI is V
osc + approaches the lower limit value, and the duty of the PWM signal V d l is changed in the direction of decreasing the amount of power supplied to the drive coil (
Vd, in the direction of increasing the Low period.

However, as mentioned above, ■ has a ripple whose fundamental wave is the same frequency component as FG, which is the motor speed detection signal, and when vl approaches the lower limit of VOSC+,
As shown in Figure 7, the ripple voltage of ■ is Vosc+
There will be a period when the value is below the lower limit. When the ripple voltage of vl falls below the lower limit value of Vosc+, during this period the PWM signal ~.'d1 is no longer a pulse signal having a duty, Vdt is fixed at a low level, and power supply to the drive coil is stopped.

During this period when the ripple voltage of vl falls below the lower limit value of V O3Cl and the power supply to the drive coil is stopped,
It is relatively long with respect to the oscillation frequency of Vosc+ (carrier frequency in general terms in PWM control), and occurs repeatedly in the period of the ripple voltage of Vl. In other words, the power supply to the drive coil is This state is called an intermittent operation state. When the motor is in an intermittent operation state, the motor may vibrate or rotate unevenly, and the cycle of intermittent operation may be repeated. If it falls within the audible range, it can also cause noise pollution.

As described above, conventional speed control devices for brushless motors have had various problems.

Means for Solving the Problems In order to solve the problems of the prior art, the brushless motor speed control device of the present invention provides an energization system that outputs a command signal to sequentially switch the energization state of the multi-phase drive coil of the motor and the energization state of the drive coil. A state command circuit, a speed detection circuit that detects the speed of the motor, a motor speed command circuit, and an output of the energization state command circuit that outputs a PWM signal that controls the amount of power supplied to the drive coil by the duty of the pulse signal. PWM circuit superimposed on the signal and PWM circuit
a power circuit that amplifies the power of the output signal of the energization state command circuit on which the signal is superimposed and transmits it to the drive coil; and a power circuit that outputs the signal from the PWM circuit so that the amount of power supplied to the drive coil does not fall below a predetermined level. It is equipped with a minimum duty clamp circuit that limits the duty of the pulse signal.

Operation The present invention has the above-described configuration, and when controlling the speed of the motor by varying the duty of the pulse signal output from the PWM circuit and adjusting the amount of power supplied to the motor, the minimum duty of the pulse signal is limited. Since speed control is performed so that the amount of power supplied to the motor drive coil does not fall below a predetermined level, stable drive control is possible without intermittent operation of the motor even when speed control is performed at low speeds. , the speed of the motor can be controlled over a wide range from low speed to high speed.

Embodiment Hereinafter, a speed control device for a brushless motor according to an embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a circuit diagram of a speed control device for a brushless motor according to an embodiment of the present invention. In Figure 1,
la, lb, and lc are motor drive coils. One ends of the drive coils Ia, lb, and lc are connected to the output terminal of the power circuit 9, and the other ends are commonly connected. The output terminal of the position detection circuit 2 is connected to the input terminal of the energization state command circuit 3, and the output terminal of the energization state command circuit 3 is connected to the input terminal of the energization switching circuit 8. The output signal of the energization switching circuit 8 is power amplified by the power circuit 9, and the drive coils la, lb, and Ic are sequentially energized to rotate the motor. The speed detection circuit 4 is connected to the energization state command circuit 3.
The motor speed detection signal F is synthesized by combining the signals output from the
Output G. The speed command circuit 5 outputs a motor speed command signal F ref, which is input to the PWM circuit 6 together with the motor speed detection signal FG. The PWM circuit 6 has a speed control circuit 20 to which the output of the speed detection circuit 4 and the output of the speed command circuit 5 are respectively input, 08C21, and the output of the speed control circuit 20 and the output of the 0SC21 are respectively input. The PWM comparator 22 transmits a pulse signal having a duty to the energization switching circuit 8. 7 is a minimum duty clamp circuit 7, which is a component of the PWM circuit 6;
M comparator 221 is connected.

The operation of the brushless motor speed control device according to an embodiment of the present invention configured as described above will be described below.

FIG. 2 is an operating signal waveform diagram in FIG. 1.

In FIG. 2, VA, VB, and VC are position detection signal waveforms of the movable element output from the position detection circuit 2. The position detection signals VA, VB, and VC are logically processed by the energization state command circuit 3 as follows to generate the energization state command signal U)10. VH
O, WHO, ULO.

I got VLO, WLO.

UHo: Logical product of VA and Vs VHo: Logical product of VB and Vc WHo: Logical product of vc and VA ULo: Logical product of Ve and VA VLo: Logical product of Vc and VB WLo: Logical product 2 of vA and Vc In the figure, vd is the PW output from the PWM circuit 6.
The M signal is a pulse signal having a duty. The PWM signal vd is logically processed as follows to generate energization switching signals UH, VH, and WH.

Obtain UL, VL, and WL.

UH+UH.

V) (:VH.

WH: WI-1゜UL: The logical product of ULo and vd VL The logical product of vLo and vd WL+The logical product of WL'o and vd, that is, the energization switching signal is sent from the PWM circuit 6 to the output of the energization state command circuit 3. Output PWM signal vd
This is the superimposed signal.

These energization switching signals are input to the power circuit 9, which sequentially energizes the drive coils la, lb, and lc.

For example, when UH and VL are H, a current flows from the drive coil 1a to the drive coil 1b, and when UH and WL are H, a current flows from the drive coil 1a to the drive coil IC.

In this way, the energization state of the drive coils is switched one after another, and the motor is driven.

Next, a description will be given of how the motor is set at variable speed by the PWM signal vd. In FIG. 2, FG is a motor speed detection signal, which can be obtained by performing the following logical processing on position detection signals VA, VB, and VC.

FG: (v^・VB-vc) +(V^・VB-Vc) +(V^・vB-vc) However, * represents a logical product, and + represents a logical sum.

As the motor speed increases, the FG frequency increases. First, the frequency fFG and the frequency f of the speed command signal Fref
Consider the case where the relationship with Fref is fFG>fprer.

At this time, the potential of the output signal V of the speed control circuit 20 increases, and the PWM signal v output from the PWM comparator 22
It operates to lower the duty of d and reduce the amount of power supplied to the drive coil. As a result, the motor slows down.

Conversely, the motor speed decreases, the FG frequency decreases, and the relationship between fFG and fPrefl becomes f Pa < f
Consider the case when Pref.

At this time, the potential of the output signal V of the speed control circuit 20 decreases, and the PWM signal v output from the PWM comparator 22
It operates to increase the duty of d and increase the amount of power supplied to the drive coil. As a result, the motor accelerates.

Eventually, the speed of the motor is controlled so that the frequency of the speed detection signal FG matches the frequency of the speed command signal F ref.

Next, PWM circuit 6 and minimum duty clamp circuit 7
The detailed operation will be explained below.

FIG. 3 is an operating signal waveform diagram of the PWM circuit and minimum duty clamp circuit in FIG. 1.

In FIG. 3, V is the output signal of the speed control circuit 20, and vosc is the triangular wave signal output from the 03C21. PWM comparator 22 includes transistors 31 to 3
5. Constant current source 30. This is a differential amplifier circuit composed of a resistor 36. v and vosc are input to the bases of transistors 31 and 32, respectively. Transistors 31-34
Assuming that the currents flowing in the two are respectively 131""134, if the minimum duty clamp circuit 7 is not added,
When v>vosc, I31<h2. Transistors 33 and 34 constitute a current mirror circuit and +
31-134. Also, since it is 13+”I3go, +
32>I34.

At this time, the transistor 35 is turned on and a voltage drop occurs across the resistor 36, so ~'d becomes L.

On the other hand, when V<VO5C, the transistor 35 is turned OFF and vd becomes H. The operating waveform at this time is v
It is shown in FIG. 3 as a d-vdo.

When VdO is H, power is supplied to the motor, and when VdO is L, power supply to the motor is stopped.

Next, the operation when the minimum duty clamp circuit 7 is added will be explained. The minimum duty clamp circuit 7 includes a transistor 40 and a reference voltage source 41 (output voltage V L
). If the current flowing through the transistor 40 is 140, it becomes 133r3++I+o.

When v>vL, 131<:I40, and r3rL;[
It can be approximated as +o. Therefore, PWM comparator 2
The duty of the second output signal vd is determined by the reference voltage 'J-L.

When v ku VL, l 31 > I 40, and I33
Since it can be approximated to #I3+, the duty of vd is determined by the output signal V of the speed control circuit 20. That is, v
The output of d becomes VdC in FIG. 3, and there is no period during which the power supply to the motor is stopped, which occurs during low speed control as described in the conventional example, and the intermittent operation of the motor is eliminated.

As described above, according to this embodiment, by providing the minimum duty clamp circuit 7, the motor is prevented from being in an intermittent operation state, and the brushless motor can be operated without generating vibration, circuit irregularity, noise, etc. This enables variable speed control from low speed to high speed.

Effects of the Invention As is clear from the above description, the present invention adds a minimum duty clamp circuit to control the amount of power supplied to the motor by varying the duty of the pulse signal output from the PWM circuit. Since the minimum duty of the pulse signal is limited and the speed is controlled so that the amount of power supplied to the motor drive coil does not fall below a predetermined level, the power supply to the motor is stopped for a period longer than the period of the carrier frequency. It is particularly effective when there is no intermittent operation and there is no need to supply much power to the motor when a low speed rotation command is given.The motor can be operated at variable speeds over a wide range from low to high speeds, and is inexpensive and simple. It can be realized with a configuration.

[Brief explanation of drawings]

Fig. 1 is a circuit configuration diagram of a speed control device for a brushless motor according to an embodiment of the present invention, Fig. 2 is an operating signal waveform diagram in Fig. 1, and Fig. 3 is a PWM circuit and minimum duty clamp in Fig. 1. Circuit operating signal waveform diagram, 4th
The figure is a circuit configuration diagram of a conventional brushless motor speed control device, FIG. 5 is an operating signal waveform diagram in FIG. 4, FIG. 6 is an operating signal waveform diagram of a PWM circuit configured in FIG.
This figure is an operation signal waveform diagram of the PWM circuit for the motor low speed command in FIG. 4. Ia, lb, lc... Drive coil, 3...
... Energization state command circuit, 4... Speed detection circuit,
5... Speed command circuit, 6... PWM circuit, 7... Minimum duty clamp circuit, 9...
...Power circuit. Name of agent: Patent attorney Shigetaka Awano and one other person (f)
GI yanma jijigi ℃ 〉

Claims (1)

[Claims] A plurality of phase drive coils of the motor, an energization state command circuit that outputs a command signal to sequentially switch the energization state of the drive coil, a speed detection circuit that detects the speed of the motor, a speed command circuit of the motor, and the drive coil. A PWM signal that controls the amount of power supplied to the circuit according to the duty of the pulse signal, and is superimposed on the output signal of the energization state command circuit.
a power circuit that amplifies the output signal of the energization state command circuit on which a PWM signal is superimposed by the PWM circuit and transmits it to the drive coil; A speed control device for a brushless motor comprising a minimum duty clamp circuit that limits the duty of a pulse signal output from the PWM circuit.