JPH0449735A - Alternative cut-back system - Google Patents

Abstract

PURPOSE:To prevent the inversion of cell arrival order according to alternative cut-back by sending a cell to a bypass route and an ordinary route piror to alternative cut-back processing by the detection of fault recovery, and measuring the transmission delay time of the cell. CONSTITUTION:The transmission delay time is measured by sending a cell for delay measurement to the bypass route and a route in use by a route delay measuring means 12 when a line fault is recovered. The difference of the transmission delay time of both routes is calculated from a measured result by a guard time setting means 13 as guard time, and it is informed to an alternative cut-back processor 11. The processor 11 executes the alternative cut-back based on the above information, however, a timing to deliver a first cell after the cut-back is set after the guard time calculated by the means 13 after sending the last cell to the bypass route elapses. In such a way, it is possible to prevent the passing of the cell passing the bypass route before the execution of the alternative cut-back over the cell passing the route in use after the execution of the cut-back occurring.

Description

[Detailed Description of the Invention] [Summary] Regarding a bypass switchback method between ATV communication nodes in an ATM network used in high-speed broadband ISDN (B-ISDN), etc. ,
The purpose is to provide a detour switchback method that prevents the cell arrival order from being reversed when switching back from the detour route to the working route. In a detour switchback processing device that sets a detour route and switches back from the detour route to the normal route in response to line failure recovery and other detour factors being resolved, the detour route and route delay measuring means for transmitting a cell on the normal route and measuring the transmission delay time required for the cell to transmit on each route, and taking the difference in the transmission delay time of each route and switching back to the detour at the obtained time. and a guard time setting means for setting a guard time to delay the timing of transmitting cells to the normal route where cell processing is performed.

[Industrial application field]

The present invention provides high-speed broadband ISDN (B-ISDN)
), etc., and relates to a detour switchback method between ATM communication nodes in ATMw4, which is used in ATMw4.

[Conventional technology] FIG. 5 is a schematic diagram of an ATV network.

In the figure, ATM communication nodes 51, 52, 53 are AT
It is a node in the V network, and each ATM communication node is connected with an actual line.

User A1 and ATM accommodated in ATM communication node 51
A channel AlA2 is allocated to the communication node 52 and the user A2 accommodated therein.

Similarly, user B+ accommodated in the ATM communication node 51
There are channels B and C2 between the user C2 and the user B2 accommodated in the ATM communication node 52, and a channel c between the user C3 accommodated in the ATM communication node 51 and the user C2 accommodated in the ATM communication node 53. ,C, are assigned.

Information a+5a2as sent from users A, ,B,
, b+ are each divided into cells (units of information transfer in ATV) in the ATM communication node 51, and are multiplexed on the actual line between the A, TM communication node 5 and the ATM communication node 52, which is a pre-assigned route. It is in a state of transformation. At the ATM communication node 52, the multiplexed cells have channel identifiers A and B in their headers.
The destination channels A, A, , B, and B are determined by the cell, and the information field portions of the cell are sent to the users At and Bz. User C1
Similarly, the information CI sent from the ATM communication node 51 and the ATM communication node 53 is sent to the user C2 via the real line between the ATM communication node 51 and the ATM communication node 53, which is a pre-allocated route.

Note that the header portion of the cell includes an identifier related to a detour route in case of failure of the actual line between ATM communication nodes. For example, if the route from the ATM communication node 51 to the ATM communication node 52 is the current route, the ATM communication node 51
A route from the ATM communication node 52 to the ATM communication node 52 via the ATM communication node 53 can be allocated in advance as a detour route. That is, a virtual network using a virtual bus (VP) and a virtual channel (VC) can be constructed on a network using real lines.

When the ATV network in Figure 5 is viewed as a virtual network,
Channels A and Az are either virtual channels A and Az in the virtual bus 54 or virtual channel AIAX in the virtual bus 55, and are invisible to users A and do not need to be aware of them. do not have.

Here, for example, if a line failure occurs, a detour/switch to the route occurs, and then, when the failure is recovered, a detour switch back to the working route is performed.

FIG. 6 is a block diagram showing the configuration of a conventional detour switchback processing device 60.

In the figure, a fault monitoring function 61 has a function of detecting the occurrence and recovery of a fault in a virtual path accommodated in an ATM communication node, and notifies the cell transmission/reception processing unit 62 of the virtual bus from which the fault has been recovered.

When the cell transmission/reception processing unit 62 that manages the virtual bus and virtual channel in the ATM communication node is notified of line recovery from the fault monitoring function 61, it changes the cell transmission destination from the detour route to the working route and performs subsequent cell transmission. Make the destination the current route.

In other words, the detour switchback is executed at the same time as the line restoration is detected.

[Problem to be solved by the invention]

Incidentally, the detour route is generally longer than the working route because of the number of ATM communication nodes it passes through. Therefore, a cell reversal occurs in which a cell sent out to the detour route immediately before the detour return arrives at the target ATM communication node later than a cell sent out to the working route immediately after the detour return. In other words, an error will occur in the transferred information.

Originally, ATV networks were designed to simplify the protocol processing on the network side and to increase the transfer speed within the network as much as possible, such as by using hardware to switch cells, unlike the conventional Pakent switching system. are doing. For this reason, the current situation in ATM networks is to leave processing to the error control protocol on the user side without taking any measures against the above-mentioned information errors.

The present invention provides a detour switchback method that prevents the cell arrival order from being reversed due to the detour switchback from the detour route to the working route when a line failure is restored in an ATM communication node of an ATM network. purpose.

[Means to solve the problem]

FIG. 1 is a block diagram of the principle of the detour switchback method of the present invention.

In the figure, a detour switchback processing device 11 sets a detour route to replace the normal route due to a line failure in the ATM network or other factors, and changes the detour route to the normal route in response to recovery from the line failure or other detour factors. Perform cutting back.

The route delay measuring means 12 transmits a cell on the detour route and the normal route, and measures the transmission delay time required for the cell to be transmitted on each route, prior to the detour switchback process due to failure recovery detection.

The guard time setting means 13 calculates the difference between the transmission delay times of each route and sets the obtained time as a guard time for delaying the timing of transmitting the cell to the normal route where the detour is performed.

[Operation] In the configuration shown in FIG. 1, when a line failure is restored, the route delay measuring means 12 sends a delay measurement cell to each of the detour route and the working route to measure the transmission delay time. Based on the measurement results, the guard time setting means 13 calculates the difference between the transmission delay times of both routes as a guard time, and notifies the detour switchback processing device 11 of the guard time.

The detour switchback processing device 11 executes the detour switchback based on the notification, but the timing for transmitting the first cell after the switchback is calculated by the guard time setting means 13 after transmitting the last cell on the detour route. After the guard time has elapsed. There is no need to take guard time for subsequent cell transmission.

That is, by providing a guard time at the time of switching back, it is possible to prevent a cell that passed through the detour route before execution of the switching back from being overtaken by a cell that passed through the working route after executing the switching back.

〔Example〕

Hereinafter, embodiments of the present invention will be described in detail based on the drawings.

FIG. 2 is a block diagram showing the configuration of an embodiment of the detour switchback method according to the present invention.

In the figure, ATM communication nodes 21 and 22, 21 and 23
．． 22 and 23 are connected via real lines 26, 27, and 28, respectively. Further, between the ATM communication nodes 21 and 22, a virtual path 24 as a working route and a virtual bus 25 as a detour route are allocated.

Each ATM communication node has a clock function 31 and a fault monitoring function 3.
2. It has a cell transmission/reception processing section 33 and a time measurement cell generation/disassembly function 34, and is configured to perform mutual processing at each ATM communication node.

FIG. 3 shows the connection relationship between each part and each function of each communication node in the embodiment shown in FIG.

In the figure, a clock function 31 maintains the standard time for the entire ATM network.

The fault monitoring function 32 has a function of detecting the occurrence of a fault in a virtual bus accommodated in an ATM communication node and the recovery from the fault, and notifies the route delay measuring means 12 of the virtual path from which the fault has been recovered.

Based on the time taken out from the clock function 31, the route delay measuring means 12 sends delay measuring cells to the detour route and the working route via the cell transmission/reception processing unit 33. In addition, the route delay measuring means 12 uses the returned delay measuring cell as follows:
The reception is received via the cell transmission/reception processing unit 33, and the clock function 31
Based on the time taken from , the cell arrival time of each route is obtained. This cell arrival time is notified to the guard time setting means 13.

The guard time setting means 13 calculates the guard time from the notified cell arrival time and notifies the fault monitoring function 32 of the calculated guard time.

In response to this notification, the failure monitoring function 32 issues an instruction to execute the detour switchback to the cell transmission/reception processing unit 33.

The cell transmission/reception processing unit 33 executes the detour switchback based on this instruction.

Note that the failure monitoring function 32 and the cell transmission/reception processing section 33 constitute the detour switchback processing device 11 .

Further, the route delay measuring means 12 and the guard time setting means 13 constitute a time measurement cell generation/disassembly function 34.

FIG. 4 is a diagram showing the structure of the delay measurement cell in this embodiment.

The operation of this embodiment will be explained below with reference to FIGS. 2, 3, and 4.

In the figure, a virtual bus switching occurs between the ATM communication node 21 and the ATM communication node 22 due to a line failure, and information sent from the user is transferred between the ATM communication node 21 and the ATM communication node 22. Cell transfer is performed via the virtual bus 25, which is a detour route.

Here, the fault monitoring function 32 of the ATM communication node 21
Route delay measuring means 1 of the time measurement cell generation/disassembly function 34 for detecting line failure recovery with the TM sending node 22
Notify 2. The route delay measuring means 12 is based on the virtual bus 24.
and two delay measurement cells to be sent to the virtual bus 25. At this time, the transmission time is taken out from the clock function 31 and written to the cell transmission time 43 of the delay measurement cell shown in FIG. Furthermore, a virtual path identifier/virtual channel identifier (VPI/VCI) is added so that the light that reaches the ATM communication node 22 via the virtual bus 24 or 25
41 and requests the cell transmission/reception processing section 33 to transmit this delay measurement cell. The cell transmission/reception processing section 33 sends the two delay measurement cells to the virtual bus 24 according to the cell header section.
and is sent to the virtual bus 25.

The cell transmission/reception processing unit 33 of the ATM communication node 22 receives and receives cells for delay measurement from the virtual bus 24 and the virtual bus 25, respectively. The reception time is extracted from , and written in the cell reception time 44 of the received delay measurement cell, and the delay measurement cell is sent to the ATM via the same route that it was received.
The virtual bus identifier/virtual channel identifier 41 is set so as to be sent to the communication node 21, and the cell transmission/reception processing unit 33
request to send out delay measurement cells. The cell transmission/reception processing unit 33 sends the received delay measurement cell to the ATM communication node 2 through the same route through which it was received and received according to the cell header section.

The cell transmission/reception processing unit 33 of the ATM far communication node 21
Processing of the delay measurement cell returned from the M communication node 22 is passed to the route delay measurement means 12 of the time measurement cell generation/decomposition function 34. The route delay measurement means 12 uses the cell reception time 44 of the delay measurement cell and A taken out from the clock function 31.
Based on the times at which the delay measurement cells are received and received at the TM communication node 21, cell arrival times for the outbound and return routes of the detour route and the working route are obtained, and the values are recorded.

The detour route between the ATM communication node 21 and the ATM communication node 22 is used as a working route when viewed from the ATM communication node 23, and since the traffic status differs from time to time, the series of operations described in 1. Repeat several times to obtain the average cell arrival time for each route. The average cell arrival time of each route is passed to the guard time setting means 13 of the time measurement cell generation/decomposition function 34.

The guard time setting unit I3 calculates the guard time using a predetermined calculation method that takes into consideration past statistical values, theoretical values, etc., in addition to the difference in the average cell arrival time of each route, and notifies the fault monitoring function 32 of the guard time. Immediately after receiving the notification, the fault monitoring function 32 issues a detour switchback instruction to the cell transmission/reception processing unit 33. As a result, the cell transmission/reception processing section 33 executes the detour switchback, but does not send the normal cell to the working path until the guard time has elapsed after sending the last cell to the detour path.

Therefore, by setting this guard time, the possibility that the last normal cell sent out to the detour route will be overtaken by the first normal cell sent out from the working route after the detour switchback is extremely reduced. That is, the ATM communication node 22
Normally, the order of cells can be prevented from being reversed.

In addition, in the embodiment described above, the ATM communication node 22 is
The reception time is set in the delay measurement cell received from the ATM communication node 21 and sent back, but even if the ATM communication node 21 simply receives the delay measurement cell from the ATM communication node 22, the cell arrival time can be changed. can be measured.

In this case, the measurable cell arrival time is the average value of the round trip time.

[Effects of the Invention] As described above, according to the present invention, the reversal of the order of normal cells at the arriving optical ATM communication node due to the detour and return can be prevented by a simple ATM communication node protocol.

Therefore, it is possible to suppress deterioration in communication quality due to detour and return without impairing the increase in transfer speed within the network.

In addition, the procedure used in the present invention allows the delay time of each route to be measured, making it possible to understand network conditions more realistically.
Data for optimal network system design can be obtained.

[Brief explanation of drawings]

FIG. 1 is a block diagram of the principle of the present invention, FIG. 2 is a block diagram showing the configuration of an embodiment of the detour switchback method according to the present invention, and FIG. 3 is each communication in the embodiment of the bypass switchback method in FIG. 2. FIG. 4 is a schematic diagram of the structure of the delay measurement cell in the embodiment; FIG. 5 is a schematic diagram of the ATM network; and FIG. 6 is the configuration of a conventional detour/return processing device. FIG. In the figure, 1 is a detour switchback processing device, 2 is a path delay measuring means, 3 is a guard time setting means, 1.22.23 is an ATM communication node, 26.27.28 is a real line, and 24.25 is a virtual bus. , 31 is a clock function, 32 is a fault monitoring function, 33 is a cell transmission/reception processing unit, 34 is a cell generation/decomposition function for time measurement, 41 is a virtual bus identifier/virtual channel identifier (VP1/VCI), 42 is for delay measurement Cell identification number, 43 is cell transmission time, 44 is cell reception time, 51.52.53 is ATM communication node, 54.55 is virtual bus, A+, Ax, B+ -Bz, C+, Cz is user, 60 is detour 61 is a failure monitoring function; and 62 is a cell transmission/reception processing unit. 1. Practical block diagram of the detour-back system of the present invention. Embodiment of the detour-back system. Schematic diagram of the structure of the delay measurement cell in the embodiment. Schematic diagram of Shitomi ATMI

Claims (1)

[Claims] (1) A detour route is set in place of the normal route due to a line failure in the ATM network or other factors, and the detour path is switched back to the normal route in response to recovery from the line failure or other detour factors. A with a processing device (11)
In the TM communication node, prior to the detour switchback process due to the failure recovery detection, route delay measurement is performed, in which a cell is sent out on the detour route and the normal route, and the transmission delay time required for this cell to transmit on each route is measured. Means (12
); and guard time setting means (13) for calculating the difference between the transmission delay times of the respective routes and setting the obtained time as a guard time to delay the timing of transmitting cells to the normal route where detouring and switching is performed. A detour cutback method characterized by being equipped with.