JPH0449447A - Method for indexing write-back control information - Google Patents

Abstract

PURPOSE:To surely execute write-back processing by storing plural pointers and using a normally read pointer for reading out write-back control information. CONSTITUTION:A device 2 temporarily writes data 7 sent from a master device 1 in a storage means 4 and writes write-back control information 6 to be used for writing back the data 7 to a recording medium 3 and plural pointers 5 for specifying the areas of the means 4 writing the information 6 in the storage means 4. In the case of writing updating data in the medium 3 by the device 1, the device 2 can rapidly be accessed only by writing the data 7 in the means 4. Even when a destructed pointer due to a trouble exists in the means 4, the device 2 can read out a normal pointer and read out the control information 6 by successively reading out plural pointers 5. Consequently, the write-back processing can surely be executed.

Description

[Detailed Description of the Invention] [Summary] Write-back control information that makes it possible to reliably read a pointer that indicates a storage area of control information used when writing data stored in a cache memory to a disk, etc. Regarding the indexing method, with the aim of reliably executing write-back processing, there is an area for writing data sent by the host device, an area for writing control information for reading the data and writing it to the recording medium, and an area for writing the data sent by the host device. a storage means having an area for writing a pointer for not reading control information, and after storing data sent by the host device in the storage means, based on the control information read from the area specified by the pointer. , in an apparatus for reading data written in the storage means and writing it on the recording medium, a plurality of the pointers are stored, and when the higher-level device reads the data written in the storage means, The control information is read out by sequentially accessing a plurality of pointers and using pointers that have been read out normally.

[Industrial application field]

The present invention relates to a device that partially stores data sent out by a host device in a cache memory and then writes it to a disk, etc., and in particular, it relates to a device that stores a portion of data sent out by a host device in a cache memory and then writes it to a disk, etc., and in particular controls information used when writing data stored in the cache memory to a disk, etc. The present invention relates to a write-back control information indexing method that makes it possible to reliably read a pointer indicating a storage area.

In disk devices used as external storage devices for computer systems, part of the data on the disk is stored in memory to speed up disk access, and the data stored in this memory can be accessed from the host device. Therefore, disk cache systems are widely used that shorten access time to disk devices by reading data from this memory and transferring it.

In conventional disk cache systems, when data stored in the cache memory is transferred to a host device, no mechanical movement of the disk is required, so access time is shortened. However, in the case of data transfer from a host device to a disk device, a write-through method is generally used that updates the data in the cache memory and disk at the same time to ensure that the data in the cache memory and the data on the disk do not differ. has been done. Therefore, when writing data, the same access time as when writing to a disk is required.

To speed up the access time when writing data, a write-back method may be used in which updated data is written only on the cache memory and then written back to the disk. However, in order to perform write-back, write-back control information for writing data written in the cache memory to the disk and a pointer to index this write-back control information are required.

That is, the write-back control information is read from the storage area pointed to by the pointer, and from this write-back control information it is recognized which record on the cache memory has been updated, and the write-back process is performed. must be stored in a fixed area.

Therefore, it is necessary to prevent the pointer from becoming unreadable due to a failure in the cache memory.

[Conventional technology]

In disk devices using the write-back method, a nonvolatile memory backed up by a battery is often used as a cache memory in case the device is powered off. Write-back control information and pointers are also stored in this cache memory.

When writing data from a host device to a cache memory, a cylinder number, head number, and record number are usually specified as the disk address, and the data is transferred. When writing this data to the cache memory, the device side stores information indicating that the data is updated and the address of the record as write-back control information in an area (directory) separate from the data. If the area is defective, it is stored in another area and this area is pointed to by a pointer.

However, since the pointer cannot be read unless the storage area of the pointer is fixed, the pointer is written to a predetermined specific area on the cache memory.

[Problem to be solved by the invention]

As mentioned above, the pointer is written to a specific area of the cache memory, but if there is a failure in this specific area, the pointer cannot be read normally, so the write-back control information cannot be read. There is a problem that write-back processing becomes impossible.

In view of these problems, an object of the present invention is to store a plurality of pointers, read out write-back control information using pointers that have been read out normally, and reliably execute write-back processing.

[Failure to solve the problem]

FIG. 1 is a block diagram illustrating the invention in detail.

The device 2 causes the data 7 sent by the host device 1 to be temporarily written into the storage means 4, and also includes control information 6 used to write this data 7 back to the recording medium 3, and a memory in which this control information 6 is written. A plurality of pointers 5 specifying areas of means 4
is written into the storage means 4.

The pointer 5 stores N pieces of data consecutively starting from the start address of the specific area of the storage means 4, and when the device 2 reads out the data 7 from the storage means 4 in order to write the data 7 back to the recording medium 3, the storage means The pointer 5 is read from the start address of the specific area No. 4 and checked to see if it is normal. If it is not normal, the address is incremented and the next pointer 5 is not read.

In this way, the control information 6 is read using the pointer 5 that has been read normally, and based on this control information 6, the data 7 that has been updated by the host device 1 is not read, and the record that the control information 6 instructs is Write in a predetermined area of medium 3.

[Effect]

With the above configuration, when the host device 1 writes update data to the recording medium 3, the device 2 only needs to write the data 7 to the storage means 4, and can access the data at high speed. By not reading the plurality of pointers 5 sequentially, the device 2 can read a normal pointer and not read the control information 6 even if there is a pointer that is destroyed due to a failure in the storage means 4.

Therefore, write-back processing can be executed reliably.

〔Example〕

FIG. 2 is a block diagram of a circuit showing one embodiment of the present invention.

The processor 13 of the disk control device 8 reads and operates the program stored in the control memory 14, controls the channel interface circuit IO, the cache interface circuit 11, the device interface circuit 15, and the cache memory 12, and controls the host device 1. Controls data transfer with the disk device 9.

When writing data to the host device 1 or the disk device 9, the cylinder number, head number, and record number are sent to the channel interface circuit 10 as addresses, and the data is sent out.

The processor 13 stores the data sent by the host device 1 in the data storage area of the cache memory 12 based on the address sent by the host device 1 via the cache interface circuit 11, and also stores the data sent by the host device 1 in the write-back control information storage area of the cache memory 12. Addresses necessary for writing the data sent by the host device 1 to the disk device 9, information indicating that the data is updated data, etc. are written as write-back control information.

Then, from the start address of the specific area of the cache memory 12, N pointers pointing to the write hack control information storage area are successively written.

When the writing of the data transferred by the host device 1 into the cache memory 12 is completed, the processor 13 reads the pointer from the start address of the specific area of the cache memory 12 at a predetermined timing. If the data cannot be read normally, the address is incremented to the next address determined by the length of the pointer, and the next pointer is not read.

If a normal pointer cannot be read out even after repeating this operation N times, it is determined that write hack processing is not possible. However, if there is a pointer that has been read out normally, write 1 to hack control information is stored according to the address pointed to by this pointer. is not read.

Then, based on this write-back control information, the updated data is read from the cache memory 12 via the cache interface circuit 11, sent to the disk device 9 via the device interface circuit 15, and written to the address specified by the write-back control information. The information is written to the disk device 9 based on the information.

FIG. 3 is a diagram illustrating an example of a track format.

FIG. 3(a) shows the format on one track in the cylinder of the disk device 9. FIG. Each track has a plurality of areas separated by gaps following an index indicating the start position of the track.Following this index, a home address HA is recorded, and records RO, R1, R
2 and multiple records are recorded.

The address of the track is recorded in the home address HA. Furthermore, the record RO has a special format for use by the system program of the device, which consists of a count area C and a data area.

Each record after record R1 is used by the user and consists of a count area C, a key area, and a data area D. The track address, the record number, the length of the data area D, etc. are recorded in the key area that follows.

Although data names and the like are recorded in the key area K and used for data searches, the key area may not be provided. Data required by the host device 1 is recorded in the data area D. The key area and data area D have variable lengths.

With this configuration, the host device 1 can specify individual records by specifying a track address and record number consisting of a cylinder number and a head number.

On the cache memory 12, the entire area or a part of the area of the track accessed from the disk device 9 by the access from the host device 1 is staged as shown in FIG. 3(b). ) shows the case where the entire area of the track shown in FIG. 3(a) is stored.

Since no rotational wait occurs on the cache memory 12, no gaps are necessary, and records RO, Rl, and R2 are successively stored from Baum address HA. The count area C of each record after record R1 contains the cylinder number CC, head number HH, record number R, and key area length K, as shown in FIG. 3(C). Data area length DD
and a flag F are stored.

As mentioned above, the processor 13 stores the information of the host device 1 in the record of the track shown in FIG.
When the data sent by is written, which record has been updated is stored in the directory as write-back control information. Then, when performing writeback at a predetermined timing, the pointer is read as described above, the writeback control information is read from the directory specified by this pointer, and the cylinder stored in the count area C of each record is read. Number CC and head number HH
The updated record is searched for and written back to the disk device 9 using the track address indicated by and the record number R.

FIG. 4 is a flowchart explaining the operation of FIG. 2.

In step (2), the processor 13 reads the number N of pointers stored in the control memory 14 into the internal register, and sets the number of the Mth pointer to 1. Then, in step (2), the storage address of the M-th pointer is set in the internal register. That is, first, the storage address of the first pointer (starting address of the specific area) is set, and from the second onward, the number of bytes determined in advance by the length of the pointer is incremented and set.

Then, in step (2), the pointer is read, and in step (2), it is checked whether the pointer has been read normally.

If the data has been read normally, a write-back process is performed in step (2) and the operation is completed.

If the pointer is not read normally in step ■, proceed to step ■, and set N in the internal register to N−
1, set M to M+1, and then check whether N is ≠ 0 in step ■. If N is not 0, return to step ■, and if N is 0, determine that writeback processing is not possible in step ■. Then, for example, the host device 1 is notified that the write-back process is not possible, and the process is terminated.

〔Effect of the invention〕

As explained above, in a disk cache system using the write eight-way method, when the pointer that specifies the area where write hack control information is stored cannot be read normally due to a partial memory failure, the present invention Since it is possible to do this without reading pointers stored in other areas, write hack processing can be executed reliably.

7 is data, 8 is a disk control device, 9 is a disk device, 10 is a channel interface circuit, 11 is a cache interface circuit, 12 is a cache memory, 13 is a processor, 14 is a control memory, and 15 is a device interface circuit.

[Brief explanation of the drawing]

FIG. 1 is a block diagram explaining the present invention in detail, FIG. 2 is a block diagram of a circuit showing one embodiment of the present invention, FIG. 3 is a diagram explaining an example of a track format, and FIG. 3 is a flowchart illustrating the operation shown in the figure. In the figure, 1 is the host device, 2 is the device,

Claims (1)

[Claims] An area to write data (7) sent by the host device (1), an area to write control information (6) for reading and writing the data (7) to the recording medium (3), and the control information. (6)
A storage means (4) having an area for writing a pointer (5) for reading the data is provided, and after storing the data (7) sent by the host device (1) in the storage means (4), the pointer (5) is written. The control information (6) read from the area specified in (5)
), the data (7) written in the storage means (4)
) in the recording medium (3), a plurality of pointers (5) are stored in the device (2), and the data () written by the host device (1) in the storage means (4) is 7), the control information (6) is read by sequentially accessing the plurality of pointers (5) and using the pointer (5) that has been read normally. Back control information index method.