JPH0447503A - Digital magnetic recorder - Google Patents

Abstract

PURPOSE:To prevent occurring of asymmetry when a head dedicated for erasure is provided before a recording/reproducing head by outputting recording data pulses with different width alternately to a recording driver circuit. CONSTITUTION:An erasure head 2 is provided before the recording/reproducing head 1. When the recording data pulse is inputted from an input terminal 9 to an external flip-flop 11, a delay circuit 12 delays the leading edge of positive output Q by a prescribed time constant. When the recording data pulse is inputted again, the positive output Q of the external flip-flop 11 is inverted, then, goes to an L level, and the delay circuit 12 delays the trailing edge of the positive output Q by a different time constant by turning on a diode 14. Therefore, the output signal of an EXOR circuit 17 goes to a signal with different pulse width, and time difference of an H level and the L level occurs in the output signal of the recording driver circuit 3, and reversal of magnetization recorded on a medium can be compensated by that time difference. In such a way, the asymmetry at the time of reproducing can be reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a digital magnetic recording device.

[Prior Art] In recent years, the capacity of digital magnetic recording devices has been increased, and there is a demand for improved recording density. As a result, the coercive force of the media used generally increases, the overwrite characteristics (OWM) of conventional recording/reproducing heads deteriorate, and complex peak shifts occur due to overlap with the previous history, reducing the reliability of the device. lowered.

For this reason, a recording/reproducing head with a large saturation magnetic flux density or one with a large leakage magnetic flux near the gap is used. However, the use of materials with a high saturation magnetic flux density is restricted due to durability, economy, etc., and materials with large leakage magnetic flux near the gap, such as those with a large gap length, have problems such as deterioration of high frequency characteristics. be. As an example of improved versions of these, as shown in the 11th Academic Conference of Japan Society of Applied Magnetics, "Recording and Reproducing Characteristics of 4aA-1Or Composite Head," the gap length during recording and the gap length during reproduction are equivalently There is something that has been devised to change it. However, this head is also inferior to the conventional head in terms of economy.

On the other hand, examples of countermeasures against peak shift using OWM, which has an erasing head exclusively for erasing in front of the conventional recording/reproducing head, are disclosed in Japanese Patent Laid-Open No. 61-39910 and Japanese Patent Laid-open No. 6
1-243909 and Utility Model Application Publication No. 61-111016. According to these examples, OWM can be achieved even with conventional heads made of materials with saturation magnetic flux density by performing DC erasing with an erasing head prior to data recording.
is improved, and random peak shifts due to previous history are eliminated. However, in this case, even if a peak shift with a superimposed DC component, generally called asymmetry, is recorded, as shown in Figure 6, even if a single period is recorded, it is difficult to determine whether the recording magnetization of data is in the same direction as DC erasing. Normally, when the magnetization generated by the erasing head and the magnetization generated by the recording/reproducing head are in the same direction, the peak interval tends to become longer; It tends to be shorter. The reliability of this fruiting device was sometimes reduced.

[Problems to be Solved by the Invention] Since the conventional large-capacity magnetic recording device is configured as described above, an expensive magnetic head must be used.
The price of the entire device has increased. Alternatively, when the device is configured with an inexpensive magnetic head, the reliability of the device is reduced.

The present invention has been made to solve the above-mentioned problems, and provides a magnetic recording device that does not cause asymmetry even when an erasing-only head is provided in front of a recording/reproducing head.

[Means for Solving the Problems] A digital magnetic recording device according to the present invention includes a flip-flop for inputting recording data, a delay circuit for delaying the positive output of the flip-flop, and a delay circuit for delaying the output of the delay circuit and the negative output of the flip-flop. Generates an exclusive OR of the outputs,
The apparatus includes an exclusive OR generating circuit which inputs this exclusive OR output to a recording driver circuit that drives a recording/reproducing head.

Further, a digital magnetic recording device according to another invention includes a flip-flop for manually inputting recorded data, a first delay circuit for delaying the positive output of this flip-flop, and a delay time different from that of the first delay circuit. a second delay circuit that delays the negative output of the second delay circuit, and generates an exclusive OR of the output of the first delay circuit and the output of the second delay circuit, and records the exclusive OR output. This includes an exclusive OR generating circuit which is input to a recording driver circuit that drives a reproducing head.

[Operation] In this invention, the flip-flop outputs a signal inverted for each pulse of recording data to each output terminal, and the delay circuit delays the output signal of the flip-flop output terminal to a different output time, and The OR circuit outputs recording data pulses of different widths to the recording/reproducing head alternately to the recording driver circuit.

[Example] Hereinafter, an example of the present invention will be described with reference to the drawings. 1st
The figure is a configuration diagram showing an embodiment of the present invention, in which (1) is a recording/reproducing head having a center tap (CT), (2) is an erasing head, and (3) is a recording driver circuit, including an internal flip-flop ( 4) and transistors 2X (5), 2Y
(6), an erase circuit (7), and a transistor current source (8). (9) is a recording data pulse input terminal, (10) is a write gate signal input terminal, (11)
) inputs the recording data pulse from the recording data pulse input terminal (9) through an external flip-flop.

(12) is a delay circuit connected to the positive output terminal (Q) of this external flip-flop (11), and resistor R2 (13)
and a diode D (14) in series, a resistor R1 (15) connected in parallel to this series circuit, and a capacitor C (16) connected between this connection point and ground.

(17) is an exclusive OR circuit which inputs the output of the delay circuit (12) and the negative output of the external flip-flop (11), and sends the output to the internal flip-flop (4).

Note that the signal from the write gate signal input terminal (10) is sent to the reset terminal (R) of each flip-flop (4), (11) and the current source (8) of the transistor.

Next, the operation of the apparatus configured as described above will be explained using FIG. 2. As an assumption, when a current flows to the coil end X side of the recording/reproducing head (1), the magnetic field generated in the recording/reproducing head (1) is
), and at this time, the internal flip-flop (4) in the recording driver circuit (3)
is assumed to be at H level.

The signal of the write gate signal input terminal (10) is at L level,
That is, when it is not in the writing state, the recording driver circuit (3
) and the external flip-flop (11) are both reset to L level.

The signal at the write gate signal input terminal (10) is at H level,
That is, when the write state (Fig. 2g) is entered and the recording data pulse (Fig. 2b) is input from the recording data pulse input terminal (9) to the external flip 70 knob (11), every pulse of the recording data is input. The external flip-flop (11) is inverted (FIG. 2C). The delay circuit (12) connects the rising edge of the positive output Q of the external flip-flop (11) to the resistor (15).
) and the time constant of the capacitor (16), and the threshold value V is reached after a time tr has elapsed after the input signal rises.
th (Fig. 2g). Since the negative output Q (Fig. 2 e) of the one-sided flip-flop (11) is directly input to the other side of the exclusive OR circuit (17), the output of this exclusive OR circuit (17) is flip flop(
When the negative output Q of 11) falls, that is, the positive output Q rises, it becomes L level, and when the output of the delay circuit (12) exceeds the threshold Vth, it becomes H level (Fig. 2 f).
.

Next, the recording data pulse (Fig. 2b) is again transmitted from the recording data pulse input terminal (9) to the external flip-flop (11).
), the positive output Q of the external flip-flop (11) becomes L level (FIG. 2C). At this time, in the delay circuit (12), the diode (14) is ONL, and the time constant is the combined resistance value (RIXR2) of the resistance value R1 of the resistor (13) and the resistance value R2 of the resistor (15) (R1+R2) and the capacitor (16 ) becomes smaller than the threshold value V th after a delay of a time tr determined by the capacitance C (FIG. 2g).

The output of the exclusive OR circuit (17) becomes L level at the same time as the negative output Q of the external flip-flop (11) rises, that is, the positive output Q falls, and the output of the delay circuit (12) becomes smaller than the threshold Vth. Then it becomes H level (Fig. 2 f).

In this way, since the delay time of the delay circuit (12) differs depending on the rise and fall of the signal, the output signal of the exclusive OR circuit (17) becomes a signal with a different pulse width (
Figure 2 f). Therefore, if the internal flip-flop (4) is inverted by the rise of the output signal of the exclusive OR circuit (17), the time difference between the H level and the L level will be 2x (tr tr) (Fig. 2g ), the magnetization reversal recorded on the medium is also compensated for this time difference.

Therefore, asymmetry during playback can be reduced.

FIG. 3 shows an example of the effect of the above embodiment, where the horizontal axis shows (tr
tr) and the amount of asymmetry generated is plotted on the vertical axis. It can be seen from FIG. 3 that by adjusting trtr, asymmetry can be effectively reduced regardless of whether the recording/reproducing head (1) is on the outer circumferential side or the inner circumferential side.

FIG. 4 shows a second embodiment of the invention, in which a second delay circuit (18) with a delay time td is connected to the negative output Q of an external flip-flop (11). The output of is the other input of the exclusive OR circuit (17). Furthermore, since the first delay circuit (12) eliminates the resistor (13) compared to the delay circuit (12) of the embodiment shown in FIG. 1, the rise of the input signal is delayed by tr. However, at this time, the delay time due to the second delay circuit (18) is 1. The relationship between and the delay time tr of the first delay circuit (12) is 1d>1. It is. This second embodiment is used when the inversion timing of the internal flip-flop (4) of the recording driver circuit (3) is equal to the falling edge of the exclusive OR circuit (17).

FIG. 5 is a diagram explaining the operation of the second embodiment of the invention shown in FIG. 4, in which the write gate signal is
In other words, when not in the writing state, both the internal flip-flop (4) and the external flip-flop (11) in the recording driver circuit (3) are reset to the L level.

When the write gate signal becomes H level, that is, the write state (Fig. 5g), and the recording data (Fig. 5b) is input to the external flip-flop (11), the external flip-flop (11) 11) is reversed (Fig. 5C). The first delay circuit (12) delays the rising edge of the positive output Q of the external flip-flop (11).
2) After the input signal rises due to the time constant of the resistor (15) and capacitor (16), the time tr
The threshold value vth is exceeded after a period of time (FIG. 5d).

On the other hand, the negative output of the external flip-flop (11) is the second
The delay circuit (18) causes the time 1. + (Fig. 5e), the output of the exclusive OR circuit (17) becomes L level when time t7 elapses from the rise of the positive output Q of the external flip-flop (11), and the second Time 1. from the change point of the output of the delay circuit (18), that is, the rise of the positive output Q of the external flip-flop (11). +
After a period of time, it becomes H level (Fig. 5f).

Next, when the recording data pulse (FIG. 5b) is input again, the positive output Q of the external flip-flop (11) becomes L level (FIG. 5C). At this time, the first delay circuit (1
In 2), the delay time becomes almost 0 by turning on the diode (14). The output of the exclusive OR circuit (17) becomes L level at the same time as the positive output Q of the external flip-flop (11) falls, and the second delay circuit (18)
The output becomes H level at the same time as the output of
Figure f).

In this way, the output signals of the exclusive OR circuit (17) are signals with different pulse widths. Therefore, if the internal flip-flop (4) is inverted by the fall of the output signal of the exclusive OR circuit (17), the time difference between the H level and the L level will be 2×tr (Fig. 5g), Magnetization reversals recorded on the medium are also compensated for this time difference. Therefore, asymmetry during playback can be reduced.

At this time, the difference between the H level and L level of the output of the internal flip-flop (4), that is, the time difference between the recording currents of the coils X and Y when the recorded data has a single frequency is 2xt
r, and the same effect as the embodiment shown in FIG. 1 can be obtained.

[Effects of the Invention] As described above, according to the present invention, an asymmetric magnetic disk drive is realized in which an erasing head is provided in front of a recording/reproducing head and a recording driver circuit reverses the recording current at the rising edge of a recording data pulse. Since the amount of ion generated can be reduced, the device can be made inexpensive and has the effect of improving reliability.

Another invention of the present invention is that the amount of asymmetry that occurs can be reduced in a magnetic disk device in which an erasing head is provided in front of the recording/reproducing head, and the recording driver circuit reverses the recording current at the falling edge of the recording data pulse. Therefore, the device can be manufactured at low cost and its reliability can be improved.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing one embodiment of the present invention, FIG. 2 is a diagram for explaining the operation of the embodiment of FIG. 1, and FIG.
FIG. 4 is a block diagram showing another embodiment of the present invention, FIG. 5 is a diagram for explaining the operation of the embodiment shown in FIG. 4, and FIG. 6 is an asymmetric FIG. In the figure, (1) is the recording/reproducing head, (2) is the erasing head,
(3) is the recording driver circuit, (7) is the erasing circuit, (11
) is an external flip-flop, (12) is a delay circuit, (1
7) is an exclusive OR circuit, and (18) is a second delay circuit. Note that the same reference numerals in the figures indicate the same or corresponding parts.

Claims (2)

[Claims] (1) A recording/playback head that performs recording and playback, an erasing head that performs direct current erasing over the entire surface of the recording track in a predetermined direction prior to recording, and a recording current that is applied to the recording/playback head according to recorded data. an erasing circuit that causes direct current to flow through the erasing head; a flip-flop that sequentially inverts in response to the pulse of the recording data; the rise of one signal of this flip-flop is delayed by t_r, and the fall is delayed by t_f. a delay circuit that generates an exclusive OR of the output of this delay circuit and the other output of the flip-flop, and inputs this exclusive OR output to the recording driver circuit as corrected recording data. A digital magnetic recording device characterized by comprising a circuit. (2) A recording/playback head that performs recording and playback, an erasing head that performs direct current erasure over the entire surface in a predetermined direction for the track on which recording is performed prior to recording, and a recording current that is applied to the recording/playback head depending on the recorded data. a recording driver circuit that causes direct current to flow through the erase head; and an erase circuit that causes direct current to flow through the erase head;
What is the delay time of a flip-flop that is sequentially inverted by a recording data pulse, a first delay circuit that delays the rise of only one signal of this flip-flop by t_r, and a delay time of the first delay circuit that delays the fall of the flip-flop by t_r? A second delay circuit that delays by a different time, and an exclusive OR of the output of the first delay circuit and the output of the second delay circuit, and record data corrected by the exclusive OR output. and an exclusive OR circuit that inputs the signal to the recording driver circuit.