JPH0444176U - - Google Patents

Info

Publication number
JPH0444176U
JPH0444176U JP8648590U JP8648590U JPH0444176U JP H0444176 U JPH0444176 U JP H0444176U JP 8648590 U JP8648590 U JP 8648590U JP 8648590 U JP8648590 U JP 8648590U JP H0444176 U JPH0444176 U JP H0444176U
Authority
JP
Japan
Prior art keywords
groove
ceramic substrate
integrated circuit
hybrid integrated
tapered portion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8648590U
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP8648590U priority Critical patent/JPH0444176U/ja
Publication of JPH0444176U publication Critical patent/JPH0444176U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】
第1図は本考案の実施例の斜視図、第2図は第
1図のA−A線に沿う矢視方向断面図、第3図は
従来のセラミツク基板の断面図である。 主要部分の符号の説明、1……セラミツク基板
、3……溝部、4……テーパ部。

Claims (1)

    【実用新案登録請求の範囲】
  1. 一主表面上に分割用の溝が形成された混成集積
    回路用セラミツク基板であつて、前記溝の両端部
    において、各端部に近づくに従つて溝部の深さが
    次第に大となるテーパ部を設けたことを特徴とす
    る混成集積回路用セラミツク基板。
JP8648590U 1990-08-17 1990-08-17 Pending JPH0444176U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8648590U JPH0444176U (ja) 1990-08-17 1990-08-17

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8648590U JPH0444176U (ja) 1990-08-17 1990-08-17

Publications (1)

Publication Number Publication Date
JPH0444176U true JPH0444176U (ja) 1992-04-15

Family

ID=31818176

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8648590U Pending JPH0444176U (ja) 1990-08-17 1990-08-17

Country Status (1)

Country Link
JP (1) JPH0444176U (ja)

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