JPH0441341Y2 - - Google Patents
Info
- Publication number
- JPH0441341Y2 JPH0441341Y2 JP8956186U JP8956186U JPH0441341Y2 JP H0441341 Y2 JPH0441341 Y2 JP H0441341Y2 JP 8956186 U JP8956186 U JP 8956186U JP 8956186 U JP8956186 U JP 8956186U JP H0441341 Y2 JPH0441341 Y2 JP H0441341Y2
- Authority
- JP
- Japan
- Prior art keywords
- parallel
- capacitance
- resistor
- amplifier
- relays
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000003990 capacitor Substances 0.000 claims description 11
- 239000000523 sample Substances 0.000 claims description 11
- 238000005259 measurement Methods 0.000 claims description 8
- 238000010586 diagram Methods 0.000 description 6
- 101100117775 Arabidopsis thaliana DUT gene Proteins 0.000 description 3
- 101150091805 DUT1 gene Proteins 0.000 description 3
- 101100444142 Neurospora crassa (strain ATCC 24698 / 74-OR23-1A / CBS 708.71 / DSM 1257 / FGSC 987) dut-1 gene Proteins 0.000 description 3
- 238000012360 testing method Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 230000007423 decrease Effects 0.000 description 1
- 230000001747 exhibiting effect Effects 0.000 description 1
Landscapes
- Analogue/Digital Conversion (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
- Tests Of Electronic Circuits (AREA)
Description
【考案の詳細な説明】
（産業上の利用分野）
本考案は、多点測定装置に関するものであり、
詳しくは、高精度で高周波測定が行える多点測定
装置を提供するものである。[Detailed description of the invention] (Field of industrial application) The invention relates to a multi-point measuring device,
Specifically, the present invention provides a multi-point measuring device that can perform high-frequency measurements with high precision.
（従来の技術）
例えば、カラーTV信号処理に用いられるＡ／
Ｄ変換器LSIのテストにあたつては、カラーデジ
タル信号をアナログ変換することによつて出力さ
れるＲ，Ｇ，Ｂの各アナログ色信号の出力ピンに
プローブを接続しておき、これら複数のプローブ
の出力をリレーを介して選択的に増幅器に加える
ことが行われている。(Prior art) For example, A/
When testing the D converter LSI, probes are connected to the output pins of the R, G, and B analog color signals that are output by converting the color digital signal to analog. The output of the probe is selectively applied to the amplifier via a relay.
第３図は、このような従来の測定装置の一例を
示す構成説明図である。第３図において、１は
Ａ／Ｄ変換器LSIなどの被測定物（以下DUTと
いう）であり、複数の出力ピンにはそれぞれプロ
ーブ２1〜２oが接続されている。プローブ２1〜
２oの出力端子にはリレー３1〜３oが直接接続さ
れている。リレー３1〜３oの端部は、並列に接続
された抵抗器４およびコンデンサ５よりなる直列
要素ZSを介して増幅器６に接続されている。増
幅器６の入力端子は、並列に接続された抵抗器７
およびコンデンサ８よりなる並列要素ZPを介し
て共通電位点に接続されている。なお、直列要素
ZSおよび並列要素ZPは入力減衰器を構成するも
のである。 FIG. 3 is a configuration explanatory diagram showing an example of such a conventional measuring device. In FIG. 3, reference numeral 1 denotes an object under test (hereinafter referred to as DUT) such as an A/D converter LSI, and probes 2 1 to 2 o are connected to a plurality of output pins, respectively. Probe 2 1 ~
Relays 3 1 to 3 o are directly connected to the output terminal of 2 o . The ends of the relays 3 1 to 3 o are connected to an amplifier 6 via a series element ZS consisting of a resistor 4 and a capacitor 5 connected in parallel. The input terminal of the amplifier 6 is connected to a resistor 7 connected in parallel.
and a common potential point via a parallel element ZP consisting of a capacitor 8. In addition, the series element
ZS and parallel element ZP constitute an input attenuator.
このような構成において、リレー３1〜３oを選
択的に駆動することにより、DUT1の所定の出力
ピンの出力信号が直列要素ZSおよび並列要素ZP
よりなる入力減衰器を介して増幅器６に加えられ
ることになる。 In such a configuration, by selectively driving the relays 3 1 to 3 o , the output signal of a predetermined output pin of the DUT 1 is connected to the series element ZS and the parallel element ZP.
The signal is applied to the amplifier 6 via an input attenuator consisting of the following.
（考案が解決しようとする問題点）
しかし、リレー３1〜３oには、通常１〜5pFの
浮遊容量C1〜Coが存在している。このために、
DUT1に多数のリレー３1〜３oを接続すると、等
価的には相当大きな静電容量が接続されることに
なる。例えば、100pFの静電容量に相当する数の
リレー３1〜３oが接続された場合を考えると、出
力信号の周波数が100MHzの場合のインピーダン
スは10数Ωになり、DUT1にとつてはシヨート状
態に近くなつてしまう。この結果、高周波測定に
おける測定精度が低下することになり、好ましく
ない。(Problems to be Solved by the Invention) However, the relays 3 1 to 3 o usually have stray capacitances C 1 to C o of 1 to 5 pF. For this,
When a large number of relays 3 1 to 3 o are connected to the DUT 1, equivalently, a considerably large capacitance is connected. For example, if we consider the case where a number of relays 3 1 to 3 o corresponding to a capacitance of 100 pF are connected, the impedance will be several dozen Ω when the frequency of the output signal is 100 MHz, which is a short distance for DUT1. It's getting close to the situation. As a result, measurement accuracy in high-frequency measurements decreases, which is undesirable.
本考案は、このような点に着目したものであつ
て、その目的は、入力回路の静電容量を減らすこ
とによつて高精度の高周波測定が行える多点測定
装置を提供することにある。 The present invention focuses on these points, and its purpose is to provide a multi-point measuring device that can perform high-precision high-frequency measurements by reducing the capacitance of the input circuit.
（問題点を解決するための手段）
このような目的を達成する本考案は、被測定物
の多数の測定点に接続される複数のプローブと、
並列に接続された抵抗器とコンデンサよりなり一
端が各プローブの出力端子に接続され他端がそれ
ぞれ選択的に駆動されるリレーを介して増幅器の
入力端子に接続される複数の直列要素と、並列に
接続された抵抗器とコンデンサよりなり一端が増
幅器の入力端子に接続され他端が共通電位点に接
続された並列要素とで構成されたことを特徴とす
る。(Means for Solving the Problems) The present invention that achieves the above purpose includes a plurality of probes connected to a large number of measurement points of a measured object,
A plurality of series elements consisting of resistors and capacitors connected in parallel, one end connected to the output terminal of each probe and the other end connected to the input terminal of the amplifier via a selectively driven relay, respectively. It is characterized in that it consists of a parallel element consisting of a resistor and a capacitor connected to the input terminal of the amplifier, one end of which is connected to the input terminal of the amplifier, and the other end of which is connected to a common potential point.
（実施例）
以下、図面を用いて本考案の実施例を詳細に説
明する。(Example) Hereinafter, an example of the present invention will be described in detail using the drawings.
第１図は本考案の一実施例を示す構成説明図で
あり、第３図と同一部分には同一符号を付けてい
る。第１図において、各プローブ２1〜２oと各リ
レー３1〜３oとの間には、並列に接続された抵抗
器４〜４oとコンデンサ５1〜５oよりなる直列要
素ZS1〜ZSoがそれぞれ接続されている。なお、
増幅器６の入力端子は、第３図と同様に並列に接
続された抵抗器７およびコンデンサ８よりなる並
列要素ZPを介して共通電位点に接続されている。
ここで、並列要素ZPを構成するコンデンサ８の
静電容量は、リレー３1〜３oの浮遊容量C1〜Coを
含んだ状態で所定の値になるように設定されてい
る。 FIG. 1 is a configuration explanatory diagram showing one embodiment of the present invention, and the same parts as in FIG. 3 are given the same reference numerals. In FIG. 1, between each probe 2 1 - 2 o and each relay 3 1 - 3 o , there is a series element ZS 1 consisting of resistors 4 - 4 o and capacitors 5 1 - 5 o connected in parallel. ~ZS o are connected respectively. In addition,
The input terminal of the amplifier 6 is connected to a common potential point via a parallel element ZP consisting of a resistor 7 and a capacitor 8 connected in parallel as in FIG.
Here, the capacitance of the capacitor 8 constituting the parallel element ZP is set to a predetermined value including the stray capacitances C 1 to Co of the relays 3 1 to 3 o .
このような構成において、リレー３1〜３oを選
択的に駆動することにより、DUT1の所定の出力
ピンの出力信号が直列要素ZS1〜ZSoおよび並列
要素ZPよりなる入力減衰器を介して増幅器６に
加えられることになる。 In such a configuration, by selectively driving relays 3 1 to 3 o , the output signal of a predetermined output pin of DUT 1 is transmitted through an input attenuator consisting of series elements ZS 1 to ZS o and parallel element ZP. It will be added to amplifier 6.
そして、プローブ２1〜２oから見た入力回路の
静電容量は、直列要素ZS1〜ZSoを構成するコン
デンサ５1〜５oの静電容量とリレー３1〜３oの浮
遊容量C1〜Coを含む並列要素ZPの静電容量との
直列容量のみとなり、従来に比べて減らすことが
できる。 The capacitance of the input circuit as seen from the probes 2 1 to 2 o is the capacitance of the capacitors 5 1 to 5 o configuring the series elements ZS 1 to ZS o and the stray capacitance C of the relays 3 1 to 3 o . There is only a series capacitance with the capacitance of the parallel element ZP including 1 to C o , which can be reduced compared to the conventional case.
第２図は、第１図で任意のリレーを駆動した状
態を示す等価回路図である。第２図において、
3dB低下の周波数特性を示す周波数は、
ｆ＝１／（2π√RC） …(1)
で表わすことができる。従つて、入力回路の静電
容量Ｃが小さくなると周波数ｆは高くなり、測定
可能帯域が広がることになる。また、DUT1の駆
動能力が小さいものでも測定可能となる。DUT1
の駆動能力が小さいということは、抵抗Ｒが大き
いということと等価である。従つて、抵抗Ｒが大
きくても静電容量Ｃが小さくなれば第（１）式で
示す周波数ｆは一定になる。 FIG. 2 is an equivalent circuit diagram showing a state in which an arbitrary relay in FIG. 1 is driven. In Figure 2,
The frequency exhibiting the frequency characteristic of 3 dB reduction can be expressed as f=1/(2π√RC) (1). Therefore, as the capacitance C of the input circuit becomes smaller, the frequency f becomes higher and the measurable band becomes wider. Furthermore, it is possible to measure even if the DUT1 has a small driving capacity. DUT1
A small driving ability is equivalent to a large resistance R. Therefore, even if the resistance R is large, if the capacitance C is small, the frequency f expressed by equation (1) becomes constant.
なお、上記実施例では、Ａ／Ｄ変換器LSIをテ
ストする装置の例について説明したが、他の多点
測定装置にも適用できるものである。 In the above embodiment, an example of a device for testing an A/D converter LSI has been described, but the present invention can also be applied to other multi-point measurement devices.
（考案の効果）
以上説明したように、本考案によれば、入力回
路の静電容量を減らすことによつて高精度の高周
波測定が行える多点測定装置が実現でき、実用上
の効果は大きい。(Effects of the invention) As explained above, according to the invention, a multi-point measuring device that can perform high-precision high-frequency measurements can be realized by reducing the capacitance of the input circuit, and the practical effects are significant. .
第１図は本考案の一実施例を示す構成説明図、
第２図は第１図の等価回路図、第３図は従来の装
置の一例を示す構成説明図である。
１……被測定物（DUT）、２1〜２o……プロー
ブ、３1〜３o……リレー、４1〜４o，７……抵抗
器、５1〜５o，８……コンデンサ、６……増幅
器。
FIG. 1 is a configuration explanatory diagram showing an embodiment of the present invention;
FIG. 2 is an equivalent circuit diagram of FIG. 1, and FIG. 3 is a configuration explanatory diagram showing an example of a conventional device. 1...DUT (DUT), 21-2o ...Probe , 31-3o ...Relay, 41-4o , 7...Resistor, 51-5o , 8... Capacitor , 6...Amplifier.
Claims (1)
ローブと、並列に接続された抵抗器とコンデンサ
よりなり一端が各プローブの出力端子に接続され
他端がそれぞれ選択的に駆動されるリレーを介し
て増幅器の入力端子に接続される複数の直列要素
と、並列に接続された抵抗器とコンデンサよりな
り一端が増幅器の入力端子に接続され他端が共通
電位点に接続された並列要素とで構成されたこと
を特徴とする多点測定装置。 It consists of multiple probes connected to multiple measurement points on the object to be measured, and a relay consisting of a resistor and capacitor connected in parallel, one end of which is connected to the output terminal of each probe, and the other end of which is selectively driven. A parallel element consisting of a resistor and a capacitor connected in parallel, with one end connected to the amplifier input terminal and the other end connected to a common potential point. A multi-point measuring device characterized in that:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8956186U JPH0441341Y2 (en) | 1986-06-12 | 1986-06-12 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8956186U JPH0441341Y2 (en) | 1986-06-12 | 1986-06-12 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS62201078U JPS62201078U (en) | 1987-12-22 |
| JPH0441341Y2 true JPH0441341Y2 (en) | 1992-09-29 |
Family
ID=30948657
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8956186U Expired JPH0441341Y2 (en) | 1986-06-12 | 1986-06-12 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0441341Y2 (en) |
-
1986
- 1986-06-12 JP JP8956186U patent/JPH0441341Y2/ja not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS62201078U (en) | 1987-12-22 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US8564308B2 (en) | Signal acquisition system having reduced probe loading of a device under test | |
| US20130221985A1 (en) | Signal acquisition system having reduced probe loading of a device under test | |
| US7423480B2 (en) | AC amplifier for precision measurement | |
| JPH1054851A (en) | Instrument for measuring output current of power source | |
| US20110074441A1 (en) | Low Capacitance Signal Acquisition System | |
| JPH0434950A (en) | Semiconductor integrated circuit device | |
| GB2451314A (en) | An input amplifier for a digital multimeter | |
| CN111044963B (en) | High-frequency current sensor calibration method and device adopting coaxial shunt | |
| JPH0441341Y2 (en) | ||
| JPS6325572A (en) | Leakage current measuring system of electrometer amplifier | |
| RU2080609C1 (en) | Method for determining complex impedance of two-pole network in frequency band | |
| US3448378A (en) | Impedance measuring instrument having a voltage divider comprising a pair of amplifiers | |
| CN105974350B (en) | The designing and debugging methods of the high-potential voltage of resistance to radio frequency tester probe circuit | |
| Heuermann et al. | Results of network analyzer measurements with leakage errors-corrected with direct calibration techniques | |
| JP2004245584A (en) | Two-terminal circuit element measuring device and contact check method | |
| US2873424A (en) | Tube tester | |
| JPS59148855A (en) | Measuring device for conductance of epidermal horny layer | |
| JPS61209361A (en) | Method for measuring electrostatic capacity | |
| JP3190429B2 (en) | Balanced voltage measuring device and balanced voltage measuring method | |
| JP3147987B2 (en) | Equilibrium system characteristic parameter measuring device and measuring method | |
| CN115047247B (en) | A method for testing parameters of passive RC integrator under low resistance conditions | |
| CN217083645U (en) | Bridge strain testing device | |
| CN219935963U (en) | Voltage and current measurement channel of digital bridge and digital bridge | |
| JP2871505B2 (en) | Impedance measurement method | |
| JPS6241261Y2 (en) |