JPH04369989A - Coding method and coder - Google Patents

Abstract

PURPOSE:To compress the data quantity of a digital image signal such as a color television signal with high efficiency by sub-band-dividing a digital image signal to plural frequency bands, blocking and coding the divided image signal of each band. CONSTITUTION:An A/D converter 4 converts Y, R-Y and B-Y signals into a digital signal and outputs these to a sub-band dividing circuit 5. The sub-band deviding circuit 5 band-divides respective Y, R-Y and B-Y signals into four sub-bands in accordance with the frequency, blocks for each sub-band and outputs the block to a three-dimensional orthogonal converting circuit 6. The three-dimensional orthogonal converting circuit 6 performs the discrete cosine conversion to each block, obtains the converting coefficient and outputs the obtained converting coefficient to a coder 7. The coder 7 quantizes and codes the inputted converting coefficient and outputs the coded data through an output terminal 8. Here, the position of the converting coefficient to start the one- dimensional scanning for each sub-band is changed.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an encoding method and apparatus for dividing a digital image signal into subbands into a plurality of frequency bands, and dividing the image signal of each divided band into blocks for encoding.

0002

[Prior art and problems to be solved by the invention] Conventionally,
As a method for encoding digital image signals,
-253382 and U.S. Patent Application No. 4,394,
There was something shown in No. 774. The following is an explanation using these publications as examples.

FIG. 1 is a block diagram showing the configuration of a conventional digital image signal encoding apparatus disclosed in Japanese Patent Application Laid-Open No. 1-253382. The main motion evaluation circuit 101 is
A principal displacement vector with the minimum image-to-image difference with respect to the preceding image is defined for each image, and scan conversion circuit 102
and the encoding circuit 105. Scan conversion circuit 1
02 constitutes a two-dimensional block of 8 pixels x 8 lines, and a three-dimensional block is constituted by four two-dimensional blocks of four consecutive images. In each three-dimensional block, four two-dimensional blocks of 8 pixels x 8 lines are spatially shifted from one image to the next according to the displacement vector for each image output from the principal motion evaluation circuit 101. has been done. Scan conversion circuit 102
The three-dimensional block output from the three-dimensional orthogonal transform circuit 103 undergoes orthogonal transformation. The quantization/normalization circuit 104 realizes normalization and quantization of the transform coefficients output from the three-dimensional orthogonal transform circuit 103 . The normalization operation weights the transform coefficients by multiplying them or dividing them by parameters associated with the filling rate of the rate control memory 106 and the transform coefficients themselves. Quantization converts the normalized value of each transform coefficient expressed as a floating point into an integer value.

The output of the quantization and normalization circuit 104 is applied to an encoding circuit 105 which encodes the words between a predefined set of words represented as a Huffman code and stored in memory. and another word representing the address of the encoded value to the rate control memory 106 for each non-zero quantum value. This address is defined along with the one-dimensional scan of the three-dimensional block by encoding the length of the sequence of zero values. Such an encoding circuit 105 with variable length encoding function
is of a common type. Speed control memory 10
6 ensures that the speed of the output is constant. U.S. Pat. No. 4,394,774 describes a method for reducing the speed of encoding a sequence of zero values from rate control memory 106.

FIG. 2 shows another embodiment of the encoding circuit 105, which, as in FIG. 2, comprises m parallel paths, each of which receives all the values to be encoded. It is also possible to provide More specifically,
These values are applied to each memorized circuit according to the path,
This circuit itself functions as a flip-flop2
It has two memories. For a given 3D block a value is written to one of these two memories, while
The values of the previous block are read in other memories in the order corresponding to the new scan. Figures 3(a) and 3(b) illustrate two scanning types for this reading operation. Figure 3 (a
) allows minimizing the speed of blocks with fixed content, while the type shown in FIG. 3(b) is concerned with moving parts. Each memorization circuit 111a to 1
The output of 11m is applied to coupling circuits 112a-112m, which are described in U.S. Patent Application No. 4,394,774.
This is an encoding circuit that implements variable-length encoding in the manner described in the patent application. Each output of the circuits 112a to 112m is applied to a counting/selection circuit 113. This circuit counts for each 3D block the number of bits used to encode the block for each scan, then determines the scan that minimizes the speed of each 3D block, and It controls the output of the branch circuit 114 which stores the bits from the circuit and ensures the transfer of the bits corresponding to the best coding of the three-dimensional block from the branch circuit 114 to the multiplexing circuit 115. A multiplexing circuit 115 multiplexes these bits with the selected scan index, which must be transmitted to a decoding device for reconstruction of the block;
It also guarantees the transmission of the principal displacement vectors that determine these images at the beginning of each group of four images.

In the conventional digital image signal encoding method, when performing one-dimensional scanning of transform coefficients after three-dimensional orthogonal transformation, the scanning type shown in FIG. In contrast, by selecting the scanning type shown in FIG. 3(b), the amount of code is reduced. However, when subband division and three-dimensional orthogonal transformation are combined, that is, when a digital image signal is divided into multiple frequency bands and then three-dimensional orthogonal transformation is applied to each band component, especially high frequency Regarding components containing , there is a problem that the scanning types shown in FIGS. 3(a) and 3(b) are not the best scanning types.

The quantization level of the transform coefficients output from the three-dimensional orthogonal transform circuit 103 is determined by the filling speed of the speed control memory 106 and parameters related to the transform coefficients themselves. However, when such quantization is performed, there is a problem that, for example, when flat areas and edge areas coexist in one block, noise in the flat areas becomes very noticeable in the restored image.

Furthermore, in the above-mentioned Japanese Patent Laid-Open No. 1-253382, if the available signal is interlaced scanned, it is converted into a sequentially scanned image signal before encoding. Therefore, as shown in Figure 4, one video is constructed in frame units, with the first dimension being in the horizontal direction (■), the second dimension being in the vertical direction (■), and the third dimension being in the temporal direction (■). The redundant components of the video signal are reduced by constructing a three-dimensional block and performing orthogonal transformation.

By the way, an actual television screen employs an interlaced scanning method as shown in FIG. This method prevents flickering without increasing the amount of information transmitted when transmitting video information. Therefore, scanning for one screen is completed with half the number of scanning lines as in FIG. In the next screen, lines that were not scanned in the previous screen are scanned to suppress a decrease in the vertical resolution of the image. With interlaced scanning, the number of screens transmitted within the same period of time is double that of sequential scanning, so flicker can be suppressed. This roughly scanned screen is called a field, and as shown in Figure 6, one frame consists of two consecutive fields.
In the System Committee method, the scanning speed is approximately 60 fields per second.

The conventional digital image signal encoding method is as follows:
Since three-dimensional blocks are constructed from progressive scanning image signals, it is not always possible to effectively reduce the redundancy of the image signals for interlaced scanning image signals. If an interlaced scanning image signal with particularly large movements is encoded in the same way as a progressive scanning image signal, a two-dimensional block containing a mixture of spatial displacement and temporal displacement will be constructed. However, there was a problem in that the redundancy of the image signal was not reduced very much.

FIG. 7 shows, for example, the IEEE Transac
tions on Consumer Electro
nics, Vol. 34, No. 3 (AUGUSUT
, 1988) “AN EXPERIMENTAL
DIGITAL VCR WITH 40MM DRU
M, SINGLE ACTUATOR AND DCT
-BASED BIT-RATE REDUCTION
121 is a block diagram showing the configuration of the conventional encoding device shown in FIG. Output the image signal of each block to the DCT circuit 122.DCT
The circuit 122 performs DCT (Discrete Transformation) on each block of the image signal output from the blocking circuit 121.
e Cosine Transform).
The conversion coefficients are output to the weighting circuit 123. The weighting circuit 123 weights each transform coefficient and then outputs the weighted transform coefficient to the adaptive quantization circuit 124 . The adaptive quantization circuit 124 has a plurality of quantization tables with different quantization step widths, quantizes the weighted transform coefficients using the optimal quantization step width, and sends the quantized transform coefficients to the variable length encoding circuit 125. Output. The variable length encoding circuit 125 performs variable length encoding on the quantized transform coefficients, and outputs the variable length encoded data to the buffer memory 126 . The buffer memory 126 converts variable length encoded data into a fixed rate, stores it, and outputs it at a fixed output rate. The buffer controller 127 switches the quantization step width in the adaptive quantization circuit 124 and selects the transform coefficients to be encoded in the variable length encoding circuit 125 so that the buffer memory 126 does not overflow.

Next, specific operations will be explained. The input digital image signal consists of, for example, a luminance signal and two color difference signals, and these signals are sent to the blocking circuit 1.
21, after time division, for example, 8 pixels x 8
The signal is divided into blocks of lines and output to the DCT circuit 122. The DCT circuit 122 performs 8-point discrete cosine transformation in the horizontal and vertical directions on the image signal of each block. First, the image signal is x (i, j) (i, j = 0
, 1,..., 7), 8 points D in the horizontal direction according to the following equation
CT is performed.

[0013]

[Math 1]

The converted image signals f(0,j), f(
m, j) is subjected to vertical 8-point DCT according to the following formula, and the image signal is transformed into a transform coefficient F(m, n) (m, n=0
, 1,..., 7), and the weighting circuit 12
Output to 3.

[0015]

[Math 2]

Each transform coefficient input to the weighting circuit 123 is weighted. in particular,
Taking advantage of the fact that human vision is dull for high spatial frequencies, as shown in Figure 8, small weighting is applied to areas containing high spatial frequency components, and weighting is applied to areas containing low spatial frequency components. Do a lot of waiting. Here, the weighting coefficient W (m, n) is expressed by the following formula.

[0017]

[Math 3]

The output of the weighting circuit 123 is quantized by an adaptive quantization circuit 124. Based on the transform coefficients in each block and the quantization parameters from the buffer controller 127, an optimal quantization step width is selected in the adaptive quantization circuit 124, and the weighted transform coefficients are determined by the optimal quantization step width. is quantized. Specifically, a coarse quantization step width is selected when the video data is a high contrast rising portion, and a fine quantization step width is selected when the video data is a small amplitude detail portion.

The quantized transform coefficients are variable-length coded in a variable-length coding circuit 125 and then stored in a buffer memory 126 . The amount of data stored in the buffer memory 126 is
buffer controller 127 to prevent overflow.
It is detected by. The buffer controller 127 determines a quantization parameter according to the amount of data stored in the buffer memory 126, switches the quantization step width in the adaptive quantization circuit 124 based on this quantization parameter, and The transform coefficients to be encoded by the variable length encoding circuit 125 are selected according to the amount. In other words, the buffer controller 127 increases the data compression rate when the amount of data stored in the buffer memory 126 is large, and adjusts to lower the data compression rate when the amount of data is small. 126 is prevented from overflowing. Data stored in buffer memory 126 is read out at a fixed output rate.

[0020] In such an encoding device, when a digital image signal is divided into subbands and orthogonal transformation is applied to blocks of each subband, the frequency characteristics of each subband differ due to the effect of subsampling aliasing. Therefore, appropriate weighting is required for each subband.

As a method for reducing the encoding rate of digital image signals, there is a method of periodically thinning out sampled image signals, that is, a method using subsampling, as disclosed in Japanese Patent Laid-Open No. 63-38385. be. FIGS. 9 and 10 are block diagrams showing the configurations of the transmitting side (recording side) and receiving side (reproducing side) of an encoding apparatus in which such a method is applied to color image signals.

First, the transmitting side will be explained with reference to FIG. For example, an NTSC color image signal is input to the input terminal 131 . This color image signal is output to the A/D converter 132, and is, for example, 4 fsc (fsc:
color subcarrier frequency) sampling frequency,
A digital color image signal in which one sample is quantized to 8 bits is obtained from the A/D converter 132. This digital color image signal is sent to the subsampling circuit 133.
The output signal of the sub-sampling circuit 133 is input to the blocking circuit 134. No band-limiting prefilter is provided before the subsampling circuit 133, so that high-frequency components of the input color image signal are not lost.

In the sub-sampling circuit 133,
A digital color image signal is sampled at a sampling frequency of 2 fsc. In addition, blocking circuit 1
34, the input digital color image signal is converted into a continuous signal for each two-dimensional block, which is a unit of encoding. In this example, the size of one block formed by dividing one field of screen is 8 pixels x 4 lines = 3
It has 2 pixels. FIG. 11 shows this one block, and in FIG. 11, solid lines indicate lines of odd-numbered fields, and broken lines indicate lines of even-numbered fields. Note that, unlike this example, one block may be a three-dimensional block composed of four two-dimensional regions belonging to each of four frames, for example. The sub-sampling circuit 133 provided before the blocking circuit 134 thins out the pixels in the block as shown in FIG.
The number of pixels in one block is 16. In FIG. 12, ◯ indicates subsampled pixels, and × indicates thinned out pixels.

The output signal of the blocking circuit 134 is input to a dynamic range (DR) detection circuit 135 and a delay circuit 136. The DR detection circuit 135 detects the dynamic range DR and the minimum value MIN for each block.
Detect. The pixel data PD from the delay circuit 136 is output to the subtracter 137, and in the subtracter 137,
Pixel data PDI from which the minimum value MIN has been removed is formed.

The quantization circuit 138 receives the pixel data PDI and dynamic range DR that have been subsampled and have undergone minimum value removal through the subtracter 137 . The quantization circuit 138 quantizes the pixel data PDI in accordance with the dynamic range DR. A code signal DT in which one pixel data is converted into 4 bits is obtained from the quantization circuit 138.

The code signal DT from this quantization circuit 138 is output to a frame formation circuit 139. The framing circuit 139 includes additional codes for each block.
Dynamic range DR (8 bits) and minimum value MIN
(8 bits) is input. The framing circuit 139 is
The code signal DT and the above-mentioned additional code are subjected to error correction encoding processing, and a synchronization signal is added. Transmission data is obtained at the output terminal 140 of the framing circuit 139,
This transmission data is sent out to a transmission path such as a digital line. In the case of a digital VTR, the output signal is sent to a rotating head via a recording amplifier, a rotating transformer, etc.

Next, the receiving side will be explained with reference to FIG. Received data from input terminal 141 is input to frame decomposition circuit 142. Frame decomposition circuit 1
42, the code signal DT and additional codes DR, M
IN is separated and error correction processing is performed. The code signal DT and dynamic range DR are input to the decoding circuit 143.

The decoding circuit 143 performs processing opposite to that of the quantization circuit 138 on the transmitting side. That is, the data after the 8-bit minimum level is removed is decoded to the representative level, and this data and the 8-bit minimum value MIN are added to the adder 144.
The original pixel data is decoded. The output data of the adder 144 is output to the block decomposition circuit 145. The block decomposition circuit 145 converts the decoded data in the block order into the same order as the scanning of the television signal, contrary to the blocking circuit 134 on the transmitting side. The output signal of the block decomposition circuit 145 is
6 is output. The interpolation circuit 146 interpolates the thinned out pixel data using surrounding subsampling data. A digital color image signal with a sampling frequency of 4 fsc from the interpolation circuit 146 is output to the D/A converter 147. An analog color image signal is obtained at the output terminal 148 of the D/A converter 147. Note that if a prefilter is not provided on the transmitting side, aliasing distortion may occur, for example, at a point where there is a sharp change in the brightness level, so a circuit for removing this distortion is provided on the output side of the interpolation circuit 146. You can also connect.

[0029] In the encoding device configured as described above, the encoding rate is reduced, but the resolution of the moving image is degraded and aliasing distortion occurs, resulting in a large deterioration of the image quality, making it difficult to perform high-quality image encoding. The problem is that it is not sufficient.

FIGS. 13 and 14 show, for example, the IEEE T
transactions on circuits a
nd Systems, Vol. 35, No. 2. F
ebruary 1988's "Sub-Band Co
ding of Monochrome and Co
FIG. 1 is a block diagram showing the configuration of a conventional subband division/synthesis circuit shown in ``Lor Images''.

The digital image signal inputted from the input terminal 151 is inputted to a horizontal low-pass filter 152 (hereinafter referred to as horizontal LPF 152) which limits the horizontal frequency of the image signal. The horizontal LPF 152 is shown in FIG.
It is an even-tap filter with frequency characteristics like a, and its coefficients are h1 (n) (n=0,...,N-1
; N is an even number), then h1 (n) = h1 (N
-n-1), n=0,..., (N/2)-1. In other words, the input image signal is 256 pixels x 256
For each line x(n) (n=1,...,256) of the image signal, the horizontal LPF 152 is
A signal shown in equation (1) below is output.

[0032]

[Math 4]

On the other hand, the input digital image signal is
It is also input to a horizontal high-pass filter 153 (hereinafter referred to as horizontal HPF 153) that limits the horizontal frequency of the image signal. The horizontal HPF 153 is an even-tap filter with frequency characteristics as shown in Fig. 15b, and its coefficient h
2 (n) (n=0,...,N-1) is h2 (n) = h1 (n) · (-1)n. Therefore, h2 (n) =-h2 (N-n-1), n=0,
..., (N/2)-1. That is, horizontal HPF 1
53 is each line x(n) (n=1,...
, 256), a signal shown in equation (2) below is output.

[0034]

[Math 5]

Horizontal LPF 152 and horizontal HPF
The outputs of 153 are 2:1 horizontal pixels, respectively.
Horizontal 2:1 subsampling circuit 154a, 1
54b, and the number of pixels in the horizontal direction is thinned out to 1/2. horizontal 2:1 subsampling circuit 154a,
The output of 154b is a vertical low-pass filter 155a, 155b (hereinafter referred to as vertical LPF 1) that limits the vertical frequency.
55a and 155b). Vertical LPF
155a and 155b are even-tap filters with frequency characteristics as shown in a of FIG.
3 (m) (m=0,...,M-1; M is an even number), then h3 (m) =h3 (M-m-1), m=0,...
, (M/2)-1. That is, vertical LPF 15
5a and 155b are for each column w(m) (m=1,...,256) of the image signal output from the horizontal 2:1 subsampling circuits 154a and 154b, respectively.
Outputs a signal expressed by the following equation.

[0036]

[Math 6]

The outputs of the vertical LPFs 155a and 155b are vertical 2:1 pixels that are thinned out in the vertical direction by 2:1.
:1 In the sub-sampling circuits 157a and 157c, the number of pixels in the vertical direction is thinned out to 1/2 and outputted from output terminals 158a and 158c, respectively. The signal output from this output terminal 158a is 4 as shown in FIG.
This is a signal in the LL portion of the two frequency bands. Furthermore, the signal output from the output terminal 158c is as shown in FIG.
This is the signal of the HL part of. On the other hand, the outputs of the horizontal 2:1 sub-sampling circuits 154a and 154b are respectively filtered by a vertical high-pass filter 156a that limits the vertical frequency.
, 156b (hereinafter referred to as vertical HPF 156a, 156b
) is also input. Vertical HPF 156a, 15
6b is an even-tap filter with frequency characteristics as shown in FIG. 15b, and its coefficient h4 (m) (m=
0,...,M-1) is h4 (m) = h3 (m)
・(-1)m. Therefore, h4 (m) =-h4 (M-m-1), m=0,
..., (M/2)-1. That is, vertical HPF 1
56a and 156b output a signal expressed by the following formula for each column w(m) (m=1,...,256) of the image signal output from the horizontal 2:1 subsampling circuits 154a and 154b, respectively. do.

[0038]

[Math 7]

The outputs of the vertical HPFs 156a and 156b are respectively sent to a vertical 2:1 subsampling circuit 157.
b, 157d, the number of pixels in the vertical direction is 1/2
The signals are thinned out and output from output terminals 158b and 158d, respectively. The signal output from this output terminal 158b is a signal in the LH portion of the four frequency bands shown in FIG. Further, the signal outputted from the output terminal 158d is the signal of the HH portion in FIG. 16.

The above is the operation of the subband division circuit. The four signals output after being divided into subbands are each encoded using predictive encoding, orthogonal transformation, etc.
transmitted. On the decoding side, after decoding these signals,
Perform subband synthesis. The operation of the subband synthesis circuit shown in FIG. 14 is completely opposite to the operation of the subband division circuit shown in FIG. The signals output from the output terminals 158a to 158d on the division side are inputted to the input terminals 159a to 159d, respectively, and 0 is interpolated in the vertical 1:2 interpolation circuits 160a to 160d, and the pixels in the vertical direction are The number will be doubled. The outputs of the vertical 1:2 interpolation circuits 160a and 160c are input to vertical LPFs 161a and 161b, respectively. Vertical LPF 161a, 161b is vertical LPF 1
55a and 155b, and vertical 1:2 interpolation circuits 160a and 160c, respectively.
Each column u1'(m) (m
=1,...,256), a signal expressed by the following equation is output.

[0041]

[Math. 8]

On the other hand, the vertical 1:2 interpolation circuits 160b, 16
The outputs of 0d are vertical HPFs 162a and 1, respectively.
62b. Vertical HPF 162a, 162
b is a filter having exactly the same characteristics as the vertical HPFs 156a and 156b, and each column u2'(m) (m=1,...,256) of the image signal output from the vertical 1:2 interpolation circuits 160b and 160d, respectively. ), outputs a signal expressed by the following formula.

[0043]

[Math. 9]

Arithmetic unit 163a subtracts the output of vertical HPF 162a from the output of vertical LPF 161a, and arithmetic unit 163b subtracts the output of vertical HPF 162a from the output of vertical LPF 161b.
Subtract the output of F 162b. Arithmetic units 163a, 16
The outputs of 3b are horizontal 1:2 interpolators 164, respectively.
a, 164b, 0 is interpolated and the number of pixels in the horizontal direction is doubled. The output of the horizontal 1:2 interpolation circuit 164a is input to the horizontal LPF 165. Horizontal LPF 1
65 is a filter having exactly the same characteristics as the horizontal LPF 152, and each line y1'(n) (n=1,
..., 256), a signal expressed by the following equation (3) is output.

[0045]

[Math. 10]

On the other hand, the output of the horizontal 1:2 interpolation circuit 164b is input to the horizontal HPF 166. Horizontal HPF
166 is a filter having exactly the same characteristics as the horizontal HPF 153, and each line y2'(n) (n=1
, ..., 256), a signal expressed by the following equation (4) is output.

[0047]

[Math. 11]

The arithmetic unit 167 is a horizontal LPF 165
The output of the horizontal LPF 166 is subtracted from the output of the horizontal LPF 166 , and the subtracted signal is output from the output terminal 168 .

Although the conventional subband division/synthesis circuit is configured as described above, there is a problem in filtering at the end points of an image. That is, the above-mentioned document “Su
b-Band Coding of Monochrom
e and Color Images”,
Both the horizontal filter and the vertical filter use 16-tap filters as shown in Table 1 below. For example, when an input image signal is passed through the horizontal LPF 152, each line x(n) of the image signal (n=1,...,256
), in order to perform the calculation of equation (1), x(−
6), ..., x (0) and x (257), ...,
There was a problem that the value of x (264) was required.

[0050]

[Table 1]

Conventionally, as a solution to such a problem, input signal x(n) (n=1, . . . , 256) to the filter is
There was a way to loop back, connect, and perform calculations. That is, the filter operation is performed as follows.

However, when the image signal is folded back and filtered in this way, there is a problem in that the result of subband division and synthesis does not completely return to its original state at the end points of the image. To specifically illustrate this problem, the first line x(n) of the input image signal (n=1,...,2
56), but x(1) = 16, x(2) = 1
20, x(3) =130, x(4) =14
0, x(5) =150, x(6) =160,
x(7) =170, x(8) =180,
x(9) = 190, x(10) = 200, x(n
) = 200, (n = 11, ..., 256). When this is passed through a 16-tap horizontal LPF 152 as shown in Table 1 and thinned out to 2:1 by a horizontal 2:1 subsampling circuit 154a, equation (1), (
From formula 5), y1 (1) =59.6, y1
(3) =144.7, y1 (5) =152.
6, y1 (7) =175.1, y1 (9)
=195.3, y1 (11) =200.5,
y1 (13)=199.8, y1 (15)=2
00.0,y1 (17)=199.9... is output. On the other hand, when it passes through the horizontal HPF 153 and the horizontal 2:1 subsampling circuit 154b, (2
) and (5), y2 (1) = -37.7, y2 (3) =
8.2, y2 (5) = -3.1, y2 (
7) =1.0,y2 (9) =-1.6,
y2 (11)=0.1, y2 (13)=-0.
1, y2 (15) = 0.1, y2 (17) = 0.
0,... are output. Assuming that no distortion occurs in the vertical subband division in the next-stage vertical 2:1 subsampling circuits 155a to 157d and the vertical subband synthesis in the vertical 1:2 interpolation circuits 160a to 163b, the calculation The output of the device 163a is y1 (n) (n=1,
3, 5, . . . , 255), and the output of the arithmetic unit 163b is y2 (n) (n=1, 3, 5, . . . , 255). Here, the outputs of the arithmetic units 163a and 163b are folded in the same manner as in equation (5).

That is, the following is true. At this time, the output y1'(n) of the horizontal 1:2 interpolation circuit 164a (n=-255,-254,...,51
1) and the output y2' of the horizontal 1:2 interpolation circuit 164b.
(n) (n=-255,-254,...,511) are respectively as follows. Therefore, the output x1 (
From equation (3), x1 (1) = 46.3, x1 (2) = 7
7.9, x1 (3) =129.4, x1 (
4) =156.1, x1 (5) =151.0
, x1 (6) = 153.2, x1 (7) =
169.1, x1 (8) =182.0, x
1 (9) = 191.3,..., and the output x2 (n) of the horizontal HPF 166 is, from equation (4), x2 (1) = 45.5, x2 (2) = -
27.4, x2 (3) = -1.8, x2 (
4) =11.9, x2 (5) =0.7
, x2 (6) = -6.0, x2 (7)
=-0.7, x2 (8) =2.1,
x2 (9) = 1.4,... Therefore, the output X(n) of the arithmetic unit 167 is
Rounding off to the nearest whole number, X(1) = 0, X(2) = 105,
X(3) =131, X(4) =144,X
(5) =150, X(6) =159,
X(7) =170, X(8) =180,X
(9) =190,..., and the area near the end point of the image (
n=1,...,4), X(n) ≠x(n)
This shows that the image cannot be accurately restored.

The present invention has been made in view of the above circumstances, and its main object is to provide an encoding method and an encoding apparatus that can highly efficiently compress the amount of data of a digital image signal such as a color television signal. shall be.

Another object of the present invention is to provide an encoding method that can perform optimal one-dimensional scanning and reduce redundancy of digital image signals when performing three-dimensional orthogonal transformation after subband division. An object of the present invention is to provide an encoding device.

Still another object of the present invention is to provide an encoding method and an encoding apparatus that can reduce redundancy even in interlaced scanning digital image signals.

Still another object of the present invention is to provide an encoding method and an encoding apparatus that can obtain good image quality on the decoding side even in flat areas where image quality deterioration is noticeable.

[0058] Still another object of the present invention is to provide a coding method and method that can apply weighting to the transform coefficients of each subband block in accordance with the frequency characteristics and perform effective information compression. An object of the present invention is to provide an encoding device.

Still another object of the present invention is to provide an encoding method and an encoding apparatus that can reduce image quality deterioration and reduce the encoding rate.

[0060] Still another object of the present invention is to provide a band division/synthesis method that allows accurate restoration even at the end points of an image.

[0061]

[Means for Solving the Problems] The encoding method according to the first invention of the present application divides a digital image signal into subbands,
In a method of applying orthogonal transformation of two or more dimensions to each divided subband and scanning and encoding the obtained transform coefficients in one dimension, the position of the transform coefficient at which one-dimensional scanning starts for each subband. It is characterized by changing.

[0062] The encoding method according to the second invention of the present application is a method of dividing a digital image signal into subbands, configuring each divided band component into blocks, and performing encoding.
It is characterized in that a part of each divided component is thinned out and encoded at a constant cycle.

[0063] The encoding method according to the third invention of the present application is a method of dividing a digital image signal into subbands, configuring each divided band component into blocks, and performing encoding.
It is characterized in that it is determined whether or not the block is a valid image block based on the activity of the block, and only the valid image block is encoded.

The encoding method according to the fourth invention of the present application is a method of dividing a digital image signal into subbands, applying orthogonal transformation to each divided band component, and quantizing and encoding the transform coefficients. The method is characterized in that the quantization step width is determined based on the pixel values of the high-band block before conversion.

[0065] In the encoding method according to the fifth invention of the present application, for an interlaced scanning digital image signal, one of the odd and even fields is passed through a vertical filter with odd taps, and the other field is passed through a vertical filter with even taps. , a two-dimensional block is formed within the field, a three-dimensional block is formed by combining the odd and even fields in the time direction, and a three-dimensional orthogonal transformation is performed on the three-dimensional block for encoding.

[0066] The encoding method according to the sixth invention of the present application is a method of dividing a digital image signal into subbands, applying orthogonal transformation to each divided band component, and applying weighting to the transformation coefficients for encoding. , is characterized in that weighting is applied to each subband so that it is continuous in the frequency direction.

[0067] The band division/synthesis method according to the seventh invention of the present application is such that when subband division/synthesis is performed using a filter with an even number of taps, at the time of division, the folded image is connected to the end point of the image, and then the filtering is performed. When compositing, connect the folded image to the end point of the image before passing it through the low-pass filter, and multiply the folded image by -1 to each pixel value folded to the end point of the image before passing it through the high-pass filter. It is characterized by connecting.

[0068] The band division/synthesis method according to the eighth invention of the present application is such that when performing subband division/synthesis using a filter with an odd number of taps, folding back to the end points of an image is performed before filtering at the time of division and at the time of synthesis. The feature is that the images obtained by reducing one pixel from the original images are connected.

[0069] The encoding device according to the ninth invention of the present application divides a digital image signal into subbands, blocks the divided image signal into blocks, performs orthogonal transformation on each block, and encodes the obtained transform coefficients. It is characterized by being configured to do so.

The encoding device according to the tenth aspect of the present invention is characterized in that it includes a circuit for determining whether or not an image block is a valid image block based on activity, and is configured to encode only valid image blocks.

The encoding device according to the eleventh aspect of the present invention is characterized in that it includes means for dividing the image signal of each subband into blocks in the time direction.

The encoding device according to the twelfth aspect of the present invention is characterized by comprising means for blocking image signals of each subband into three-dimensional blocks, and means for performing three-dimensional orthogonal transformation.

[0073] The encoding device according to the thirteenth invention of the present application includes an odd-tap vertical filter that passes one of an odd field and an even field, and an even-tap vertical filter that passes the other field. The present invention is characterized in that it is configured to perform high-efficiency encoding processing by folding the output.

A coding device according to a fourteenth invention of the present application is characterized in that, in addition to the components of the ninth invention, it includes means for weighting transform coefficients appropriately for each subband.

The encoding device according to the fifteenth invention of the present application is characterized in that, in the fourteenth invention, weighting is performed continuously in the frequency direction.

[0076] The encoding device according to the sixteenth invention of the present application is characterized in that the encoding means in the ninth invention is a variable length encoding means.

The encoding device according to the seventeenth invention of the present application is characterized in that the encoding means in the fourteenth invention is a variable length encoding means.

[0078] An encoding/decoding device according to an eighteenth invention of the present application is characterized in that it includes a decoding system component in addition to the constituent members of the ninth invention.

[0079]

[Operation] In the first invention, when each band component of a digital image signal divided into a plurality of frequency bands is subjected to a two-dimensional or more orthogonal transform and encoded, a transformation that generates the largest power for each band is performed. One-dimensional scanning starts from the coefficient. This reduces the amount of code.

In the second aspect of the invention, among the band components of a digital image signal divided into a plurality of frequency bands, components whose image quality is not significantly degraded are periodically thinned out. In this way, the encoding rate is reduced while minimizing image quality deterioration.

[0081] In the third and tenth aspects of the invention, among the band components of the digital image signal divided into a plurality of frequency bands, image blocks in which image quality deterioration is not noticeable are thinned out. In this way, deterioration in image quality can be kept to a minimum and the encoding rate can be reduced.

[0082] In the fourth invention, orthogonal transformation is applied to each band block of a digital image signal divided and divided according to frequency, and the obtained transformation is performed based on the pixel values of the high band blocks before conversion. Determine the quantization step width when quantizing coefficients. Based on each pixel value within a block, it is determined whether this block contains a flat part where image quality deterioration is noticeable or a part with rapid changes, and if the block does not contain a flat part, quantum Select a quantization table with a wide quantization step width, and select a quantization table with a narrow quantization step width for blocks that include flat areas and areas with large changes, and avoid flat areas. A quantization table with a medium quantization step width is selected for a block that does not include a portion where the quantization step width is large. In this way, good image quality is maintained even in flat areas in the restored image.

In the fifth and thirteenth inventions, one of the odd and even fields is passed through a vertical filter with odd taps and the other is passed through a vertical filter with even taps, and these are combined to form a three-dimensional block. Then, the spatial sampling positions of both fields are aligned, and the signal structure in the time axis direction of the interlaced scanning digital image signal becomes accurate, and the compression rate of the signal becomes high.

[0084] In the sixth, fourteenth, and fifteenth inventions, for the transform coefficients obtained by orthogonally transforming a digital image signal divided into subbands and blocked according to frequency, Waiting will be applied. Moreover, in the sixth and fifteenth inventions, this weighting smoothly connects between each band.

[0085] In the seventh and eighth inventions, when dividing, folded images are connected for image filtering, but the connected portions that are not transmitted are reproduced during composition. Therefore, the original image is correctly restored even at the end points of the image.

In all inventions except the fifth and thirteenth inventions, a digital image signal is divided into subbands, and each subband is divided into blocks. Therefore, compression encoding can be performed to a higher degree than when subband division is not performed.

[0087]

[Examples] Examples of the present invention will be explained in detail below.

FIGS. 17 and 18 are block diagrams showing the configuration of an example of an encoding device according to the present invention. FIG. 17 shows the configuration on the code side, and FIG. 18 shows the configuration on the decoding side. Figure 1
7, 1 is an input terminal for the NTSC color television signal, and the NTSC decoder 2 receives the luminance signal (Y signal) and color signal (I, Q signal) of this color television signal.
signals). The separated Y, I, and Q signals are output to the matrix circuit 3, and the matrix circuit 3 converts these signals into a luminance signal (Y signal) and a color difference signal (R-Y,
B-Y signal) and output these signals to the A/D converter 4. The A/D converter 4 has Y, R-Y, B-Y
The signals are converted into digital signals and outputted to the subband division circuit 5. The subband division circuit 5 has Y, R
-Y and BY signals are each band-divided into four subbands according to the frequency, each subband is divided into blocks, and the blocks are output to the three-dimensional orthogonal transform circuit 6. The three-dimensional orthogonal transform circuit 6 performs discrete cosine transform (Dis
create Cosine Transform: DCT
) to obtain the transform coefficients, and the obtained transform coefficients are sent to the encoder 7.
Output to. The encoder 7 quantizes and encodes the input transform coefficients, and outputs the encoded data via the output terminal 8.

In FIG. 18, reference numerals 11 to 18 indicate constituent members on the decoder side. Reference numeral 11 denotes an input terminal into which data encoded as described above is input, and a decoder 12 connected to the input terminal 11 restores the encoded data into three-dimensional data and converts it into three-dimensional data. Dimensional inverse orthogonal transform circuit 13
Output to. The three-dimensional inverse orthogonal transform circuit 13 performs inverse DCT on the three-dimensional data. The subband synthesis circuit 14 synthesizes the inversely transformed three-dimensional data of each band, returns it to the original field image, and outputs digital Y, R-Y, BY signals to the D/A converter 15. . The D/A converter 15 is
These signals are converted into analog signals and output to the matrix circuit 16. The matrix circuit 16 converts the analog Y, R-Y, B-Y signals into Y, I, Q signals and outputs them to the NTSC encoder 17. The NTSC encoder 17 converts these Y, I, and Q signals into NTSC color television signals and outputs them via the output terminal 18.

FIG. 19 is a block diagram showing the internal configuration of subband division circuit 5. As shown in FIG. In the figure, 21, 22, and 23 are input terminals for the Y signal, RY signal, and BY signal output from the A/D converter 4, respectively. Input terminals 21, 2
2 and 23, Y signal subband division circuits 24 and R
-Y signal subband division circuit 25 and BY signal subband division circuit 26 are connected, respectively. The internal configurations of these dividing circuits 24, 25, and 26 are all the same, and FIG. 19 only shows the internal configuration of the Y signal subband dividing circuit 24. The Y signal subband division circuit 24 includes a vertical low pass filter (vertical LPF) 241
and a vertical high-pass filter (vertical HPF) 242
and a vertical 2:1 subsampling circuit 243a that samples the outputs from the vertical LPF 241 and the vertical HPF 242 so that the number of pixels in the vertical direction is halved.
243b and horizontal low pass filter (horizontal LPF)
244a, 244b, horizontal high pass filters (horizontal HPF) 245a, 245b, and horizontal LPF 24
4a, horizontal HPF 245a, horizontal LPF 244
b, Horizontal 2: sampling the output from the horizontal HPF 245b so that the number of pixels in the horizontal direction is 1/2;
1 sub-sampling circuit 246a, 246b, 24
6c, 246d. Each division circuit 2
4, 25, and 26 are stored in the memory 27.

FIG. 20 is a block diagram showing the internal configuration of subband synthesis circuit 14. 32 in the figure is the input terminal 3
3 outputted from the three-dimensional inverse orthogonal transform circuit 13 via 1
This is a memory that stores dimensional data. In the memory 32,
Y signal subband synthesis circuit 33, R-Y signal subband synthesis circuit 34, B-Y signal subband synthesis circuit 35
are connected to each other. Each of these combining circuits 33,
34 and 35 have the same internal configuration, and FIG. 20 only shows the internal configuration of the Y signal subband synthesis circuit 33. The Y signal subband synthesis circuit 33 includes horizontal 1:2 interpolation circuits 332a, 332b, and 332c that double the number of pixels in the horizontal direction by interpolating 0 as a value.
, 332d, horizontal LPFs 333a, 333b, horizontal HPFs 334a, 334b, and subtractor 335a.
, 335b, and a vertical 1:2 interpolation circuit 336a that doubles the number of pixels in the vertical direction by interpolating 0 as a value.
, 336b, vertical LPF 337, and vertical HPF
338 and a subtracter 339. From each synthesis circuit 33, 34, 35, Y signal, R-Y
The signal and the BY signal are output to the D/A converter 15, respectively.

Next, the operation will be explained.

Generally, when compressing an image signal, luminance signals and color signals are often handled independently. Therefore, the NTSC color television signal input from the input terminal 1 is separated into the Y signal and the I, Q signals by the NTSC decoder 2, and then the Y signal and the R-Y, B-signal are separated by the matrix circuit 3.
After converting it into a Y signal, the A/D converter 4 converts it into a digital signal. The sampling frequency at this time is 13.5 MHz for the Y signal and 6.75 MHz for the R-Y and B-Y signals.
It is MHz. Therefore, in the case of an NTSC color television signal, the effective number of samples for one horizontal line is, for example, Y
The signal is 704, the RY and BY signals are each 352, and 262.5 horizontal lines constitute one field. Of these, for example, 240 lines are output as one field as valid lines. The subband division circuit 5 divides each field of the Y signal, RY signal, and BY signal into a plurality of frequency bands. For example, Y
The signal is divided into four frequency bands, LL, HL, LH, and HH, as shown in Figure 21, and the R-Y signal and BY signal are divided into four frequency bands, LL, HL, LH, and HH, as shown in Figure 22. Divide into.

FIG. 19 shows the operation of this subband division circuit 5.
Explain according to the following. The Y signal input from the input terminal 21 is divided into four bands by the Y signal subband division circuit 24. After the input Y signal is band-limited in the vertical LPF 241 having frequency characteristics as shown in FIG. 23, the number of pixels in the vertical direction is thinned out to 1/2 in the vertical 2:1 subsampling circuit 243a. The output of the vertical 2:1 subsampling circuit 243a is shown in FIG.
The signal is passed through a horizontal LPF 244a having a frequency characteristic as follows, and the number of pixels in the horizontal direction is thinned out by half in a horizontal 2:1 subsampling circuit 246a. This horizontal 2
The output of the :1 subsampling circuit 246a is a signal in the LL band in FIG. 21, and the number of pixels is 1/4 of the input signal. This signal is called the LL band of the Y signal. On the other hand, the output of the vertical 2:1 subsampling circuit 243a is a horizontal HPF 245 having frequency characteristics as shown in FIG.
A is also input to the horizontal 2:1 subsampling circuit 24
6b, the number of pixels in the horizontal direction is thinned out to 1/2. The output of this horizontal 2:1 subsampling circuit 246b is a signal in the HL band of FIG. 21, and the number of pixels is 1/4 of the input signal. This signal is called the HL band of the Y signal.

By the way, Y input from the input terminal 21
The signal is a vertical HPF 2 with frequency characteristics as shown in Figure 24.
42 is also input. The output of this vertical HPF 242 is thinned out to 1/2 in the number of pixels in the vertical direction by a vertical 2:1 subsampling circuit 243b. Vertical 2:1
The output of the sub-sampling circuit 243b is band-limited in a horizontal LPF 244b having frequency characteristics as shown in FIG.
In c, the number of pixels in the horizontal direction is thinned out to 1/2. The output of this horizontal 2:1 subsampling circuit 246c is a signal in the LH band of FIG. 21, and the number of pixels is 1/4 of the input signal. This signal is called the LH band of the Y signal. On the other hand, the vertical 2:1 subsampling circuit 243
The output of b is a horizontal HP with frequency characteristics as shown in Figure 26.
It is also input to F 245b, and the number of pixels in the horizontal direction is thinned out to 1/2 in a horizontal 2:1 subsampling circuit 246d. This horizontal 2:1 subsampling circuit 24
The output of 6d is a signal in the HH band in FIG. 21, and the number of pixels is 1/4 of the input signal. This signal is called the HH band of the Y signal.

In this way, the Y signal subband division circuit 2
4, the Y signal has four bands LL, HL, L
It is divided into H and HH, and each subband component is output.

The R-Y signal input from the input terminal 22 is divided into four bands LL, HL, LH, HH as shown in FIG. 22 in the R-Y signal subband dividing circuit 25.
divided into Also, B- input from the input terminal 23
The Y signal is processed by the B-Y signal subband division circuit 26.
Four bands LL, HL, L as shown in Figure 22
It is divided into H and HH. These R-Y signal subband division circuit 25 and B-Y signal subband division circuit 26
The operation is similar to that of the Y signal subband division circuit 24.

LL band, HL band, LH band, HH band of the Y signal output from the Y signal subband division circuit 24; LL band of the RY signal output from the RY signal subband division circuit 25; HL band,
LH band, HH band, and LL band of the BY signal output from the BY signal subband division circuit 26;
The HL band, LH band, and HH band are input to the memory 27, and 8 fields are stored. The memory 27 outputs each band into three-dimensional blocks each consisting of a plurality of adjacent pixels until the next eight fields are accumulated. For example, in 8 adjacent lines, adjacent pixels of 8 pixels per line are considered as a 2D block, and adjacent 2D blocks of 8 consecutive fields are grouped together to form a 3D block with a size of 8 pixels x 8 lines x 8 fields. Configure. The three-dimensionally blocked Y signal, RY signal, and BY signal are output from the memory 27 in the order of LL band, HL band, LH band, and HH band.

Each block output from the subband division circuit 5 is subjected to three-dimensional DCT by a three-dimensional orthogonal transform circuit 6.
will be applied. The transform coefficients output from this three-dimensional orthogonal transform circuit 6 are encoded by an encoder 7 and one-dimensionally scanned, and for each non-zero value, the value and the sequence of zero values up to that value are calculated. The length is variable-length coded using a two-dimensional Huffman code, etc., and output from the output terminal 8. For this variable length code, a different variable length code table may be used for each band, or the same variable length code table may be used.

[0100] After performing three-dimensional DCT on each block of four bands (one block is 8 pixels x 8 lines x 8 fields) of the Y signal of a certain natural moving image, it is quantized to 10 bits, and each transform The root mean square (RMS) of the coefficient d(i, j, k) was determined. With reference to this RMS result, the difference in the one-dimensional scanning start position in each subband block will be explained.

Tables 2 and 3 show the RMS of the transform coefficients in the LL band of the Y signal.

[0102]

[Table 2]

[0103]

[Table 3]

From the results in Tables 2 and 3, in the LL band, 2
Looking at blocks in the dimensional plane, (i, j) = (0,
Power is concentrated around 0). Therefore, in the LL band, as shown in FIG. 27(a), one-dimensional scanning from the transform coefficients in the horizontal and vertical low-order sequences to the transform coefficients in the high-order sequence is suitable. For a three-dimensional block, such scanning for a two-dimensional block is repeated eight times.

Tables 4 and 5 show the RMS of the conversion coefficients of the Y signal in the HL band.

[0106]

[Table 4]

[0107]

[Table 5]

From the results in Tables 4 and 5, in the HL band, 2
Looking at the blocks in the dimensional plane, (i, j) = (7,0
) Electric power is concentrated around the area. This is because the signal is sampled at a ratio of 2:1 after passing through the HPF 245a having frequency characteristics as shown in FIG. H.L.
As shown in Fig. 28, the band is a horizontally folded signal, for example, a 6.75 MHz signal is 0 M
It becomes a Hz signal. As a result, the power of the transform coefficients after DCT should originally be concentrated in the low-order sequence, but in this case, since the signal is folded back in the horizontal direction, the power is concentrated in the high-order sequence only in the horizontal direction. do. Therefore, in the HL band, as shown in FIG. 27(b), the horizontal direction is a high-order sequence and the vertical direction is a low-order sequence. Scanning is suitable.

Tables 6 and 7 show the RMS of the conversion coefficients in the LH band of the Y signal.

[0110]

[Table 6]

[0111]

[Table 7]

[0112] From the results in Tables 6 and 7, in the LH band, 2
Looking at the blocks in the dimensional plane, (i, j) = (0, 7
) Electric power is concentrated around the area. This is because the LH band is a signal folded back in the vertical direction. Therefore, in the LH band, as shown in FIG. 27(c), the horizontal direction is a low-order sequence and the vertical direction is a high-order sequence. Scanning is suitable.

Tables 8 and 9 show the RMS of the conversion coefficients in the HH band of the Y signal.

[0114]

[Table 8]

[0115]

[Table 9]

From the results in Tables 8 and 9, in the HH band, 2
Looking at the blocks in the dimensional plane, (i, j) = (7, 7
) Electric power is concentrated around the area. Therefore, in the HH band, as shown in FIG. 27(d), one-dimensional scanning is performed from a transform coefficient with a high-order sequence in both the horizontal and vertical directions to a transform coefficient with a low-order sequence in both the horizontal and vertical directions. Are suitable.

Next, the operation on the decoding side will be explained.

The decoding side from input terminal 11 to output terminal 18 follows a completely opposite process to the code side from input terminal 1 to output terminal 8. The data input from the input terminal 11 is returned to the original three-dimensional data form in the decoder 12, and subjected to inverse DCT transformation in the three-dimensional inverse orthogonal transform circuit 13. The three-dimensional block subjected to inverse orthogonal transformation is synthesized into four subbands in a subband synthesis circuit 14 and outputted one field at a time.

The operation of subband synthesis circuit 14 is completely opposite to that of subband division circuit 5. Eight fields of three-dimensional blocks input from the input terminal 31 are stored in the memory 32. The memory 32 stores LL, HL, LH, and Y signals of the Y signal until the next eight fields are stored.
The HH band is sent to the Y signal subband synthesis circuit 33, and the R-Y
The LL, HL, LH, and HH bands of the signal are sent to the R-Y signal subband synthesis circuit 34, and the LL, H bands of the B-Y signal are
The L, LH, and HH bands are each input to the BY signal subband synthesis circuit 35 one field at a time.

The operation of the Y signal subband synthesis circuit 33 will now be explained. The LL band of the Y signal output from the memory 32 is interpolated with 0 in the horizontal 1:2 interpolation circuit 332a, so that the number of pixels in the horizontal direction is reduced to 2.
After doubling, a horizontal LP with frequency characteristics as shown in Figure 25 is obtained.
F 333a. Further, the HL band of the Y signal output from the memory 32 is processed by the horizontal 1:2 interpolation circuit 33.
2b, the signal is subjected to 0 interpolation and then input to a horizontal HPF 334a having frequency characteristics as shown in FIG. The subtracter 335a converts the horizontal HPF from the output of the horizontal LPF 333a.
The output of 334a is subtracted. The output of the subtracter 335a is outputted as shown in FIG. 23 after the number of pixels in the vertical direction is doubled by interpolating 0 in the vertical 1:2 interpolation circuit 336a.
The signal is input to a vertical LPF 337 having a frequency characteristic as follows. On the other hand, the LH of the Y signal output from the memory 32
The band is interpolated with 0 in a horizontal 1:2 interpolation circuit 332c to double the number of pixels in the horizontal direction, and then input to a horizontal LPF 333b having frequency characteristics as shown in FIG. Furthermore, the HH band of the Y signal output from the memory 32 is processed by the horizontal 1:2 interpolation circuit 332d.
After being subjected to 0 interpolation, the signal is input to a horizontal HPF 334b having frequency characteristics as shown in FIG. Subtractor 335b subtracts the output of horizontal HPF 334b from the output of horizontal LPF 333b. The output of the subtracter 335b is interpolated with 0 in a vertical 1:2 interpolation circuit 336b, thereby doubling the number of pixels in the vertical direction, and then input to a vertical HPF 338 having frequency characteristics as shown in FIG. Ru. The subtracter 339 calculates the vertical HP from the output of the vertical LPF 337.
The output of F 338 is subtracted and output. In addition, R-Y
The operations of the signal subband synthesis circuit 34 and the BY signal subband synthesis circuit 35 are similar to the operations of the Y signal subband synthesis circuit 33 described above.

As described above, subband synthesis circuit 1
The Y signal, R-Y signal, and B-Y signal output from 4 are converted into analog signals in a D/A converter 15, and further converted into Y signals, I signals, and Q signals in a matrix circuit 16. , NTSC encoder 17
, it becomes an NTSC color television signal,
It is output from the output terminal 18.

In the above embodiment, a so-called "zigzag scan" was shown as shown in FIG. 27, but the one-dimensional scan of the encoder 7 has a low From the transform coefficients that are the next sequence, from the transform coefficients that are the horizontal high-order sequence and the vertical low-order sequence for the HL band, to the horizontal low-order sequence and the vertical high-order sequence for the LH band. It is important to start one-dimensional scanning from the transform coefficients, which have a high-order sequence both horizontally and vertically for the HH band. Therefore, for example, H
Vertical one-dimensional scanning may be performed as shown in FIG. 29(a) for the L band and FIG. 29(b) for the HH band.

Furthermore, in the above embodiment, scanning of a two-dimensional block of size 8×8 as shown in FIG.
By repeating this process several times, scanning of a three-dimensional block of size 8x8x8 was obtained. That is, in the case of the LL band, scanning was performed as shown in FIG. 30(a). but,
For moving images, scanning in the time direction may be performed first as shown in FIG. 30(b).

Next, another embodiment of the present invention will be described. This embodiment is an example in which components of a certain subband after subband division are thinned out without orthogonal transformation.

Each block output from the subband division circuit 5 is orthogonally transformed in the three-dimensional orthogonal transform circuit 6, but as for the Y signal, as shown in FIG.
Only the HL band and LH band are orthogonally transformed, and the R-
Regarding the Y signal and the BY signal, only the LL band is orthogonally transformed as shown in FIG. The transform coefficients that have been orthogonally transformed in this way and are output from the three-dimensional orthogonal transform circuit 6 are encoded by the encoder 7, and then one-dimensionally scanned to calculate the value for each non-zero value. A predefined Huffman code indicating the value and a Huffman code indicating the length of the sequence of zero values up to that value are output from the output terminal 8.

[0126] Here, an example in which encoding and decoding are performed using a certain sample image will be explained. LL band obtained by dividing the sample image into four horizontally and vertically,
The HL band, LH band, and HH band are each configured into three-dimensional blocks of 8 pixels x 8 lines x 8 fields,
After performing three-dimensional orthogonal transformation and quantization, three-dimensional inverse orthogonal transformation and subband synthesis are performed to restore the original image. Table 10 shows the results of encoding four frames of such sample images. Note that the S/N ratio is calculated using the following equation (6).

[0127]

[Table 10]

[0128]

[Math. 12]

In method 1, the image divided into subbands is divided into 3
After performing dimensional orthogonal transformation and multiplying the obtained transformation coefficients by appropriate weights (1 to 0.4) according to the frequency band, one-dimensional scanning was performed and Huffman encoding was performed. Method 2 is an embodiment of the present invention, in which the HH band of the Y signal, the RY signal and the B-Y
The HL band, LH band, and HH band of the signal were thinned out and encoded. Looking at each band, most of the main components are concentrated in the LL band, and the energy decreases in the LH band, HL band, and HH band in this order. In method 2, which is the present invention,
The total bit rate is reduced by more than 10% compared to method 1, and in particular, the total bit rate is reduced by nearly 40% for the RY signal and the BY signal. In method 2, the S/N ratio is degraded by about 1 to 2 dB compared to method 1, but the deterioration of the reproduced image is hardly visible to the naked eye.

[0130] In the above embodiment, in each field, the HH band of the Y signal, the R-Y signal, and the B-Y
Although an example has been described in which the LH band, HL band, and HH band of the signal are thinned out, each band may be thinned out at a constant cycle as shown in FIG. 33. FIG. 33 shows an example in which each band of the Y signal is thinned out at an 8-field period, and the LH band and H
The L band and the HH bands of the 3rd, 4th, 5th, 6th, 7th, and 8th fields are thinned out. Since the eye's sensitivity to videos decreases, it is difficult to notice the deterioration even if the high-frequency components are periodically thinned out. Since all components are encoded in the first and second fields, the still image of this frame has sufficient resolution and S/N ratio.

Next, still another embodiment of the present invention will be described. In this embodiment, it is determined whether or not the image block is a valid image block, and only the valid image block is encoded.

FIG. 34 is a block diagram showing the internal configuration of the three-dimensional orthogonal transform circuit 6. As shown in FIG. The three-dimensional orthogonal transformation circuit 6 is
An orthogonal transform circuit 42 performs DCT on each block output from the subband dividing circuit 5 via an input terminal 41 to obtain transform coefficients, and determines whether the block is valid based on the magnitude of the image signal in each block. A determination value calculation circuit 43 that calculates a determination value A for determining whether or not an image block is an image block, and a determination reference value table serving as a memory that stores a determination reference value B for determining a valid image block. 45, a determination value A from the determination value calculation circuit 43, and a determination reference value B from the determination reference value table 45, and determines whether or not the image block is a valid image block.
It is composed of. The obtained transform coefficients are outputted to the encoder 7 via the output terminal 46, and the obtained determination results are outputted to the encoder 7 via the output terminal 47.

Each block output from the subband division circuit 5 is subjected to three-dimensional DCT by the three-dimensional orthogonal transform circuit 6.
will be applied. The operation of this three-dimensional orthogonal transform circuit 6 will be explained next with reference to FIG.

[0134] Y signal input from input terminal 41, R-
Each block of the Y signal and B-Y signal is processed by an orthogonal transform circuit 4.
2, the transform coefficients are output to the encoder 7 via the output terminal 46 and are also input to the judgment value calculation circuit 43. The judgment value calculation circuit 43 calculates a judgment value A for judging whether or not the image block is a valid image block based on the variance value of the image signal in each block of the Y signal, the RY signal, and the BY signal. calculate. Assuming that the variance value in each block is σAC2, the judgment value calculation circuit 43 calculates A expressed by the following formula as a judgment value, and outputs the judgment value A to the judgment unit 44. A=σAC2/512 Here, the variance value σAC2 is determined by the following formula.

[0135]

[Math. 13]

[0136] Judgment reference values B corresponding to each of the Y signal, RY signal, and BY signal for determining whether or not the image block is a valid image block are stored in a judgment reference value table 45 which is a memory. and is output to the determiner 44 as necessary. The determiner 44 compares the determination value A output from the determination value calculation circuit 43 and the determination reference value B output from the determination reference value table 45, and if A≧B, this block is a valid image block. On the other hand, if A<B, it is determined that this block is not a valid image block. Then, the determiner 44 outputs the determination result obtained in this way to the encoder 7 via the output terminal 47.

[0137] Based on this determination result, the encoder 7
The three-dimensional DCT coefficients are quantized and encoded. If the three-dimensional orthogonal transform circuit 6 determines that this block is a valid image block, the encoder 7 outputs block information indicating that this block is a valid image block, and also calculates the three-dimensional DCT coefficients of this block. Quantize and encode as is. If the three-dimensional orthogonal transform circuit 6 determines that the block is not a valid image block, the encoder 7 determines whether the block is a block in the LL band of the Y signal, R-Y signal, or B-Y signal. Block information indicating that the image block is not a valid image block is output, and only the DC component of the three-dimensional DCT coefficient is quantized and encoded. Also, if the block is Y signal, RY signal or B-Y signal
If the block is in the HL band, LH band, or HH band of the signal, the encoder 7 outputs only block information indicating that this block is not a valid image block;
Dimensional DCT Coefficients are not quantized.

[0138] Here, an example in which encoding and decoding are performed using a certain sample image will be explained. LL band obtained by dividing the sample image into four horizontally and vertically,
The HL band, LH band, and HH band are each configured into three-dimensional blocks of 8 pixels x 8 lines x 8 fields,
After performing three-dimensional orthogonal transformation and quantization, three-dimensional inverse orthogonal transformation and subband synthesis are performed to restore the original image. Table 11 shows the results of encoding four frames of such sample images. Note that the S/N ratio is calculated using equation (6) above.

[0139]

[Table 11]

Method 1 is a conventional method of encoding without determining valid image blocks. Method 2 is an embodiment of the present invention, in which a valid image block is determined, and if it is not a valid image block, all transform coefficients except the DC component of the LL band are not encoded. Note that the determination reference value B used for determining a valid image block is determined by LL of the Y signal.
, 0 for the LH band, 0.2 for the HL and HH bands, and 0 and 0 for the LL band of the RY signal and the BY signal.
It was set to 0.2 for the H, HL, and HH bands.

From the results in Table 11, method 2, which is the present invention,
It can be seen that the total bit rate is reduced by about 17% compared to method 1. In method 2, compared to method 1, S
The /N ratio has deteriorated by about 2 to 3 dB, but this does not pose a problem because the deterioration of the reproduced image can hardly be visually confirmed.

[0142] In the above-described embodiment, whether or not an image block is a valid image block is determined based on the variance value σAC2 of each block, but whether or not it is a valid image block is determined based on the maximum value or dynamic range of each block. It is also conceivable to make such a determination. In addition, for blocks that are not valid image blocks, components other than the DC component of the LL band were not encoded, but other LH, HL, and H
For the H band as well, only the DC component may be encoded.

Next, still another embodiment of the present invention will be described. 35 and 36 are block diagrams showing the configurations of the code side and decoding side in this embodiment. In FIG. 35 showing the code side, 90 is an input terminal for an image signal, and 50 is an analog/digital converter (hereinafter referred to as an A/D converter). The subband division circuit 51 divides the digitized image signal into four bands according to the frequency.
It is output to the blocking circuit 52. The blocking circuit 52 configures the signals of each band output from the subband dividing circuit 51 into blocks of 8 pixels x 8 lines x 8 fields, and outputs the blocks to the orthogonal transform circuit 53 and the determination circuit 58 in order. The orthogonal transform circuit 53 performs orthogonal transform on each block output from the blocking circuit 52 and outputs the obtained transform coefficients to the quantization circuit 56. The quantization circuit 56 has a plurality of quantization tables with different quantization step widths. Further, the determination circuit 58 selects an optimal quantization table using the block of high frequency components output from the blocking circuit 52 and outputs the selected quantization table to the quantization circuit 56. The quantization circuit 56 quantizes the transform coefficients output from the orthogonal transform circuit 53 according to the quantization table selected by the determination circuit 58, and outputs the quantized transform coefficients to the encoding circuit 57. The encoding circuit 57 encodes the output of the quantization circuit 56.

In FIG. 36 showing the decoding side, 91 is an input terminal for data encoded as described above. The decoding circuit 61 connected to the input terminal 91 is connected to the encoding circuit 57
The decoded data is inversely transformed and the decoded data is output to the inverse quantization circuit 62. The dequantization circuit 62 expands the output of the decoding circuit 61 according to the quantization table, and outputs the dequantized transform coefficient to the inverse orthogonal transform circuit 63. Inverse orthogonal transform circuit 63
performs inverse orthogonal transformation on the output of the inverse quantization circuit 62 and outputs the data after the inverse orthogonal transformation to the memory 64. memory 64
stores the output of the inverse orthogonal transform circuit 63 for eight fields. A subband synthesis circuit 65 synthesizes each component output from the memory 64 and outputs the synthesized data to a digital/analog converter (hereinafter referred to as a D/A converter) 66. D/A converter 66 converts the digital image signal output from subband synthesis circuit 65 into an analog signal.

FIG. 37 shows an example of the configuration of the subband division circuit 51. The subband division circuit 51 includes a horizontal LPF 511 and a horizontal HPF 512 that pass the digital image signal output from the A/D converter 50, and a horizontal 2:1 subsampling circuit 513a that thins out the number of pixels in the horizontal direction to 1/2. , 513b and a vertical LPF 514a,
514b, vertical HPF 515a, 515b,
Vertical 2:1 subsampling circuits 516a, 516b, 516c, 516 that thin out the number of pixels in the vertical direction to 1/2
d.

FIG. 38 shows an example of the configuration of the subband synthesis circuit 65. The subband synthesis circuit 65 doubles the number of pixels in the vertical direction by interpolating 0s.
:2 interpolation circuits 651a, 651b, 651c, 651d
, vertical LPF 652a, 652b, and vertical HP
F 653a, 653b and adders 654a, 654
b, horizontal 1:2 interpolation circuits 655a and 655b that double the number of pixels in the horizontal direction by interpolating 0, a horizontal LPF 656, a horizontal HPF 657,
The adder 658 is also provided.

Next, the operation will be explained. Input terminal 90
The analog image signal input from the A/D converter 5
0, it is converted into a digital signal. The sampling frequency at this time is, for example, 13.5 MHz if the input signal is a luminance signal, and 6.75 MHz if the input signal is a color difference signal.
It is. Therefore, the effective number of samples for one horizontal line is
For example, the luminance signal is 704 lines, the color difference signal is 352 lines, and 262.5 lines constitute one field. Among these, for example, 240 lines are output as one field as valid lines. Subband division circuit 5
1 divides each field of the digital image signal output from the A/D converter 50 into a plurality of frequency bands. For example, the sampling frequency is 13.5MH
In the case of z, it is divided into four frequency bands: LL, LH, HL, and HH as shown in FIG.

FIG. 3 shows the operation of this subband division circuit 51.
7 will be explained. The input digital image signal is passed through a horizontal LPF 511 having frequency characteristics as shown in FIG.
After the band is limited in the horizontal 2:1 subsampling circuit 513a, the number of pixels in the horizontal direction is reduced to 1/2.
are thinned out. The digital image signal is also input to a horizontal HPF 512 having frequency characteristics as shown in FIG. The output of the horizontal HPF 512 is thinned out to 1/2 the number of pixels in the horizontal direction by a horizontal 2:1 subsampling circuit 513b. The outputs of the horizontal 2:1 subsampling circuits 513a and 513b are vertical LPFs 514a and 514b having frequency characteristics as shown in FIG. 23, respectively.
After the band is limited in the vertical 2:1 subsampling circuits 516a and 516c, the number of pixels in the vertical direction is thinned out to 1/2. On the other hand, horizontal 2:1 subsampling circuits 513a, 51
The outputs of 3b are also input to vertical HPFs 515a and 515b, each having a frequency characteristic as shown in FIG. /2 will be thinned out. Here, the output of the vertical 2:1 subsampling circuit 516a is the LL band in FIG.
The output of the vertical 2:1 subsampling circuit 516b is shown in FIG.
1, and the output of the vertical 2:1 subsampling circuit 516c is the HL band in FIG.
:1 The output of the sub-sampling circuit 516d is H in FIG.
This is the H band.

The four outputs of the subband division circuit 51 are each configured into blocks of 8 pixels x 8 lines x 8 fields in the blocking circuit 52, and blocks of four components corresponding to the same position are successively output. be done. These blocks are input to an orthogonal transformation circuit 53 and subjected to orthogonal transformation. As an orthogonal transformation, for example, three-dimensional DC
Use T.

On the other hand, among the four component blocks output from the blocking circuit 52, the LH band and HL band are input to the determination circuit 58. The determination circuit 58
Detects whether there is a flat part or a part with rapid changes at the corresponding position on the screen from the pixel values of the blocks of the band and HL band, and quantizes the blocks of four components corresponding to the same position accordingly. Decide on the table.

An example of the configuration of the determination circuit 58 is shown in FIG. In the figure, 92 is the 4 output from the blocking circuit 52.
This is an input terminal for inputting the LH band and HL band blocks among the two components. The determination circuit 58 includes a subblocking circuit 581 that further divides each input block into a plurality of subblocks, and a subblocking circuit 58.
1, an arithmetic unit 582 that calculates the maximum absolute value of pixel values for each sub-block output from the arithmetic unit 582;
Minimum value detector 58 for finding the minimum value of the values output from
3, a maximum value detector 584 that calculates the maximum value of the values output from the arithmetic unit 582, and predetermined values α and β, respectively.
, γ, δ constant generators 585a, 585b
, 585c, 585d and constant generators 585a, 58
a switch 586a that selects and outputs the output of 5b;
A switch 586b selects and outputs the output of the constant generators 585c and 585d, a comparator 587a compares the output of the minimum value detector 583 and the output of the switch 586a, and the output of the maximum value detector 584 and the output of the switch 586b. A comparator 587b for comparing , and comparators 587a and 58
A control signal generator 588 determines a quantization table in the quantization circuit 56 according to the output of the quantization circuit 58.

Next, the operation will be explained. Blocks of the LH band and the HL band are sequentially input from the blocking circuit 52 to the input terminal 92 . Each input block is divided into four pixels in each two-dimensional plane by the sub-blocking circuit 581 as shown in FIG.
It is divided into 32 sub-blocks of 4 lines. Arithmetic unit 5
82 calculates the maximum absolute value for each subblock. In other words, the pixel value of the subblock is s(i,j)
(i, j=0, 1, 2, 3), the arithmetic unit 582
calculates and outputs the following equation (7) for each subblock. Max{|s(i,j) |; i,j=0,1,2,
3 }…(7)

[0153] Since the LH band and the HL band are considered to represent the edge portions in the vertical direction and the horizontal direction, respectively, the arithmetic unit 582 expressed by equation (7)
The output of shows the degree of change of each subblock. That is, if the output of the arithmetic unit 582 is very small, the sub-block in question is a flat part, and if it is large, the sub-block includes sharp changes.

The output of the arithmetic unit 582 is sent to the minimum value detector 58.
3 and the maximum value detector 584. The minimum value detector 583 finds the minimum value of the values of equation (7) for 32 subblocks corresponding to one block. That is, the minimum value detector 583 outputs the minimum value of the 32 values successively output from the arithmetic unit 582. On the other hand, the maximum value detector 584 finds the maximum value of the values of equation (7) for 32 subblocks corresponding to one block. That is, the maximum value detector 584 outputs the maximum value of the 32 values successively output from the arithmetic unit 582. Therefore, if the output of the minimum value detector 583 is very small, it indicates that the block contains a flat portion, and if the output of the maximum value detector 584 is large, it indicates that the block contains severe changes.

Constant generators 585a, 585b, 585c
, 585d are predetermined values α, β, γ, δ, respectively.
Output. The switch 586a is the minimum value detector 583
When the value output from is a value in the LH band, the output of the constant generator 585a is selected, and when it is a value in the HL band, the output of the constant generator 585b is selected and output. Further, the switch 586b selects the output of the constant generator 585c when the value output from the maximum value detector 584 is a value in the LH band, and selects the output of the constant generator 585d when it is a value in the HL band. and output it. Comparator 587a outputs "1" when the output of minimum value detector 583 is smaller than the output of switch 586a, and outputs "0" otherwise. Comparator 587b outputs "1" when the output of maximum value detector 584 is greater than the output of switch 586b, and outputs "0" otherwise.
Output.

That is, when the value for the LH band is output from the minimum value detector 583, the comparator 587a
If this value is smaller than the predetermined value α, it is determined that the corresponding block includes a flat portion in the vertical direction, and “1” is output; otherwise, “0” is output. Similarly, when the value for the HL band is output, if this value is smaller than the predetermined value β, the comparator 587a determines that this block includes a flat portion in the horizontal direction and outputs "1". In this case, "0" is output. The predetermined values α and β are (
7) Determine in advance from the range of values taken by the expression.

[0157] Also, the comparator 587b is the maximum value detector 584.
When a value for the LH band is output from , if this value is larger than a predetermined value γ, it is determined that the corresponding block includes a large change in the vertical direction, and "1" is output,
In other cases, "0" is output. Similarly for the HL band, if the output of the maximum value detector 584 is larger than the predetermined value δ, it is determined that this block includes a large change in the horizontal direction and outputs "1"; otherwise, it outputs "0". " is output. The predetermined values γ and δ are determined in advance from the range of values taken by equation (7) for the sub-blocks of the LH band and HL band, respectively.

Since the LH band block and the HL band block are input to the input terminal 92 in this order, the comparators 587a and 587b first output the judgments va and vb in the vertical direction, and then output the judgments in the horizontal direction. Output the judgments ha, hb for .

The outputs of comparators 587a and 587b are input to control signal generator 588. Control signal generator 588
are the two values v successively output from the comparator 587a.
a, ha and 2 continuously output from the comparator 587b.
The quantization table of the quantization circuit 56 is determined using the two values vb and hb, and a control signal is output. That is, the comparator 587a first outputs a determination va as to whether there is a flat part in the vertical direction, and then outputs a determination ha as to whether there is a flat part in the horizontal direction. first outputs the judgment vb whether or not there is a large change in the vertical direction, and then outputs the judgment hb whether or not there is a large change in the horizontal direction, so using these four judgments, the quantization Decide on the table. For example, if the quantization circuit 56 holds three types of quantization tables, the one with the finest quantization step width is a high-rate quantization table, and the one with a medium quantization step width is a medium-rate quantization table. A quantization table with the coarsest quantization step width will be called a low-rate quantization table. At this time, if va=0 and ha=0, a low-rate quantization table is selected because this block does not have a flat part where image quality deterioration is noticeable. On the other hand, if va=1 or ha=1, a flat portion exists in this block. Therefore, (va=1 or ha=1) and (vb
= 1 or hb = 1), the corresponding block contains flat parts and parts with sharp changes, and the deterioration of image quality is noticeable, so a high-rate quantization table is selected. Also (
va=1 or ha=1) and vb=0 and hb=0
If so, the corresponding block has a flat portion but no rapidly changing portion, so a medium rate quantization table is selected. Control signal generator 588 outputs to quantization circuit 56 which quantization table has been selected. The above is the operation of the determination circuit 58.

The quantization circuit 56 quantizes the transform coefficients output from the orthogonal transform circuit 53 according to the output of the determination circuit 58. At this time, the determination circuit 58 determines whether the LH band block and the HL band block correspond to the same position.
A quantization table is determined and a control signal is output.The quantization circuit 56 divides the control signal output from the determination circuit 58 into four bands (LL, LH,
HL, HH) blocks. for example,
If the output of the determination circuit 58 means "select a high-rate quantization table," the LL band transform coefficient is the one with the finest quantization step width among the three types of quantization tables for the LL band. The transform coefficients of the LH band are quantized using a quantization table with the finest quantization step width among the three types of quantization tables for the LH band, and the transform coefficients of the HL band are quantized using a quantization table. is quantized using the quantization table with the smallest quantization step width among the three types of quantization tables for the HL band, and the transform coefficients for the HH band are quantized using the quantization table with the smallest quantization step width among the three types of quantization tables for the HH band. Quantization is performed using a quantization table with a fine quantization step width.

[0161] Here, the quantization tables for each band may be the same or different. Furthermore, these quantization tables may be uniform quantization tables with a fixed quantization step width or nonlinear quantization tables with non-constant quantization step widths.

The transform coefficients quantized by the quantization circuit 56 are input to the encoding circuit 57 and encoded by one-dimensional scanning of a three-dimensional block and variable length encoding. The encoding circuit 57 also encodes and outputs an index representing the quantization table used by the quantization circuit 56.

[0163] On the decoding side, the process is completely opposite to that of encoding. That is, the data encoded as described above is input to the input terminal 91, and is decoded by the decoding circuit 61 into an index representing the original three-dimensional transformation coefficient and quantization table. This transform coefficient is dequantized in a dequantization circuit 62 according to an index representing a quantization table. The transform coefficients output from the inverse quantization circuit 62 are subjected to inverse orthogonal transform in an inverse orthogonal transform circuit 63 . The inversely orthogonally transformed block of 8 pixels x 8 lines x 8 fields is stored in the memory 64. The memory 64 stores blocks of eight fields, and outputs each component one field at a time until the next eight fields are stored. memory 64
The signals of each component output from the subband synthesis circuit 65
It is synthesized in

FIG. 3 shows the operation of this subband synthesis circuit 65.
8 will be explained. The LL band, LH band, HL band, and HH band signals output from the memory 64 are as follows:
Vertical 1:2 interpolation circuits 651a, 651b, 6, respectively.
51c and 651d, 0 is interpolated and the number of pixels in the vertical direction is doubled. The outputs of the vertical 1:2 interpolation circuits 651a and 651c are band-limited by vertical LPFs 652a and 652b, respectively, which have frequency characteristics as shown in FIG. On the other hand, vertical 1:2 interpolation circuits 651b and 65
The output of 1d is band-limited in vertical HPFs 653a and 653b, each having frequency characteristics as shown in FIG. Vertical LPF 652a output and vertical HPF 6
The output of 53a is added to the output of adder 654a. Also, the output of vertical LPF 652b and vertical HPF 65
3b is added to the output of adder 654b. The outputs of adders 654a and 654b are horizontal 1:
2 interpolation circuits 655a and 655b interpolate 0 and double the number of pixels in the horizontal direction. The output of the horizontal 1:2 interpolation circuit 655a is band-limited by a horizontal LPF 656 having frequency characteristics as shown in FIG. Also, horizontal 1
The output of the :2 interpolation circuit 655b is band-limited by a horizontal HPF 657 having frequency characteristics as shown in FIG. The output of the horizontal LPF 656 and the output of the horizontal HPF 657 are added in an adder 658 and output.

The digital image signals synthesized by the subband synthesis circuit 65 as described above are converted into analog signals by the D/A converter 66 and output.

In the determination circuit 58, the control signal generator 5
88 is a signal va indicating whether a flat portion is included in the vertical direction, a signal ha indicating whether a flat portion is included in the horizontal direction, and a signal indicating whether there is a large change in the vertical direction. A quantization table was selected from vb and a signal hb that indicates whether there is a large change in the horizontal direction, but especially if the input image signal is an interlaced scanning method, there are very few flat parts only in the vertical direction. Also, since it is not visually noticeable, the presence of a flat portion may be determined based on whether a flat portion is included in the horizontal direction. That is, three signals, h
Using only a, vb, hb, for example ha=1 and
If (vb = 1 or hb = 1), it is determined that the corresponding block has a mixture of flat parts and parts with large changes, and a high rate quantization table is selected, and ha = 1 and (vb = 0).
and hb = 0), the corresponding block has a flat part but no rapidly changing part, so a medium rate quantization table is selected, and if ha = 0, it is determined that there is no flat part,
Select a low rate quantization table.

Furthermore, in the above example, the arithmetic unit 582 in the determination circuit 58 calculates the maximum absolute value of the pixel values in each sub-block, but even if the dynamic range of each sub-block is calculated, the result is exactly the same. be effective. Judgment circuit 5
Another configuration example of No. 8 is shown in FIG. In the figure, the same reference numerals as in FIG. 39 indicate the same parts. 93a is an input terminal for LH band, 93b is an input terminal for HL band, 589a, 5
89b is an absolute value calculation circuit, 590 is an adder, 591
592 is a subblock maximum value detector that detects the maximum value within a subblock, and 592 is a control signal generator.

Next, the operation will be explained. The LH band block outputted from the blocking circuit 52 is inputted from the input terminal 93a, and the HL band block is inputted from the input terminal 93b.
9a, 589b, it is converted to an absolute value. In the absolute value calculation circuits 589a and 589b, the absolute value LH band block and HL band block are added in an adder 590, and further divided into a plurality of subblocks in a subblocking circuit 581. The subblocking circuit 581 divides one block into 32 subblocks as shown in FIG. 41, for example. The intra-subblock maximum value detector 591 outputs the maximum value within each subblock. That is, the pixel value of each subblock output from the subblocking circuit 581 is expressed as s(
i, j) (i, j=0, 1, 2, 3), the sub-block maximum value detector 591 outputs the following equation (8) for each sub-block. Max {s(i,j); i,j=0,1,2,3
} …(8)

Since the output of the adder 590 represents an edge in the horizontal or vertical direction, the value of the intra-subblock maximum value detector 591, that is, (8
) If the value of the equation is very small, it indicates that the subblock is a flat area, and if it is large, it indicates that the subblock includes severe changes.

Maximum value detector 591 within this subblock
The output of is the minimum value detector 583 and the maximum value detector 584
is input. The minimum value detector 583 finds the minimum value of the values of equation (8) for 32 subblocks corresponding to one block. That is, the minimum value detector 583 outputs the minimum value of the 32 values successively output from the intra-subblock maximum value detector 591. On the other hand, the maximum value detector 584 finds the maximum value of the values of equation (8) for 32 subblocks corresponding to one block. That is,
The maximum value detector 584 is the intra-subblock maximum value detector 5
Outputs the maximum value of the 32 values consecutively output from 91. Therefore, if the output of the minimum value detector 583 is very small, it indicates that the block contains a flat part, and if the output of the maximum value detector 584 is large, it indicates that the block contains severe changes. There is.

Control signal generator 592 determines which quantization table to select according to the output of minimum value detector 583 and maximum value detector 584. For example, a relatively small value α' and a relatively large value β' are determined in advance, and when the output d1 of the minimum value detector 583 is d1≧α', a low rate quantization table is selected,
When d1<α' and the output d2 of the maximum value detector 584 is d2≦β', a medium rate quantization table is selected; when d1<α' and d2>β', a high rate quantization table is selected. Select a quantization table. Alternatively, the quantization table may be switched according to a two-dimensional chart such as that shown in FIG. In this case, even if there are three or more quantization tables, it can be easily applied.

In the above embodiment, the quantization table was selected using the LH band and HL band among the four components divided into subbands, but the LH band, HL band, and HH band were selected. It is also possible to select a quantization table using Figure 43 shows an example of the configuration in this case.
Shown below. In the figure, the same reference numerals as in FIG. 35 represent the same parts. 58a is the LH output from the blocking circuit 52
This is a determination circuit that determines a quantization table using blocks of the band, HL band, and HH band.

An example of the configuration of the determination circuit 58a is shown in FIG. In the figure, the same symbols as in FIG. 39 represent the same configurations. The LH band, HL band, and HH band blocks outputted from the blocking circuit 52 are sequentially inputted from the input terminal 92a, and in the subblocking circuit 581, 3
It is divided into two sub-blocks. Arithmetic unit 582 calculates the maximum absolute value of pixel values within each subblock for each subblock. The output of the calculator 582 is input to a minimum value detector 583 and a maximum value detector 584. The minimum value detector 583 finds the minimum value of the output of the arithmetic unit 582 for 32 subblocks corresponding to one block. The maximum value detector 584 finds the maximum value of the output of the arithmetic unit 582 for 32 sub-blocks corresponding to one block. These sub-block circuits 581
, the operation unit 582, the minimum value detector 583, and the maximum value detector 584 are similar to those in the previous embodiment.

Constant generators 585a, 585b, 585e
, 585c, 585d, and 585f output predetermined values α, β, ε, γ, δ, and θ, respectively. 593a
is a switch, and when the value output from the minimum value detector 583 is a value of the LH band, the constant generator 585a
When the value is in the HL band, the predetermined value β of the constant generator 585b is selected, and when the value is in the HH band, the predetermined value ε of the constant generator 585e is selected and output.

593b is also a switch, which selects a predetermined value γ of the constant generator 585c when the value output from the maximum value detector 584 is a value of the LH band, and selects a predetermined value γ of the constant generator 585c when the value output from the maximum value detector 584 is a value of the HL band. A predetermined value δ of 585d is selected, and when the value is in the HH band, the constant generator 585
A predetermined value θ of f is selected and output.

Comparator 587a outputs "1" when the output of minimum value detector 583 is smaller than the output of switch 593a, and outputs "0" otherwise. Comparator 5
87b, the output of the maximum value detector 584 is connected to the switch 593
When it is larger than the output of b, it outputs "1", and when it is not, it outputs "0". That is, as in the previous embodiment, the comparator 587a outputs "1" when the corresponding block has a flat portion, and the comparator 587a outputs "1".
7b outputs "1" when there is a drastic change in the corresponding block.

[0177] Since each block of the LH band, HL band, and HH band is input from the input terminal 92a in this order, the comparators 587a and 587b first output the judgment ha and hb for the block of the LH band, and then H
Outputs the judgments va, vb for the L-band blocks, and finally outputs the judgments da, vb for the HH-band blocks.
Output db. These comparators 587a, 587b
Each of the three successive outputs is connected to a control signal generator 58.
8a, and a quantization table is determined.

For example, if the quantization circuit 56 holds three quantization tables, a quantization table with a fine quantization step width, a high rate quantization table, and a quantization table with a medium quantization step width. A quantization table with a coarse quantization step width is called a medium-rate quantization table, and a quantization table with a coarse quantization step width is called a low-rate quantization table. At this time, if ha=0 and va=0, it is determined that there is no flat part and a low rate quantization table is selected. If ha = 1 or va = 1, there is a flat part, if hb = 1 or vb = 1 or db = 1, there is also a sharp change, so choose a high rate quantization table, otherwise Select a medium rate quantization table.

[0179] In the above-described embodiment, the quantization table was selected using the LH band, HL band, and HH band, but the same structure can be used when making a determination using only one component of these. .

Furthermore, in the above embodiments, the subblocking circuit 581 divides one block into 32 subblocks as shown in FIG. 41, but the size of the subblocks is limited to 4×4. For example, it may be configured into a 4 x 2 x 2 three-dimensional sub-block of 4 pixels in the horizontal direction, 2 pixels in the vertical direction, and 2 fields in the temporal direction, and the size may vary depending on the block size and hardware configuration. Just set it. Further, the size of one block, which is a unit of orthogonal transformation, does not need to be limited to 8×8×8, and the same effect can be obtained for three-dimensional blocks and two-dimensional blocks of arbitrary sizes.

Furthermore, in the above embodiments, the case where the input signal is divided into four subbands is shown, but for example, when dividing the input signal into two only in the horizontal direction,
Similarly, when the low frequency component is divided into seven bands by repeating four subbands, the quantization table can be selected using the high frequency component. In other words, in general, no matter how many bands are divided into subbands, the same effect can be achieved by using high-frequency components to detect whether there are flat parts or rapidly changing parts within the block, and then selecting a quantization table. can be obtained.

Next, still another embodiment of the present invention will be described. In this example, in an input interlaced scanning digital image signal, one of the odd and even fields is passed through a vertical filter with odd taps, and the other is passed through a vertical filter with even taps.

FIG. 45 is a block diagram showing the internal configuration of subband division circuit 5 in such an example. In the figure, parts with the same numbers as those in FIG. 19 indicate the same members, so a description thereof will be omitted. In the figure, 28, 2
9 and 30 are Y in the subband division circuit 5, respectively.
A signal subband division circuit, a R-Y signal subband division circuit, and a B-Y signal subband division circuit are shown, and their internal configurations are the same. The configuration of the illustrated Y signal subband division circuit 28 will be described below. Input terminal 2
The vertical LPF connected to 1 is divided into two, a vertical LPF 241a and a vertical LPF 241b. vertical LP
A switch 39 is connected between the vertical LPF 241b and the vertical 2:1 subsampling circuit 243a.
is provided. The output terminal of the vertical LPF 241a is connected to one terminal a of the switch 39.
The output terminal of the vertical LPF 241b is connected to the other terminal b of the vertical LPF 241b. Further, the vertical HPFs connected to the input terminal 21 are vertical HPF 242a and vertical HPF 2.
It is divided into two parts, 42b. Vertical HPF 242a,
A switch 40 is provided between the vertical HPF 242b and the vertical 2:1 subsampling circuit 243b. A vertical HPF 242 is connected to one terminal a of the switch 40.
output terminal a is connected, and the other terminal b of the switch 40
is connected to the output terminal of the vertical HPF 242b.

FIG. 46 is a block diagram showing the internal configuration of subband synthesis circuit 14 in such an example. In the figure, parts with the same numbers as those in FIG. 20 indicate the same members, so a description thereof will be omitted. In the figure, 36,
Reference numerals 37 and 38 respectively indicate a Y signal subband synthesis circuit, an RY signal subband synthesis circuit, and a BY signal subband synthesis circuit in the subband synthesis circuit 14, and their internal configurations are the same. The configuration of the illustrated Y signal subband synthesis circuit 36 will be described below. vertical 1
The vertical LPF connected to the :2 interpolation circuit 336a is divided into two: a vertical LPF 337a and a vertical LPF 337b. Vertical LPF 337a, Vertical LPF 33
A switch 48 is provided between subtractor 7b and subtractor 339. Vertical LP is connected to one terminal a of the switch 48.
The output terminal of the F 337a is connected, and the other terminal b of the switch 48 is connected to the output terminal of the vertical LPF 337b. Further, the vertical HPF connected to the vertical 1:2 interpolation circuit 336b is the vertical HPF 338a and the vertical H
It is divided into two into PF 338b. Vertical HPF 33
8a, a switch 49 is provided between the vertical HPF 338b and the subtracter 339. The output terminal of the vertical HPF 338a is connected to one terminal a of the switch 49, and the output terminal of the vertical HPF 338a is connected to the other terminal b of the switch 49.
The output terminal of 338b is connected.

Next, the operation will be explained. Input terminal 2
The Y signal inputted from Y signal subband dividing circuit 28 is divided into four bands. Below, this Y
The operation of the signal subband division circuit 28 will be explained in detail. The Y signal input from the input terminal 21 is passed through the vertical LPF 2
41a and 241b. The switch 39 switches between terminal a and terminal b for each field and outputs the output. For example, terminal a is selected for an odd field, and terminal b is selected for an even field. Therefore, when it is an odd field, the Y signal that has passed through the vertical LPF 241a with odd taps is output, and when it is an even field, the Y signal that has passed through the vertical LPF 241b with even taps is output, so the output of the switch 39 is as follows. As shown in FIG. 47, the spatial sampling positions are the same for both odd and even fields. The subsequent operation is shown in Figure 19.
This is the same as the example shown in . Further, the Y signal input from the input terminal 21 is also passed through the vertical HPFs 242a and 242b. The switch 40 switches between terminal a and terminal b for each field and outputs the output. For example, terminal a is selected for an odd field, and terminal b is selected for an even field. Therefore, in the case of an odd number field, the Y signal that has passed through the vertical HPF 242a of the odd number taps is output, and in the case of an even number field, the Y signal that has passed through the vertical HPF 242a of the even number taps is output.
Since the Y signal that has passed through 242b is output, the output of switch 40 has the same spatial sampling position in both odd and even fields, as shown in FIG. Note that the subsequent operation is the same as the example shown in FIG. 19. Note that the R-Y signal subband division circuit 29, B
-Y signal subband division circuit 30 also operates in a similar manner.

FIG. 48 shows the case where, in such an example, 4 pixels in the horizontal direction, 4 pixels in the vertical direction, and 8 fields in the time direction are collectively output from the memory 27 as a 4×4×8 three-dimensional block. It shows. Each component has the same spatial sampling position in both odd and even fields, so even if odd and even fields are mixed to form a three-dimensional block, the pixels in the block are arranged in a grid.

Next, the operation on the playback side will be explained. L
Vertical 1:2 interpolation circuit 336a in L and HL bands
The operations up to this point are the same as in the example shown in FIG. 20, so a description thereof will be omitted. The output from the vertical 1:2 interpolation circuit 336a is input to an odd-numbered tap vertical LPF 337a and an even-numbered tap vertical LPF 337b. When the field is an odd number, terminal a of the switch 48 is selected, and the signal passing through the vertical LPF 337a of odd number taps is output to the subtracter 339. On the other hand, in the case of an even field, terminal b of the switch 48 is selected, and the signal passed through the even-numbered tap vertical LPF 337b is output to the subtracter 339. Also, vertical 1 in LH and HH bands
The operations up to the :2 interpolation circuit 336b are the same as in the example shown in FIG. 20, so a description thereof will be omitted. The output from the vertical 1:2 interpolator 336b is an odd-numbered tap vertical HPF 33.
8a, is input to an even tap vertical HPF 338b. Then, when the field is an odd number, terminal a of the switch 49 is selected, and the vertical HPF 338a of the odd number tap is selected.
The signal that has passed through is output to the subtracter 339. on the other hand,
In the case of an even field, terminal b of the switch 49 is selected, and the signal passed through the even-numbered tap vertical HPF 338b is output to the subtracter 339. A subtracter 339 subtracts the output of the switch 49 from the output of the switch 48, and outputs the original Y signal of one field. In addition, R
The operations of the -Y signal subband synthesis circuit 37 and the BY signal subband synthesis circuit 38 are similar to the operation of the Y signal subband synthesis circuit 36 described above.

[0188] In such an example, after aligning the spatial sampling positions of the odd and even fields, both fields are collapsed to form a three-dimensional block and three-dimensional orthogonal transformation is performed. Significant information compression can also be performed on image signals.

Next, still another embodiment of the present invention will be described. This embodiment is an example in which the weighting method is changed in each divided subband. FIG. 49 is a block diagram showing the configuration of the reference numeral side in such an embodiment, and in the figure, parts given the same numbers as in FIG. 35 indicate the same members.

[0190] The digital image signal is frequency-separated into two levels in the horizontal and vertical directions by the subband division circuit 51, resulting in four types of subband signals. Each of the obtained subband signals is sent to blocking circuits 52a, 52b, 5
2c and 52d, respectively. Blocking circuit 52
a, 52b, 52c, and 52d are divided into blocks for each plurality of pixels, and the obtained blocks are sent to an orthogonal transform circuit 53a.
, 53b, 53c, and 53d. The orthogonal transform circuits 53a, 53b, 53c, 53d apply, for example, three-dimensional DCT to each block, and the obtained transform coefficients are sent to the weighting circuits 54a, 54b, 54c,
Output to 54d. Waiting circuits 54a, 54
b, 54c, 54d are orthogonal transform circuits 53a, 53b, 53 based on the frequency characteristics of each subband.
Weighting is applied to the transform coefficients output from the circuits c and 53d, and the weighted transform coefficients are sent to the variable length encoding circuit 5.
Output to 5a, 55b, 55c, and 55d. Each variable length encoding circuit 55a, 55b, 55c, 55d
are the weighting circuits 54a, 54b, 54c,
The output of 54d is variable length encoded.

Next, the operation will be explained.

Each subband signal output from the subband division circuit 51 is sent to blocking circuits 52a, 52b,
52c, 52d, every plural pixels, for example 8
The blocks are divided into pixels x 8 lines x 8 fields. Then block X0 for 8 consecutive fields
(i, j, k) (i: horizontal direction, j: vertical direction, k: time direction, i, j, k=0, 1,..., 7) are each blocked circuit 52a, 52b, 52c, 52d The signals are outputted from orthogonal transform circuits 53a, 53b, 53c, and 53d. Each of these blocks includes an orthogonal transform circuit 53a,
Three-dimensional DC at 53b, 53c, 53d
T and 8×8×8 transform coefficients X(i, j, k
) (i, j, k=0, 1,..., 7) are output to the weighting circuits 54a, 54b, 54c, 54d. Orthogonal transformation circuits 53a, 53b, 53c, 53
d to each weighting circuit 54a, 54b, 54
The conversion coefficients output to c and 54d are weighted. Weighting circuit 54a corresponds to the LL band, weighting circuit 54b corresponds to the LH band, weighting circuit 54c corresponds to the HL band, and weighting circuit 54d corresponds to the HH band. Each weighting circuit 54a, 54b,
The outputs of 54c and 54d are variable length encoded by corresponding variable length encoding circuits 55a, 55b, 55c and 55d.

Here, each weighting circuit 54a,
The operations and weighting sizes in 54b, 54c, and 54d will be explained.

From the results in Tables 2 and 3 mentioned above, in the LL band, when looking at blocks in a two-dimensional plane, (i, j) =
Since the power is concentrated around (0,0), in the LL band, as shown in FIG. It is suitable to give a small weight to the transform coefficients which are a higher order sequence.

From the results in Tables 6 and 7 mentioned above, in the LH band, when viewed as a block in a two-dimensional plane, (i, j) =
Since the power is concentrated around (0,7), in the LH band, as shown in Figure 50(b), the lower left where the horizontal direction is the low-order sequence and the vertical direction is the high-order sequence. It is suitable to give a large weight to transform coefficients, and to give a small weight to transform coefficients whose horizontal direction is a high-order sequence and whose vertical direction is a low-order sequence.

From the results in Tables 4 and 5 mentioned above, in the HL band, when looking at blocks in a two-dimensional plane, (i, j) =
Since the power is concentrated around (7,0), in the HL band, as shown in Figure 50(c), the horizontal direction is the high-order sequence and the vertical direction is the low-order sequence. It is suitable to give a large weight to transform coefficients, and to give a small weight to transform coefficients whose horizontal direction is a low-order sequence and whose vertical direction is a high-order sequence.

From the results in Tables 8 and 9 mentioned above, in the HH band, when viewed as a block in a two-dimensional plane, (i, j) =
Since the power is concentrated around (7, 7), in the HH band, as shown in Figure 50(d), there is a large weighting on the lower right conversion coefficient where both the horizontal and vertical directions are high-order sequences. It is suitable to apply a small weight to transform coefficients that have low-order sequences in both the horizontal and vertical directions.

[0198] Also, if we look at the values in each table in the time direction, the power is concentrated on the plane of k=0 in all bands, and the higher the order of k, the smaller the power is.
It is suitable to apply a large weight to a transform coefficient with a low order k, and to apply a small weight to a transform coefficient with a high order k. Furthermore, since human vision is dull towards high spatial frequencies, a large weighting is applied to the LL band where low spatial frequencies are concentrated.
It is appropriate to apply small weighting to the HH band where high spatial frequencies are concentrated.

Considering the above, and considering that the weightings for the four subbands are smoothly connected in the horizontal and vertical frequency directions, the weighting coefficients for each subband are as follows.

Weighting coefficient W for LL band
LL (i, j, k) may be set as shown in the following formula.

[0201]

[Math. 14]

Similarly, the weighting coefficient WLH(i
, j, k), WHL (i, j, k), WHH (i,
j, k) may be set as shown in the following formulas.

[0203]

[Math. 15]

[0204]

[Math. 16]

[0205]

[Math. 17]

[0206] By performing the above weighting, it is possible to apply effective weighting to each divided subband.

[0207] In the above embodiment, three-dimensional DCT was used as the orthogonal transformation, but two-dimensional DCT may also be used. In this case, the RMS of the two-dimensional DCT transform coefficient is 3
Since it shows the same tendency as the RMS in the two-dimensional plane in the dimensional DCT, the weighting coefficient WLL (
i, j), WLH (i, j), WHL (i, j),
WHH(i,j) may be set as shown in the following formulas.

[0208]

[Math. 18]

[0209]

[Math. 19]

[0210]

[Math. 20]

[0211]

[Math. 21]

[0212] The band division/synthesis method of the present invention will be explained below. 51 and 52 show subband division/synthesis circuits for dividing the horizontal frequency band into two. In FIG. 51 showing the configuration of the subband division circuit, 70 is an input terminal for a digital image signal. The subband division circuit includes a folded image addition circuit 71 that folds back and adds the image input from 70 at the end point, and an even-tap horizontal LPF 72 that limits the horizontal frequency of the image output from the folded image addition circuit 71. HPF 73 and
The sub-sampling circuits 74a and 74b are provided with horizontal 2:1 subsampling circuits 74a and 74b that thin out the number of pixels in the horizontal direction of the outputs of the horizontal LPF 72 and horizontal HPF 73 by 2:1, respectively. Also,
75a and 75b are output terminals of horizontal 2:1 subsampling circuits 74a and 74b, respectively.

In FIG. 52 showing the configuration of the subband synthesis circuit, 76a and 76b are input terminals of each band divided as described above. The sub-band synthesis circuit includes a folded image addition circuit 77 that folds back the image input from the input terminal 76a at the end point and adds the image, and a folded image addition circuit 77 that wraps the image input from the input terminal 76b at the end point and adds the image multiplied by -1. Horizontal 1:2 which interpolates 0 to the image output from the folded image addition circuit 78 and the folded image addition circuits 77 and 78 and doubles the number of pixels in the horizontal direction.
Interpolation circuits 79a, 79b and horizontal 1:2 interpolation circuit 79
Horizontal L of even taps that limits the horizontal frequency of the output of a
PF 80, a horizontal HPF 81 with even taps that limits the horizontal frequency of the output of the horizontal 1:2 interpolation circuit 79b, and an arithmetic unit 82 that subtracts the output of the horizontal HPF 81 from the output of the horizontal LPF 80. Further, 83 is an output terminal of the arithmetic unit 82.

Next, the operation will be explained. FIG. 53 is a conceptual diagram of output signals from each member to explain this operation. The image signal inputted from the input terminal 70 is subjected to a folded image adding circuit 71 in which folded images are added to the end points of the image. For example, when the image signal is an image of 704 pixels x 240 lines, the following (
As shown in equation 9), a folded image is added to the end point of the image (FIG. 53(b)).

[0215]

The output of this folded image addition circuit 71 is input to a horizontal LPF 72 and a horizontal HPF 73. The horizontal LPF 72 is a linear phase low-pass filter with even taps, and its coefficient h1(n) (n=0,...,N1
-1; N1 is an even number) is h1 (n) =
h1 (N1 -n-1) n=0,..., (N1
/2)-1...(10). That is, the horizontal LPF 72 outputs a signal expressed by the following equation (11) for the signal x(n) of each line (FIG. 53(c)).

[0217]

[Math. 22]

On the other hand, the horizontal HPF 73 is a linear phase high-pass filter with an even number of taps, and its coefficient h2 (n
) (n=0,...,N2 -1; N2 is an even number) is
h2 (n) = -h2 (N2 -n-1)
n=0,...,(N2/2)-1...(1
2). That is, the horizontal HPF 73 outputs a signal expressed by the following equation (13) for the signal x(n) of each line (FIG. 53(c)).

[0219]

[Math. 23]

[0220] The outputs of the horizontal LPF 72 and the horizontal HPF 73 are sent to the horizontal 2:1 subsampling circuit 74, respectively.
In a and 74b, the number of pixels in the horizontal direction is thinned out to 1/2 and outputted from output terminals 75a and 75b, respectively (FIG. 53(d)). The above is the operation of the subband division circuit. The two signals divided into subbands and output are respectively coded using predictive coding, orthogonal transformation, or the like. On the decoding side, after decoding these signals, subband synthesis is performed.

[0221] The signals of each band divided into subbands as described above are input to input terminals 76a and 76b. That is, assuming that no distortion occurs in encoding/decoding after subband division, signals input from input terminals 76a and 76b are output from output terminals 75a and 75b, respectively.
It is the same as the signal output from Therefore, each line of the image input from the input terminals 76a and 76b is y1 (n), y2 (n) (n=1, 3,
5,...,703). The folded image addition circuit 77 adds folded images to the end points of the image input from the input terminal 76a. That is, the following (14)
It shall be a formula.

[0222]

[0223] Although the subband division circuit does not output the added aliased image part, if the horizontal LPF 72 also calculates the aliased image part, Equation (9), (1
From formula 1), it is as follows.

[0224]

[Math. 24]

[0225]

[Math. 25]

Therefore, if the folded image adding circuit 77 adds the folded image as shown in equation (14), the subband combining circuit can add the folded image without transmitting the added folded image part in the subband dividing circuit. , can be accurately restored. The output of this folded image addition circuit 77 is sent to a horizontal 1:2 interpolation circuit 79a.
0 is interpolated and the number of pixels in the horizontal direction is doubled. That is, each line of the image output from the horizontal 1:2 interpolation circuit 79a is as shown in FIG. 53(e).

[0227]

The output of the horizontal 1:2 interpolation circuit 79a is input to the horizontal LPF 80. The horizontal LPF 80 is a low-pass filter with even number of taps, and its coefficient is g1
(n) (n=0,...,N3 -1:N3 is an even number), each line y1'(n) of the image output from the horizontal 1:2 interpolation circuit 79a (n=-703, -70
2, . . . , 1407), a signal expressed by the following formula is output (FIG. 53(g)).

[0229]

[Math. 26]

On the other hand, the folded image addition circuit 78 adds the folded image multiplied by -1 to the end points of the input image from the input terminal 76b. That is, each line y2 (n) of the image input from the input terminal 76b
(n=1,3,5,...,703), the following (
15).

[0231]

Here, as in the case of the folded image addition circuit 77, if the horizontal HPF 7
Assuming that 3 also calculates the folded image part, (9
) and (13), it is as follows.

[0233]

[Math. 27]

[0234]

[Math. 28]

Therefore, if the folded image addition circuit 78 adds the folded image as shown in equation (15), the subband synthesis circuit can accurately transmit the folded image portion without transmitting the folded image part in the subband division circuit. can be restored. The output of this folded image addition circuit 78 is interpolated with 0 in a horizontal 1:2 interpolation circuit 79b, and the number of pixels in the horizontal direction is doubled, as shown in FIG. 53(f).
As shown in , each line is as follows.

[0236]

The output of the horizontal 1:2 interpolation circuit 79b is input to the horizontal HPF 81. Horizontal HPF 81 is a high-pass filter with even number of taps, and its coefficient is expressed as g2
(n) (n=0,...,N4 -1:N4 is an even number), each line y2'(n) of the image output from the horizontal 1:2 interpolation circuit 79b (n=-703, -70
2,..., 1407), the following signals are output.

[0238]

[Math. 29]

Arithmetic unit 82 subtracts the output of horizontal HPF 81 from the output of horizontal LPF 80 and outputs the result from output terminal 83.

Next, in order to concretely demonstrate the effects of this embodiment, similar to the conventional example, the horizontal LPF 72, the horizontal HPF
73, horizontal LPF 80, and horizontal HPF 81 are the 16-tap filters shown in Table 1, and the first line x(n) of the input image signal (n=1,...,704)
However, x(1) = 16, x(2) = 120, x
(3) =130, x(4) =140,x(5)
=150, x(6) =160, x(7)
=170, x(8) =180, x(9) =19
0, x(10) = 200, x(n) = 200
, (n=11, 12,..., 704). At this time, the signal output from the output terminal 75a is y1 (1) = 59.6, y1 (3) = 14
4.7, y1 (5) =152.6, y1 (7
) =175.1, y1 (9) =195.3,
y1 (11)=200.5, y1 (13)=1
99.8, y1 (15)=200.0, y1
(17)=199.9,... Also, the signal output from the output terminal 75b is y2 (1) = -37.7, y2 (3)
=8.2,y2 (5) =-3.1,y
2 (7) =1.0, y2 (9) =
−1.6, y2 (11)=0.1, y2 (
13)=-0.1, y2 (15)=0.1,
y2 (17)=0.0,... When the outputs of the output terminals 75a and 75b are input to the input terminals 76a and 76b on the synthesis side, the horizontal LP
The output of F 80 is x1 (1) = 46.3,
x1 (2) =77.9, x1 (3) =1
29.4, x1 (4) =156.1, x1 (
5) =151.0, x1 (6) =153.2
, x1 (7) =169.1, x1 (8) =
182.0, x1 (9) = 191.3,..., and the output of the horizontal HPF 81 is x2 (1) = 30.5, x2 (2) = -
42.0, x2 (3) = -0.5, x2 (
4) =16.3, x2 (5) =1.2,
x2 (6) = -6.7, x2 (7)
=-0.8, x2 (8) =2.1,
x2 (9) = 1.4, ....

[0241] Therefore, the output X(n) of the arithmetic unit 82 is
Rounding off to the nearest whole number, X(1) = 16, X(2) = 120,
X (3) = 130, X (4) = 140,
X(5) =150, X(6) =160
,X(7) =170,X(8) =180,
X(9) = 190, . . . and even near the end points of the image, X(n) = x(n), and the original image can be accurately restored.

[0242] In the above embodiment, the folded image is added before interpolating 0.
A similar configuration can be used when adding a folded image after interpolating the image.

Further, in the above embodiment, the filter has an even number of taps, but a filter with an odd number of taps can be constructed in the same way. FIGS. 54 and 55 show an example of a configuration when using a filter with odd number taps. The image input from the input terminal 70 is processed by the folded image addition circuit 84 as shown in FIG. 56(b).
An image obtained by subtracting one pixel from the folded image at the end point is connected, resulting in the following equation (16).

[0244]

[0245] The horizontal LPF 85 is a low-pass filter with a linear phase and odd number of taps, and its coefficient is expressed as h1 (n).
(n=0,...,N1 -1; N1 is an odd number), then h1 (n) = h1 (N1 - n-1)
n=0,..., (N1 -1)/2. That is,
The horizontal LPF 85 has the following for each line signal x(n):
The following equation (17) is output.

[0246]

[Math. 30]

[0247] Horizontal 2:1 subsampling circuit 74a
is the number of pixels in the horizontal direction of the output of horizontal LPF 85.
Thin out, y1 (1) , y1 (3) , y1
(5) ... is output from the output terminal 75a (Fig. 56 (
c)). On the other hand, the horizontal HPF 86 is a linear phase odd-tap high-pass filter whose coefficients are h2 (n
) (n=0,...,N2 -1; N2 is an odd number), then h2 (n) = h2 (N2 -n-1)
n=0,..., (N2 -1)/2. That is, the horizontal HPF 86 calculates, for each line signal x(n),
The following equation (18) is output.

[0248]

[Math. 31]

[0249] The horizontal 2:1 subsample circuit 74c is
Horizontal HPF 86 output horizontal pixel count to 1/2
, y2 (2) , y2 (4) , y2 (
6) ... is output from the output terminal 75b (Fig. 56(d)
)).

In the subband synthesis circuit, the signals of each band output from the output terminals 75a and 75b on the dividing side are inputted from the input terminals 76a and 76b, respectively. That is, each line of the image input from the input terminals 76a and 76b is y1 (n) (n=1
,3,5,...,703),y2 (n) (n=2,4
, 6, ..., 704). Horizontal 1:2 interpolation circuits 79a and 79c have input terminals 76a and 76, respectively.
0 is interpolated into the image input from b, and the number of pixels in the horizontal direction is doubled. Therefore, horizontal 1:2 interpolation circuit 79a
, 79c, the outputs y1'(n) and y2'(n) are as follows.

[0251]

[0252] The folded image addition circuits 87a and 87b connect the folded images minus one pixel to the end points of the images output from the horizontal 1:2 interpolation circuits 79a and 79c, respectively. That is, the following equation (19), (
20) Formula 56 (e), (f).

0253]

[0254] The subband division circuit does not transmit the added aliased image part, but if the horizontal LPF 85,
Assuming that the horizontal HPF 86 also calculates the aliased image portion, the following equations are obtained from equations (16) and (17).

0255]

[Math. 32]

Similarly, y1 (704+n) = y1 (704-n)
(n=1, 2,..., 704). Furthermore, from equations (16) and (18), the following equations also hold true.

0257]

[0258] Therefore, the folded image adding circuits 87a, 8
7b, as in equations (19) and (20),
By adding folded images to the end points of the image, it is possible to accurately restore the folded image portions that are added in the subband division circuit and are not transmitted. The outputs of the folded image adding circuits 87a and 87b are respectively horizontal LPFs.
88, is input to the horizontal HPF 89. Horizontal LPF 8
8 is a low-pass filter with an odd number of taps, and if its coefficient is g1 (n) (n=0,...,N3 -1; N3 is an odd number), each of the images output from the folded image addition circuit 87a The following formula is output for line y1'(n).

0259]

[Math. 33]

On the other hand, the horizontal HPF 89 is a high-pass filter with an odd number of taps, and its coefficients are expressed as g2 (n) (
If n=0,...,N4 -1; N4 is an odd number), then
The following equation is output for each line y2'(n) of the image output from the folded image addition circuit 87b.

[0261]

[Math. 34]

Arithmetic unit 82 adds the output of horizontal LPF 88 and the output of horizontal HPF 89 and outputs the result from output terminal 83.

[0263] In the above embodiment, the configuration is such that a folded image is added after interpolating 0, but a similar configuration can be made when interpolating 0 after adding a folded image.

[0264] Furthermore, in each of the above examples,
Although subband division in which the horizontal frequency band is divided into two has been described, it is clear that a similar configuration can be made in the case where the vertical frequency band is divided into two. Also, the horizontal frequency band is
By continuously connecting the subband division circuit that divides the vertical frequency band and the subband division circuit that divides the vertical frequency band into two,
It can also be applied to the case where a two-dimensional frequency band is divided into four. Furthermore, it is clear that the present invention can also be applied to the case where a circuit for finer subband division is configured by continuously connecting a plurality of subband division circuits.

Furthermore, in the above embodiment, all folded images are added, but it is clear that in reality, only the number of pixels necessary for filtering may be added.

0266]

Effects of the Invention According to the first invention, the position of the conversion coefficient at which one-dimensional scanning is started is changed depending on the type of band, and scanning starts from the conversion coefficient with the maximum power, so that the digital image signal redundancy can be reduced compared to the conventional method.

According to the second invention, since a part of each divided band is thinned out and encoded at a constant period,
There is little deterioration in image quality and the encoding rate can be reduced.

According to the third and tenth aspects, since only valid image blocks are encoded, there is little deterioration in image quality and the encoding rate can be reduced.

[0269] According to the fourth invention, it is determined whether a block of the original image includes a flat part or a part with large changes, and a quantization table is selected based on the result of this determination. Good image quality can be maintained even in flat areas of the image.

According to the fifth and thirteenth inventions, after aligning the spatial sampling positions of odd and even fields, both fields are folded together to form a three-dimensional block and subjected to three-dimensional orthogonal transformation. Significant information compression can also be achieved for digital image signals of this method.

[0271] According to the sixth, fourteenth, and fifteenth inventions, weighting is applied to the transform coefficients according to the frequency characteristics of each subband, and in particular, in the sixth and fifteenth inventions, this weighting is applied so that each subband is connected continuously. Therefore, effective information compression can be performed.

[0272] According to the seventh and eighth inventions, it is possible to accurately reproduce the part of the aliased image that is not transmitted, which is added for filtering the end points of the image, in the subband synthesis circuit. It is possible to restore accurately.

[0273] In all inventions other than the fifth and thirteenth inventions, coding is performed in blocks after subband division, so that more efficient coding can be achieved than in the case where subband division is not performed.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of a conventional digital image signal encoding device.

FIG. 2 is a block diagram showing the internal configuration of the encoding circuit in FIG. 1.

FIG. 3 is a conceptual diagram showing scanning in the encoding circuit shown in FIG. 2;

FIG. 4 is a conceptual diagram of a conventional three-dimensional block using a progressive scanning method.

FIG. 5 is a diagram showing the principle of interlaced scanning of a television screen.

FIG. 6 is a conceptual diagram showing the relationship between fields and frames in a standard television signal.

FIG. 7 is a block diagram showing the configuration of a conventional encoding device.

FIG. 8 is an explanatory diagram showing weighting of a weighting circuit in a conventional encoding device.

FIG. 9 is a block diagram showing the configuration of a transmitting side of a conventional encoding device.

FIG. 10 is a block diagram showing the configuration of a receiving side of a conventional encoding device.

FIG. 11 is a diagram showing an example of sampling in a conventional encoding device.

FIG. 12 is a diagram showing an example of subsampling in a conventional encoding device.

FIG. 13 is a block diagram showing the configuration of a conventional subband division circuit.

FIG. 14 is a block diagram showing the configuration of a conventional subband synthesis circuit.

15 is a frequency characteristic diagram of the filter used in FIGS. 13 and 14. FIG.

FIG. 16 is a conceptual diagram showing band division of the subband division circuit shown in FIG. 13;

FIG. 17 is a block diagram showing the configuration of the encoding side of the encoding device according to the present invention.

FIG. 18 is a block diagram showing the configuration of the decoding side of the encoding device according to the present invention.

19 is a block diagram showing the internal configuration of the subband division circuit in FIG. 17. FIG.

FIG. 20 is a block diagram showing the internal configuration of the subband synthesis circuit in FIG. 18;

FIG. 21 is a diagram showing subband division of a Y signal in the present invention.

FIG. 22 is a diagram showing subband division of the RY signal and BY signal in the present invention.

FIG. 23 is a diagram showing the frequency characteristics of the vertical LPF in the encoding device of the present invention.

FIG. 24 is a diagram showing the frequency characteristics of the vertical HPF in the encoding device of the present invention.

FIG. 25 is a diagram showing the frequency characteristics of the horizontal LPF in the encoding device of the present invention.

FIG. 26 is a diagram showing the frequency characteristics of the horizontal HPF in the encoding device of the present invention.

FIG. 27 is a diagram showing one-dimensional scanning in the present invention.

FIG. 28 is an explanatory diagram of the frequency folding operation of the horizontal HPF in the encoding device of the present invention.

FIG. 29 is a diagram showing another one-dimensional scan in the present invention.

FIG. 30 is a diagram showing another scan of a three-dimensional block in the present invention.

FIG. 31 is a diagram showing subbands of a Y signal to be encoded in the present invention.

FIG. 32: R-Y signal to be encoded in the present invention, B
FIG. 3 is a diagram showing subbands of a −Y signal.

FIG. 33 is a diagram showing another example of subbands of the Y signal to be encoded in the present invention.

FIG. 34 is a block diagram showing the internal configuration of a three-dimensional orthogonal transform circuit according to the present invention.

FIG. 35 is a block diagram showing the configuration of the encoding side of the encoding device according to the present invention.

FIG. 36 is a block diagram showing the configuration of the decoding side of the encoding device according to the present invention.

37 is a block diagram showing the internal configuration of the subband division circuit in FIG. 35. FIG.

38 is a block diagram showing the internal configuration of the subband synthesis circuit in FIG. 36. FIG.

39 is a block diagram showing the internal configuration of the determination circuit in FIG. 35. FIG.

FIG. 40 is a block diagram showing another internal configuration of the determination circuit in FIG. 35;

41 is a conceptual diagram for explaining the operation of the sub-blocking circuit in FIGS. 39 and 40. FIG.

42 is a conceptual diagram for explaining the operation of the control signal generator in FIGS. 39 and 40. FIG.

FIG. 43 is a block diagram showing the configuration of the encoding side of the encoding device according to the present invention.

44 is a block diagram showing the internal configuration of the determination circuit in FIG. 43. FIG.

45 is a block diagram showing another internal configuration of the subband division circuit in FIG. 17. FIG.

46 is a block diagram showing another internal configuration of the subband synthesis circuit in FIG. 18. FIG.

FIG. 47 is a diagram showing spatial sampling positions in the present invention.

FIG. 48 is a conceptual diagram showing the configuration of a three-dimensional block in the present invention.

FIG. 49 is a block diagram showing the configuration of the encoding side of the encoding device according to the present invention.

FIG. 50 is a diagram showing weighting of the weighting circuit in FIG. 49;

FIG. 51 is a block diagram showing the configuration of a subband division circuit in the present invention.

FIG. 52 is a block diagram showing the configuration of a subband synthesis circuit in the present invention.

53 is a conceptual diagram for explaining the operation of the subband division/synthesis circuit shown in FIGS. 51 and 52. FIG.

FIG. 54 is a block diagram showing another configuration of the subband division circuit in the present invention.

FIG. 55 is a block diagram showing another configuration of the subband synthesis circuit according to the present invention.

56 is a conceptual diagram for explaining the operation of the subband division/synthesis circuit shown in FIGS. 54 and 55. FIG.

[Explanation of symbols]

5 Subband division circuit 6 Three-dimensional orthogonal transformation circuit 7 Encoder 42 Orthogonal transformation circuit 43 Judgment value calculation circuit 44 Determiner 51 Subband division circuit 52 Blocking circuit 52a Blocking circuit 52b Blocking circuit 52c Blocking circuit 52d Blocking Circuit 53 Orthogonal transformation circuit 53a Orthogonal transformation circuit 53b Orthogonal transformation circuit 53c Orthogonal transformation circuit 53d Orthogonal transformation circuit 54a Weighting circuit 54b Weighting circuit 54c Weighting circuit 54d Weighting circuit 55a Variable length encoding circuit 55b Variable length encoding circuit 55c Variable length encoding Circuit 55d Variable length encoding circuit 56 Quantization circuit 57 Encoding circuit 58 Determination circuit 58a Determination circuit 71 Folded image addition circuit 72 Horizontal LPF 73 Horizontal HPF 74a Horizontal 2:1 subsampling circuit 74b Horizontal 2:1 subsampling circuit 74c Horizontal 2:1 subsampling circuit 77 Folded image addition circuit 78 Folded image addition circuit 79a Horizontal 1:2 interpolation circuit 79b Horizontal 1:2 interpolation circuit 79c Horizontal 1:2 interpolation circuit 80 Horizontal LPF 81 Horizontal HPF 84 Folded image addition circuit 85 Horizontal LPF 86 Horizontal HPF 87a Folded image addition circuit 87b Folded image addition circuit 88 Horizontal LPF 89 Horizontal HPF 581 Sub-blocking circuit 582 Arithmetic unit 583 Minimum value detector 584 Maximum value detector 587a Comparator 587b Comparator 588 Control signal generator 588a Control signal generator 589a Absolute value calculation circuit 589b Absolute value calculation circuit 591 Maximum value detector in subblock 592 Control signal generator

Claims (18)

[Claims] 1. An encoding method for encoding a digital image signal, comprising the steps of dividing the digital image signal into image signals of a plurality of subbands, and dividing the image signal of each subband into two-dimensional or more , a step of performing orthogonal transformation on each block to obtain transform coefficients, and a step of one-dimensionally scanning and encoding the obtained transform coefficients. An encoding method characterized in that the starting position of the one-dimensional scanning of transform coefficients is changed depending on the band. 2. An encoding method for encoding a digital image signal, comprising the steps of dividing the digital image signal into image signals of a plurality of subbands, and dividing the image signal of each subband into blocks for each of a plurality of pixels. the steps of thinning out some of the blocks, performing orthogonal transformation on each of the remaining blocks to obtain transform coefficients, and encoding the obtained transform coefficients. encoding method. 3. An encoding method for encoding a digital image signal, comprising the steps of dividing the digital image signal into image signals of a plurality of subbands, and dividing the image signal of each subband into blocks for each of a plurality of pixels. determining the activity of the image signal in each blocked block; determining whether each block is a valid image block based on the activity; and performing orthogonal transformation on each blocked block. 1. A coding method comprising the steps of: obtaining transform coefficients by performing a step of applying a transform coefficient to a valid image block; and a step of coding only transform coefficients in a valid image block. 4. A coding method for quantizing and coding a digital image signal, comprising the steps of dividing the digital image signal into image signals of a plurality of subbands, and dividing the image signal of each subband into image signals of a plurality of pixels. A step of creating a block, a step of performing orthogonal transformation on each block to obtain transform coefficients, and a step of converting one quantization table from multiple quantization tables with different quantization step widths based on pixel values in high-band blocks. 1. An encoding method comprising the steps of: selecting a quantization table; and quantizing and encoding obtained transform coefficients according to the selected quantization table. 5. An encoding method for encoding an interlaced scanning digital image signal, comprising: passing one of an odd field and an even field of the digital image signal through a vertical filter with odd taps; passing the other of the odd and even fields of the signal through a vertical filter with even taps; configuring a two-dimensional block in the horizontal and vertical directions within each field using the output signals from both vertical filters; composing a 3-dimensional block by combining 2-dimensional blocks for multiple fields in the time direction; performing orthogonal transformation on the constructed 3-dimensional block to obtain transform coefficients; and encoding the obtained transform coefficients. An encoding method comprising: 6. An encoding method for encoding a digital image signal, comprising the steps of dividing the digital image signal into image signals of a plurality of subbands, and dividing the image signal of each subband into blocks for each of a plurality of pixels. a step of performing orthogonal transformation on each divided block to obtain transform coefficients; and a step of applying weighting to the obtained transform coefficients so that the weighting for each subband is continuous in the frequency direction. , and encoding the weighted transform coefficients. 7. In a subband division/synthesis method of dividing a digital image signal into subbands and synthesizing the divided digital image signals, an image signal folded back at an end point of the digital image signal is connected to this end point. passing the image signal to which the aliased image signal is connected through a first low-pass filter with an even number of taps; and thinning out the output from the first low-pass filter at a ratio of 2:1 to
obtaining an output signal; passing the image signal to which the aliased image signal is connected through a first high-pass filter with an even number of taps; and passing the output from the first high-pass filter into two.
: decimating to 1 to obtain a second output signal, connecting the image signal folded back at the end point of the first output signal to this end point, and adding 0 to the first output signal to which the folded image signal is connected. a step of interpolating to double the number of pixels, a step of passing the image signal after 0 interpolation through a second low-pass filter with an even number of taps, and folding back at the end point of the second output signal to obtain each pixel value. A step of connecting the image signal multiplied by -1 to this end point, a step of interpolating 0 to the second output signal to which the aliased image signal is connected to double the number of pixels, and an image signal after 0 interpolation. passing through a second high-pass filter with an even number of taps; and combining the output of the second low-pass filter and the output of the second high-pass filter.・Synthesis method. 8. In a subband division/synthesis method of dividing a digital image signal into subbands and synthesizing the divided digital image signals, an image signal obtained by subtracting one pixel from an image signal folded back at an end point of the digital image signal. to this end point, passing the image signal to which the aliased image signal is connected through a first low-pass filter with an odd number of taps, and decimating the output from the first low-pass filter by 2:1. to obtain a first output signal; passing the image signal to which the aliased image signal is connected through a first high-pass filter with an odd number of taps; and thinning the output from the first high-pass filter at a ratio of 2:1. obtaining a second output signal by interpolating 0 to the first output signal to double the number of pixels; a step of connecting the reduced image signal to this end point; a step of passing the image signal to which the aliased image signal is connected to a second low-pass filter with an odd number of taps; and interpolating 0 to the second output signal. a step of increasing the number of pixels to double the number of pixels; a step of connecting an image signal obtained by subtracting one pixel from the image signal folded back at the end point of the second output signal after zero interpolation to this end point; and an image to which the folded image signal is connected. A subband comprising the steps of passing the signal through a second high-pass filter with an odd number of taps, and combining the output of the second low-pass filter and the output of the second high-pass filter. Division/composition method. 9. An encoding device for encoding a digital image signal, further comprising: subband dividing means for dividing the digital image signal into image signals of a plurality of subbands; A code characterized by comprising a blocking means for forming blocks, an orthogonal transform means for performing orthogonal transformation on each blocked block to obtain transform coefficients, and an encoding means for encoding the obtained transform coefficients. conversion device. 10. The orthogonal transformation means includes means for determining the activity of the block of the subband obtained by the blocking means, means for determining whether the block is a valid image block based on the determined activity, and a means for determining whether the block is a valid image block based on the determined activity. 10. The encoding device according to claim 9, further comprising means for outputting transform coefficients in a block. 11. An encoding device for encoding a digital image signal, comprising: subband dividing means for dividing the digital image signal into image signals of a plurality of subbands;
A blocking means for dividing the image signal of each subband into blocks including at least the time direction for each plurality of pixels; an orthogonal transformation means for performing orthogonal transformation on each blocked block to obtain transformation coefficients; An encoding device comprising: encoding means for encoding transform coefficients. 12. An encoding device for encoding a digital image signal, comprising subband dividing means for dividing the digital image signal into image signals of a plurality of subbands;
A blocking means blocks the image signal of each subband into three-dimensional blocks for each plurality of pixels; an orthogonal transform means performs three-dimensional orthogonal transformation on each blocked block to obtain transform coefficients; 1. An encoding device comprising: encoding means for encoding transformed transform coefficients. 13. A coding device for coding an interlaced scanning digital image signal, comprising: a first vertical filter with odd taps that passes one of an odd field and an even field of the digital image signal; a second vertical filter with even taps that passes the other of the odd field and even field, and blocking that blocks the image signals output from the first and second vertical filters into three-dimensional blocks for each of a plurality of pixels. an orthogonal transform means for performing three-dimensional orthogonal transform on each divided block to obtain transform coefficients; and an encoding device for encoding the obtained transform coefficients. . 14. An encoding device for encoding a digital image signal, comprising subband dividing means for dividing the digital image signal into image signals of a plurality of subbands;
Blocking means for dividing the image signal of each subband into blocks for each plurality of pixels, orthogonal transformation means for performing orthogonal transformation on each blocked block to obtain transform coefficients, and weighting for the obtained transform coefficients. What is claimed is: 1. An encoding device comprising: weighting means for performing the weighting process; and encoding means for encoding the output of the weighting means. 15. The encoding apparatus according to claim 14, wherein the weighting means applies weighting so that the weighting for each subband is continuous in the frequency direction. 16. An encoding device for encoding a digital image signal, comprising: subband dividing means for dividing the digital image signal into image signals of a plurality of subbands;
A blocking means for dividing the image signal of each subband into blocks for each plurality of pixels, an orthogonal transformation means for performing orthogonal transformation on each blocked block to obtain transform coefficients, and a plurality of codes corresponding to each subband. 1. An encoding device comprising encoding means for encoding obtained transformation coefficients based on an encoding table selected from the encoding tables. 17. An encoding device for encoding a digital image signal, comprising subband dividing means for dividing the digital image signal into image signals of a plurality of subbands;
Blocking means for dividing the image signal of each subband into blocks for each plurality of pixels, orthogonal transformation means for performing orthogonal transformation on each blocked block to obtain transform coefficients, and weighting for the obtained transform coefficients. and encoding means that has a plurality of encoding tables corresponding to each subband and encodes the output of the weighting means based on the encoding table selected from these. encoding device. 18. An encoding/decoding device that encodes an input digital image signal and decodes the encoded data to obtain a digital image signal, wherein the digital image signal is converted into image signals of a plurality of subbands. subband dividing means for dividing, blocking means for dividing the image signal of each subband into blocks for each plurality of pixels, orthogonal transformation means for performing orthogonal transformation on each blocked block to obtain transform coefficients; an encoding means for encoding the obtained transform coefficients; a decoding means for decoding the encoded data to obtain transform coefficients; and a decoding means for decoding the encoded data to obtain transform coefficients; 1. An encoding/decoding device comprising: inverse orthogonal transform means for obtaining the digital image signal; and subband synthesis means for synthesizing image signals of a plurality of subbands to obtain the digital image signal.