JPH0436495B2 - - Google Patents
Info
- Publication number
- JPH0436495B2 JPH0436495B2 JP58240393A JP24039383A JPH0436495B2 JP H0436495 B2 JPH0436495 B2 JP H0436495B2 JP 58240393 A JP58240393 A JP 58240393A JP 24039383 A JP24039383 A JP 24039383A JP H0436495 B2 JPH0436495 B2 JP H0436495B2
- Authority
- JP
- Japan
- Prior art keywords
- level
- waveform
- circuit
- input signal
- data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000007493 shaping process Methods 0.000 claims description 12
- 238000001514 detection method Methods 0.000 claims description 11
- 230000003111 delayed effect Effects 0.000 claims description 8
- 238000010586 diagram Methods 0.000 description 7
- 238000000034 method Methods 0.000 description 4
- 230000005540 biological transmission Effects 0.000 description 3
- 238000007796 conventional method Methods 0.000 description 2
- 238000004891 communication Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000007257 malfunction Effects 0.000 description 1
- 230000001105 regulatory effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/10—Frequency-modulated carrier systems, i.e. using frequency-shift keying
- H04L27/14—Demodulator circuits; Receiver circuits
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
Description
【発明の詳細な説明】
発明の技術分野
本発明は、MSK（Minimum Shift Keying）
信号を遅延検波する復調回路に関し、特に無変調
信号入力時の誤動作を防止しようとするものであ
る。[Detailed Description of the Invention] Technical Field of the Invention The present invention relates to MSK (Minimum Shift Keying)
This invention relates to a demodulation circuit that performs delayed detection of signals, and is intended to prevent malfunctions particularly when an unmodulated signal is input.
従来技術と問題点
位相連続FSK（Frequency Shift Keying）の
一種で変調率0.5のMSK変調方式は、例えば第１
図ａに示す符号列の“１”に対して1200Hzの波形
を、また“０”に対して1800Hzの波形を位相連続
で割り当てることにより同図ｂの送信信号を得
る。ｃは受信信号で、伝送歪等がなければｂの波
形と同じである。この受信信号ｃは第２図の受信
BPF（バンドパスフイルタ）１を通して第１の波
形整形回路２に導びかれ、ここでデジタル波形ｄ
に変換される。これが第１図ｄの波形である。Conventional technology and problems The MSK modulation method, which is a type of phase continuous FSK (Frequency Shift Keying) and has a modulation rate of 0.5, is
By assigning a 1200 Hz waveform to "1" and a 1800 Hz waveform to "0" in a continuous phase of the code string shown in FIG. c is a received signal, which has the same waveform as b if there is no transmission distortion or the like. This received signal c is the reception signal shown in Fig. 2.
is guided through a BPF (band pass filter) 1 to a first waveform shaping circuit 2, where the digital waveform d
is converted to This is the waveform shown in FIG. 1d.
MSK復調方式には種々のものがあるが、遅延
検波方式では遅延検波回路３においてデジタル波
形ｄを送信符号列の１ビツトに相当する時間遅延
させ、これと原デジタル波形ｄのEOR（排他的論
理和）をとつて、その結果生じた微小なヒゲを受
信LPF（ローパスフイルタ）４で除去し、更にな
まつた波形を第２の波形整形回路５でデジタル波
形ｅに整形する方法をとる。この波形ｅが第１図
ｅに示す復調出力で、符号誤りがなければ同図ａ
の送信データに一致する。 There are various MSK demodulation methods, but in the delayed detection method, the digital waveform d is delayed by a time corresponding to one bit of the transmission code string in the delay detection circuit 3, and the EOR (exclusive logic) of this and the original digital waveform d is A method is adopted in which the resulting minute whiskers are removed by a receiving LPF (low pass filter) 4, and the rounded waveform is further shaped into a digital waveform e by a second waveform shaping circuit 5. If this waveform e is the demodulated output shown in Figure 1e, and there is no code error, then
matches the sent data.
ところで強電界の状態でデータ伝送を行う場
合、受信信号が無変調のとき（データがない部
分）はその残留ノイズが第１図ｆのような波形に
なる。この波形の振幅は同図ｃの1/20程度と小さ
いが、波形整形回路２の反転レベル（スレツシヨ
ルドレベル）がBPF１出力の直流レベルDCに一
致していると、波形整形出力はあかもデータがあ
るかの如くに１，０に変化する。勿論、これはラ
ンダムであるが、問題はこのようなランダムパル
スの復調出力中にフレームパターンが誤検出され
ると、パーソナル無線の場合誤受信の原因とな
る。 By the way, when data is transmitted under a strong electric field, when the received signal is unmodulated (a portion where there is no data), the residual noise has a waveform as shown in FIG. 1(f). The amplitude of this waveform is small, about 1/20 of that of c in the same figure, but if the inversion level (threshold level) of waveform shaping circuit 2 matches the DC level DC of BPF 1 output, the waveform shaping output will be very low. Changes to 1, 0 as if there is data. Of course, this is random, but the problem is that if a frame pattern is erroneously detected during the demodulation output of such a random pulse, it will cause erroneous reception in the case of a personal radio.
第３図ａはパーソナル無線のデータフオーマツ
トで、１フレーム（200mS）は１，０を繰り返す
40mSのビツト同期パターン、15ビツトのフレー
ムパターンＦ、そしてデータ部からなる。パーソ
ナル無線ではフレームパターンＦの14ビツト正常
に検出されるとそれ以後をデータとして受けるの
で、前述したランダムパルスからフレームパター
ンを誤検出するとそれ以降をデータとして誤受信
することは明らかである。第３図ｂは無変調部分
の一部にランダムパルスによるフレームパターン
F′が含まれていることを示す例である。この場合
は、F′を検出した時点からそれ以降をデータとし
て受信するが、そこはビツト同期パターン等であ
るので、正規の交信は期待できない。 Figure 3a shows the personal radio data format, where one frame (200mS) repeats 1 and 0.
It consists of a 40mS bit synchronization pattern, a 15-bit frame pattern F, and a data section. In a personal radio, when the 14 bits of frame pattern F are normally detected, the subsequent bits are received as data, so it is clear that if the frame pattern is erroneously detected from the random pulse described above, the subsequent portions will be erroneously received as data. Figure 3b shows a frame pattern with random pulses in part of the non-modulated part.
This is an example showing that F′ is included. In this case, the data from the time when F' is detected is received as data, but since this is a bit synchronization pattern, regular communication cannot be expected.
このような問題を解決するため、従来はフレー
ムパターンＦに先立つビツト同期パターンも検出
し、両者が検出されたときに初めてデータとして
受け入れる様にする方式がある。しかし、このよ
うにすると逆にビツト同期パターンを正常に検出
できないと、以後にフレームパターンＦが正規に
ある場合でもこれを検出することができず、従つ
て正規のデータを受けることができない欠点があ
る。また、ビツト同期パターンを検出する回路の
構成が複雑である難点もある。 In order to solve this problem, there is a conventional method in which a bit synchronization pattern preceding frame pattern F is also detected, and only when both are detected is the bit synchronization pattern accepted as data. However, in this case, if the bit synchronization pattern cannot be detected normally, it will not be possible to detect the frame pattern F even if it exists in the future, and therefore it will not be possible to receive the regular data. be. Another disadvantage is that the circuit for detecting the bit synchronization pattern has a complicated configuration.
発明の目的
本発明は、遅延検波前の波形整形に際し、反転
レベルと入力信号との間にオフセツト電圧を設定
して残留ノイズは検出しないようにすることによ
り、簡単な回路構成で上述した欠点を除去しよう
とするものである。Purpose of the Invention The present invention solves the above-mentioned drawbacks with a simple circuit configuration by setting an offset voltage between the inverted level and the input signal so that residual noise is not detected during waveform shaping before delayed detection. This is what we are trying to remove.
発明の構成
本発明は、受信したMSK信号をバンドパスフ
イルタを通して波形整形回路に与え、該回路でデ
ジタル波形に変換した後遅延検波するMSK復調
回路において、該波形整形回路の反転レベルと入
力信号の直流レベルとの間に、該入力信号の残留
ノイズのレベル以上且つ該入力信号の振幅の1/2
以下の範囲に定められるオフセツト電圧を設定す
るレベルシフト回路を設けたことを特徴とする
が、以下図示の実施例を参照しながらこれを詳細
に説明する。Composition of the Invention The present invention provides an MSK demodulation circuit that applies a received MSK signal to a waveform shaping circuit through a bandpass filter, converts it into a digital waveform, and then performs delayed detection. between the DC level and the level of the residual noise of the input signal and 1/2 of the amplitude of the input signal.
The present invention is characterized in that it includes a level shift circuit that sets an offset voltage within the following range, which will be described in detail below with reference to the illustrated embodiment.
発明の実施例
第４図は本発明の一実施例を示す構成図で、第
１図と同一部分には同一符号が付してある。本例
では受信BPF１と波形整形回路２の間に、波形
整形回路２への入力信号の直流レベルを該回路２
の反転レベル（スレツシヨルドレベル）より低く
（逆でもよい）するレベルシフト回路６を設けて
ある。具体的には反転レベルはVDD／２である
が、非反転入力に加えられる入力信号の直流レベ
ルDCは抵抗R1，R2の分圧比で定まる値に低下さ
せられている。この分圧比によるオフセツト電圧
VOS＝VDD／２−DCが第１図ｆの残留ノイズの振
幅を越えればノイズによるランダムパターンは再
生しない。しかし、オフセツト電圧VOSが大きす
ぎると正規の信号に対する復調パターンのデユー
テイが変化し過ぎて送信データを再生できない。Embodiment of the Invention FIG. 4 is a block diagram showing an embodiment of the present invention, in which the same parts as in FIG. 1 are given the same reference numerals. In this example, the DC level of the input signal to the waveform shaping circuit 2 is connected between the receiving BPF 1 and the waveform shaping circuit 2.
A level shift circuit 6 is provided which lowers (or vice versa) the inversion level (threshold level) of . Specifically, the inversion level is V DD /2, but the DC level DC of the input signal applied to the non-inversion input is lowered to a value determined by the voltage division ratio of the resistors R 1 and R 2 . Offset voltage due to this voltage division ratio
If V OS =V DD /2-DC exceeds the amplitude of the residual noise shown in FIG. 1f, the random pattern due to noise will not be reproduced. However, if the offset voltage V OS is too large, the duty of the demodulation pattern for the normal signal changes too much, making it impossible to reproduce the transmitted data.
そこで、オフセツト電圧VOSの設定幅を受信入
力信号の振幅Ｈの1/200〜1/2とする。オフセツト
電圧VOSの下限Ｈ／20は、残留ノイズの振幅に相
当する。その理由は残留ノイズの一部を波形整形
しても連続したランダムパターンとはならないの
で、フレームパターンと誤る確率は著しく低下す
るからである。これに対し、オフセツト電圧VS
の上限Ｈ／２は符号誤り率との関係で規制され
る。第５図〜第９図はこれを波形上で示すもの
で、各図のＡは入力信号の直流レベルDCと反転
レベルVDD／２との間のオフセツト電圧VOSを入
力信号の振幅Ｈとの関係で示したものである。即
ち、第５図はOS＝０、第６図はVOS＝Ｈ／10、第
７図はVOS＝Ｈ／４、第８図はVOS＝Ｈ／２、第
９図はVOS＝3H／４である。また各図のＢは波形
整形回路２の出力、Ｃはそれを遅延検波回路３で
１ビツトシフトしたもの、Ｄは波形Ｂ，Ｃの
EOR出力、従つて遅延検波出力である。 Therefore, the setting range of the offset voltage V OS is set to 1/200 to 1/2 of the amplitude H of the received input signal. The lower limit H/20 of the offset voltage V OS corresponds to the amplitude of the residual noise. The reason for this is that even if a part of the residual noise is waveform-shaped, it will not become a continuous random pattern, so the probability of mistaking it for a frame pattern is significantly reduced. On the other hand, the offset voltage V S
The upper limit H/2 is regulated in relation to the bit error rate. Figures 5 to 9 show this on the waveform. A in each figure is the offset voltage V OS between the DC level DC of the input signal and the inverted level V DD /2, and the amplitude H of the input signal. This is shown in relation to That is, OS = 0 in Figure 5, V OS = H/10 in Figure 6, V OS = H/4 in Figure 7, V OS = H/2 in Figure 8, and V OS = H/2 in Figure 9. It is 3H/4. In each figure, B is the output of the waveform shaping circuit 2, C is the output shifted by 1 bit by the delay detection circuit 3, and D is the output of the waveforms B and C.
This is the EOR output, and therefore the delayed detection output.
この遅延検波出力Ｄに送信データの情報が含ま
れているが、同時に検波時のノイズ（ヒゲ）Ｎが
あるので、これを次段のLPF４で除去する必要
がある。VOSの上限はこのノイズＮの除去に際
し、データが欠落しないことである。一例として
第５図ＤのスペースS1，S2とその間のマークM1
に注目すると、このマーク部分が第６図Ｄではノ
イズ（ヒゲ）ＮによつてM11とM12に分割される
が、ノイズＮは充分に細い（周波数が高い）ので
LPF４での除去が可能である。しかし、第９図
ＤではこのノイズＮの幅と両端のマークM11，
M12の幅が同様になるので、ノイズＮを除去しよ
うとすればマークM11，M12も欠落する。第７図
Ｄ或いは第８図Ｄはこの中間で、LPF４の定数
設定でノイズＮが除去できる。 This delayed detection output D contains information on the transmission data, but at the same time there is noise (whisker) N during detection, which must be removed by the next stage LPF 4. The upper limit of V OS is that no data is lost when this noise N is removed. As an example, the spaces S 1 and S 2 in Figure 5D and the mark M 1 between them
If you pay attention to , this mark part is divided into M 11 and M 12 by the noise (whisker) N in Figure 6D, but since the noise N is sufficiently thin (high frequency),
Removal is possible with LPF4. However, in FIG. 9D, the width of this noise N and the marks M 11 at both ends,
Since the widths of M 12 are the same, if noise N is removed, marks M 11 and M 12 will also be missing. FIG. 7D or FIG. 8D is in the middle, and the noise N can be removed by setting the constant of LPF4.
発明の効果
以上述べたように本発明によれば、簡単なレベ
ルシフト回路を追加するだけで残留ノイズによる
影響を除去でき、しかも正規のデータ受信には支
障のないMSK復調回路が構成できる利点がある。Effects of the Invention As described above, the present invention has the advantage that the influence of residual noise can be removed by simply adding a simple level shift circuit, and an MSK demodulation circuit that does not interfere with normal data reception can be constructed. be.
第１図はMSK方式の波形図、第２図は従来の
MSK復調回路の一例を示すブロツク図、第３図
はパーソナル無線のデータフオーマツトの説明
図、第４図は本発明の一実施例を示すブロツク
図、第５図〜第９図はオフセツト電圧を異ならせ
た動作波形図である。
図中、１は受信バンドパスフイルタ、２は波形
整形回路、３は遅延検波回路、６はレベルシフト
回路である。
Figure 1 is a waveform diagram of the MSK method, and Figure 2 is a waveform diagram of the conventional method.
A block diagram showing an example of an MSK demodulation circuit, FIG. 3 is an explanatory diagram of a data format for personal radio, FIG. 4 is a block diagram showing an embodiment of the present invention, and FIGS. 5 to 9 show offset voltages. It is a diagram of different operation waveforms. In the figure, 1 is a reception bandpass filter, 2 is a waveform shaping circuit, 3 is a delay detection circuit, and 6 is a level shift circuit.
Claims (1)
通して波形整形回路に与え、該回路でデジタル波
形に変換した後遅延検波するMSK復調回路にお
いて、該波形整形回路の反転レベルと入力信号の
直流レベルとの間に、該入力信号の残留ノイズの
レベル以上且つ該入力信号の振幅の1/2以下の範
囲に定められるオフセツト電圧を設定するレベル
シフト回路を設けたことを特徴とするMSK復調
回路。1. In an MSK demodulation circuit that applies the received MSK signal to a waveform shaping circuit through a bandpass filter, converts it into a digital waveform, and then performs delayed detection, there is a difference between the inversion level of the waveform shaping circuit and the DC level of the input signal. An MSK demodulation circuit comprising: a level shift circuit that sets an offset voltage within a range that is above the level of residual noise of the input signal and below 1/2 the amplitude of the input signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP24039383A JPS60130953A (en) | 1983-12-19 | 1983-12-19 | Msk demodulating circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP24039383A JPS60130953A (en) | 1983-12-19 | 1983-12-19 | Msk demodulating circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60130953A JPS60130953A (en) | 1985-07-12 |
| JPH0436495B2 true JPH0436495B2 (en) | 1992-06-16 |
Family
ID=17058809
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP24039383A Granted JPS60130953A (en) | 1983-12-19 | 1983-12-19 | Msk demodulating circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60130953A (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5685962A (en) * | 1979-12-14 | 1981-07-13 | Nippon Telegr & Teleph Corp <Ntt> | Demodulating circuit |
-
1983
- 1983-12-19 JP JP24039383A patent/JPS60130953A/en active Granted
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5685962A (en) * | 1979-12-14 | 1981-07-13 | Nippon Telegr & Teleph Corp <Ntt> | Demodulating circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS60130953A (en) | 1985-07-12 |
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