JPH04351176A - Noise reducing circuit - Google Patents

Abstract

PURPOSE:To reduce noise in a moving image signal by providing a noise reduction means reducing a transmission noise included in a moving image processing signal and a noise reduction means reducing the noise of a high frequency component included in the noise reduction means. CONSTITUTION:A MUSE moving picture signal introduced to an input terminal 1 is inputted to a noise coring circuit 33, in which a transmission noise near 8.1MHz is eliminated. Moreover, the noise is inputted to a variable tap length mean value filter 34, in which a high frequency component noise near 16.2MHz is eliminated. That is, a a noise being a high frequency component shown in longitudinal strip lines is eliminated and an original video signal including transmission noise is processed by a noise coring circuit 33 comprising a horizontal filter 2 and a nonlinear circuit 3 and the transmission noise near 8.1MHz is reduced, However, the high frequency component noise near 16.2MHz is still resident. Then the signal is processed by the variable tap length mean value filter 34 to eliminate the noise of the high frequency component.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a noise reduction circuit for processing moving picture signals of a MUSE decoder, and particularly focuses on noise reduction of high frequency components.

0002

[Prior Art] Japan's high-definition television broadcasting system is MUSE (Multiple Sub-Nyquis).
The configuration of the MUSE decoder is well known (TV Magazine, 43, 12, pp1349-
1354).

FIG. 4 shows a characteristic diagram for explaining the processing of the MUSE video signal. In the figure, the vertical axis shows the video signal level, and the horizontal axis shows the horizontal frequency. In a high-definition television signal, the baseband signal band of a video signal has a horizontal frequency of 16
．． The frequency is 2MHz. Therefore, the MUSE encoder performs line offset subsampling to increase the horizontal frequency of the transmission signal band by 8, as shown in FIG.
．． It is compressed to 1MHz and transmitted. The band-compressed high-definition television signal is input to the intra-field interpolation filter that constitutes the MUSE decoder, and as shown in FIG. .

FIG. 5 shows a moving picture signal processing section of the MUSE decoder. A band-compressed high-definition television signal 126 is introduced into the input terminal 29 . The signal 126 is input to the intrafield interpolation filter 30 and the original 1
The band is returned to 6.2 MHz. The output 100 of the intra-field interpolation filter 30 is input to the horizontal filter 2 configuring the noise coring circuit 33 .

FIG. 6 shows the characteristics of the horizontal filter 2. As shown in the figure, the horizontal filter 2 has a horizontal frequency of 8.1
A signal 101 having a characteristic of having a passband around MHz is extracted from the signal 100 in the band shown in FIG. 4(c) around 8.1 MHz. Here, the horizontal frequency is 8.1MHz
As shown in FIG. 4(b), the vicinity is the maximum frequency of the transmission signal, and the largest amount of transmission noise is mixed in when frequency modulated and transmitted. The signal 101 is the nonlinear circuit 3
is input.

FIG. 7 shows the characteristics of the nonlinear circuit 3. As shown in the figure, the nonlinear circuit 3 determines that the portion where the input signal level is high is a video signal and outputs 0, and determines that the portion where the input signal level is low is noise and outputs 0. Outputs a value of a predetermined size with the opposite sign.

A control signal 128 for controlling the nonlinear circuit 3 is obtained by mixing a transmission noise level signal 126 and a noise reduction control signal 127 in a mixing circuit 31. The transmission noise level signal 126 is a signal for receiving a signal sent with a constant value from the sending side, such as a clamp level, and detecting the amount of noise based on the variation of the signal, and is a signal for detecting the amount of noise based on the variation of the signal.
27 is a signal included in the control signal added by the MUSE encoder. Output 102 of nonlinear circuit 3
is input to the adder 4 and added to the original video signal 100, and the signal 103 with reduced transmission noise is sent to the output terminal 3.
2.

By the way, in the still image signal processing of the MUSE decoder, noise is removed by adding signals in the time direction using a field memory. It is also possible to reduce high frequency component noise contained in the image. However, as is clear from the characteristics of the horizontal filter 2 shown in FIG. 6, the noise coring circuit that removes noise in video signal processing cannot remove the high frequency component noise shown by the vertical striped line in FIG. 4(a). Therefore, the output signal of the MUSE decoder has a problem in that more noise remains in the moving image portion than in the still image portion.

[0009]

[Problems to be Solved by the Invention] As explained above, the noise recoring circuit in the video signal processing of the conventional MUSE decoder removes even the high-frequency component noise contained in the high-quality television signal that is the MUSE signal source. The problem was that I couldn't do it.

[0010] Therefore, this invention was made to solve the above-mentioned problems, and as a noise removal process performed in the video signal processing of the MUSE decoder, it is possible to remove not only the noise around 8.1 MHz but also the high frequency included in high-definition television signals. It is an object of the present invention to provide a noise reduction circuit that can also reduce component noise.

[0011]

[Means for Solving the Problems] The present invention provides a first method for processing a high-definition television signal band-compressed by offset subsampling that goes around in n fields, and reducing transmission noise contained in the processed video signal. and a second noise reduction means for reducing high frequency component noise included in the first noise reduction means.

0012

[Operation] According to the above means, among the MUSE video signals,
Transmission noise around 8.1 MHz is reduced by the first noise reduction means, and high frequency component noise around 16.2 MHz is further reduced by the second noise reduction means.

[0013]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Examples of the present invention will be described below with reference to the drawings.

FIG. 1 shows an embodiment of a noise reduction circuit according to the present invention. The difference in FIG. 1 from the circuit shown in FIG. 5 is that a noise coring circuit 33 and a variable tap length average value filter noise reduction circuit 34 are connected in cascade, and the same parts are given the same reference numerals and their explanations are omitted. do.

An intra-field interpolated moving image signal is input to the input terminal 1, and this signal 100 is input to a noise coring circuit 33 composed of a horizontal filter 2, a nonlinear circuit 3, and an adder 4.

In this case, the signal for controlling the nonlinear circuit 3 is only the transmission noise level signal 126 without using the noise reduction control signal. This is because the noise that can originally be removed by the noise coring circuit 33 is 8. shown in FIG.
This is because it is limited to transmission noise around 1 MHz. A noise reduce control signal for removing high frequency components included in a high-definition television signal is input to a variable tap length average value filter 34, which will be described next.

The output 103 of the noise coring circuit 33 is converted into a 1 unit time delay signal 110 and a 2 unit time delay signal 111 through the unit delay elements 12 and 13 that constitute the variable tap length average value filter noise reduction circuit 34 in series. Become. Signals 103 and 110 are input to adder 15. The output 114 of the adder 15 is input to the coefficient unit 18 and becomes an average value output 115. Similarly, the signals 110 and 111 are input to the adder 14, and the output 112 of the adder 14 is input to the coefficient unit 117 and becomes the average value output 113. Furthermore,
Signals 112 and 103 are input to an adder 16, and the output 116 of the adder 16 is input to a coefficient unit 119 to generate a signal 1.
The average value output of 03, 110, 111 is 117. The signals 110 and 113 are respectively I and I of the selection circuit 20.
The signals 115 and 117 are input to the I and II terminals of the selection circuit 21, respectively. Selection circuit 2
0 and 21 are switched and controlled based on a control signal 109, which will be explained later.

The signals 110 and 111 are input to a subtracter 6 for subtraction, and the output 105 of the subtracter 6 is input to an absolute value circuit 8. The output 107 of the absolute value circuit 8 is the output of the comparator circuit 1.
0 and is compared with the output 125 of the threshold level generation circuit 11. The threshold level generation circuit 11 generates a threshold level 125 based on the original video signal 103 and the noise reduction control signal 127. The comparison circuit 10 receives a signal 107, that is, an absolute value signal of the difference between adjacent pixels, and a threshold level 12.
The selection circuit 20 selects the control signal 109 obtained by comparing the
, 21.

When the signal 107 is higher than the threshold level 125, the selection circuits 20 and 21 assume that a video signal such as an edge has been input, and the selection circuits 20 and 21 switch to the terminal I, and the signals 110 and 115 are input. derived. Conversely, if the signal 107 is lower than the threshold level 125, it is assumed that noise has been input, and the selection circuits 20, 21 are switched to the II terminal, and the signals 113, 1
17 is derived.

Outputs 118 and 119 of selection circuits 20 and 21
are respectively input to the I and II terminals of the selection circuit 22. The selection circuit 22 is controlled by a control signal 108 generated in the same manner as the control signal 109 by passing the signals 103 and 110 through the subtracter 5, the absolute value circuit 7, and the comparison circuit 9.

The selection circuit 22 selects the signal 10 from the absolute value circuit 7.
If 6 is greater than the threshold level 125, then
The selection circuit 22 is switched to the terminal I, and conversely the signal 10
If 6 is less than the threshold level 125, then
The video signal 120 with reduced noise is output to the output terminal 23. Therefore, each average value output is selected depending on the magnitude of the difference between adjacent pixels of the input signal, and a signal from which noise has been removed is derived.

The noise reduction effect of the above circuit will be explained below with reference to FIG. FIG. 2(a) shows the original video signal containing high frequency component noise and transmission noise shown by the vertical striped lines in FIG. This signal is processed by a noise coring circuit 33 composed of a horizontal filter 2 and a nonlinear circuit 3 having the characteristics shown in FIGS. 6 and 7, and as shown in FIG. 2(b), the transmission noise around 8.1 MHz is is reduced. However, high frequency component noise around 16.2 MHz still remains. Next, this signal is processed by a variable tap length average value filter 34 to remove high frequency component noise as shown in FIG. 2(c).

FIG. 3 shows another embodiment of the noise reduction circuit according to the present invention. The difference from the circuit shown in FIG. 1 is that the variable tap length average value filter noise reduction circuit 34 has been changed to a variable tap length low pass filter noise reduction circuit 35, and the same parts are given the same reference numerals and will be explained. omitted.

The variable tap length average value filter noise reduction circuit 34 outputs the average value of three points using adders 14-16 and coefficient units 17-19. On the other hand, the variable tap length low-pass filter noise reduction circuit 35 uses the adders 14 and 15.
, 24 and coefficient multipliers 17, 18, and 25 to form a 3-tap low-pass filter.

That is, the signals 113 and 115 are input to the adder 24 and added, the output 121 of the adder 24 is input to the coefficient unit 25, and the average value output 122 is input to the II of the selection circuit 26.
input to the terminal. Since the low-pass filter has a lower gain characteristic of high frequency components than the average value filter, it is possible to further reduce the noise of high frequency components.

[0026]

[Effects of the Invention] As explained above, according to the noise reduction circuit according to the present invention, in video signal processing of a MUSE decoder, not only transmission noise around 8.1 MHz but also 16.2 MHz included in high-quality television signals can be eliminated. It is also possible to reduce nearby high frequency component noise.

[Brief explanation of the drawing]

FIG. 1 is a configuration diagram showing a noise reduction circuit according to the present invention.

FIG. 2 is a diagram for explaining the noise reduction effect of the circuit shown in FIG. 1.

FIG. 3 is a configuration diagram showing another embodiment of the noise reduction circuit according to the present invention.

FIG. 4 is a diagram for explaining MUSE video signal processing.

FIG. 5 is a configuration diagram showing a conventional noise reduction circuit.

6 is a characteristic diagram for explaining the horizontal filter 2 shown in FIG. 5. FIG.

7 is a characteristic diagram for explaining the nonlinear circuit 3 shown in FIG. 5. FIG.

[Explanation of symbols]

1...Input terminal, 2...Horizontal filter, 3...Nonlinear circuit, 4
, 14-16, 24...Adder, 5, 6...Subtractor, 7, 8
...Absolute value circuit, 9, 10... Comparison circuit, 11... Threshold level generation circuit, 12, 13... Unit delay element, 17
~19, 25... Coefficient unit, 20~22, 26, 27... Selection circuit, 33... Noise coring circuit, 34... Variable tap length average value filter, 35... Variable tap length low pass filter.

Claims (5)

[Claims] 1. A first noise reduction means for processing a high-definition television signal band-compressed by offset subsampling that goes around in n fields to reduce transmission noise contained in the processed video signal; 1. A noise reduction circuit comprising: a second noise reduction means for reducing high frequency component noise included in the first noise reduction means. 2. The second noise reduction means includes a digital filter whose tap length is variable depending on the magnitude of the difference between adjacent pixels of the input signal. Noise reduction circuit as described. 3. The second noise reduction means includes a first delay means for delaying the input signal by one unit time, and a second delay means for delaying the output of the first delay means by one unit time. , a first linear combination means for obtaining an average value of the input signal and the output of the first delay means, and a second linear combination means for obtaining an average value of the outputs of the first and second delay means. , a third linear combination means for obtaining the average value of the outputs of the input signal and the first and second delay means, and a first linear combination means for obtaining the magnitude of the difference between the outputs of the input signal and the first delay means. A difference level detection means, a second difference level detection means for obtaining the magnitude of the difference between the outputs of the first and second delay means, and a difference level detection means that detects the difference between the output of the first difference level detection means and a predetermined value. a first comparing means for comparing the output of the second difference level detecting means with the threshold level, a second comparing means for comparing the output of the second difference level detecting means with the threshold level, and based on the output of the second comparing means,
When the output of the second difference level detection means is larger than the threshold level, the output of the first delay means is selected, and in the opposite case, the output of the first linear combination means is selected. If the output of the second difference level detection means is larger than the threshold level, based on the output of the first selection means and the second comparison means, the second linear combination means a second selection means that selects the output and, in the opposite case, selects and derives the output of the third linear combination means, and based on the output of the first comparison means,
When the output of the first difference level detection means is larger than the threshold level, the output of the first selection means is selected, and in the opposite case, the output of the second selection means is selected and derived. 3. The noise reduction circuit according to claim 2, further comprising third selection means for selecting. 4. Instead of the second and third selection means, based on the output of the second comparison means, if the output of the second difference level detection means is greater than the threshold level, a fourth selection means that selects the output of the second linear combination means and, in the opposite case, selects and derives the output of the fourth linear combination means, and based on the output of the first comparison means, When the output of the first difference level detection means is larger than the threshold level, the first
and a fifth selection means for selecting the output of the selection means and, in the opposite case, selecting and deriving the output of the fourth selection means. Noise reduction circuit. 5. The threshold level is MUS
E(Multiple Sub-Nyquist Sa
4. The noise reduction circuit according to claim 3, further comprising means for changing the noise reduction control signal based on a noise reduction control signal which is a control signal of the mpling encoding signal.