JPH04349513A - Constant-voltage generating circuit - Google Patents

Abstract

PURPOSE:To obtain the constant-voltage generating circuit which generates a prescribed voltage irrespective of a temperature variation, and also, is strong against a fluctuation of a power supply voltage. CONSTITUTION:The circuit is provided with a transistor T1 which becomes a constant-current source, an impedance X1. which is connected to this transistor and has a positive temperature coefficient, a clamp diode D1, and a first and a second resistances R2, R3 which divide a voltage clamped by this diode and apply it as a bias voltage to a control electrode of the transistor. This circuit constitutes a characteristic feature of a fact that an output is obtained from a connecting point of the impedance and the transistor. Said impedance can be constituted by cascading plural pieces of FETs in which the gate and the drain are coupled directly.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a constant voltage generating circuit applied to semiconductor integrated circuits and the like.

0002

2. Description of the Related Art For example, in order for a GaAa LSI to receive a signal from a Si bipolar LSI, it is necessary to obtain a reference voltage with extremely small fluctuations corresponding to the center value of the signal level of the Si bipolar LSI. As a reference voltage generating circuit with such small fluctuations, Japanese Patent Application Laid-Open No. 61-2029
As shown in No. 1, a circuit in which a reference voltage is obtained by dividing the power supply voltage using resistors, and JP-A No. 60-2363.
24, a circuit in which a reference voltage is obtained using a circuit in which a plurality of diodes are connected in cascade and a current source is known.

0003

[Problem to be Solved by the Invention] In the former circuit of the above conventional techniques, when the power supply voltage fluctuates, this fluctuation is divided by resistors and transmitted to the reference voltage, so the reference voltage fluctuates greatly. There was a problem. In contrast, in the latter circuit, the reference voltage hardly changes even if the power supply voltage changes, but the problem is that the forward drop voltage of the diode changes with temperature, which causes the reference voltage to change significantly. was there.

SUMMARY OF THE INVENTION Accordingly, it is an object of the present invention to provide a constant voltage generating circuit that can generate a predetermined voltage regardless of temperature fluctuations and can suppress fluctuations in voltage value to a lower level than before even when power supply voltage fluctuations occur. .

[0005]

[Means for Solving the Problems] A constant voltage generating circuit according to the present invention includes a transistor serving as a constant current source, an impedance connected to the transistor and having a positive temperature coefficient,
It includes a clamping diode, and first and second resistors that divide the voltage clamped by the diode and apply it to the control electrode of the transistor as a bias voltage, so that the output is obtained from the connection point between the impedance and the transistor. It is characterized by what it did.

[0006]

[Operation] Since the constant voltage generating circuit according to the present invention is constructed as described above, when the temperature rises, the clamp voltage of the diode decreases, and the bias voltage of the transistor decreases, but the constant current flowing through the transistor decreases as the temperature rises. It has a positive temperature coefficient with respect to the current, and the decrease in constant current is not extremely large. However, the influence of a drop in the clamp voltage of the diode is significant, and the current value becomes small. However, since the impedance connected to the transistor has a positive temperature coefficient, even if the impedance increases and the current decreases,
The voltage generated by this impedance is a constant voltage.

[0007]

DESCRIPTION OF THE PREFERRED EMBODIMENTS A constant voltage generation circuit according to an embodiment of the present invention will be described below with reference to FIGS. 1 and 2 of the accompanying drawings. Figure 1
1 shows a principle diagram of a constant voltage generation circuit according to an embodiment of the present invention. FET (field effect transistor) - T1
is a transistor serving as a constant current source, and its source is connected to a power source that provides voltage VSS. The anode of the clamping diode D1 is connected to the ground potential via a resistor R1, and the cathode is supplied with VSS. The voltage VC clamped by the diode D1 is divided by the resistors R2 and R3 connected in series,
A voltage Vb is created. Voltage Vb is applied to the gate of FET-T1 and is used as a bias voltage. FET-T1
There is an impedance X between the drain of
1 is connected. An output terminal for the reference voltage Vref is drawn out from the connection point between the FET-T1 and the impedance X1. The impedance X1 is configured to have a positive temperature coefficient.

In the constant voltage generating circuit configured as described above, the clamp voltage VC of the diode D1 decreases in response to a rise in temperature, and the bias voltage Vb of the FET-T1 decreases.
decreases. On the other hand, the drain current of FET-T1 has a positive temperature coefficient and increases as the temperature rises, so the clamp voltage VC of the diode D1
Despite the decrease in , the drain current does not decrease significantly. However, in general, the fluctuation in drain current (decrease in current) caused by a decrease in bias voltage due to a decrease in clamp voltage is greater than the fluctuation in drain current (reduction in current) caused by the drain current of FET-T1 having a positive temperature coefficient. (increase in current) is greater.

However, in this embodiment, the impedance
1 has a positive temperature coefficient, the impedance value increases as the temperature rises, and the generated reference voltage Vref maintains a constant value regardless of the aforementioned drain current drop. Furthermore, with respect to fluctuations in the power supply voltage, the clamp voltage VC of the diode D1 remains almost constant, so the fluctuations in the current I1 flowing through the impedance X1 are small.
As a result, fluctuations in the generated reference voltage Vref are also reduced.

FIG. 2 shows a more specific configuration of a constant voltage generating circuit according to an embodiment of the present invention. This embodiment has almost the same configuration as the embodiment shown in FIG. 1, and the same components are given the same reference numerals as in FIG. 1, and redundant explanation will be omitted. In this example, two FET-T2 whose gate and drain are directly connected are used as the impedance X1.
, FET-T3 connected in series is used. The circuit shown in FIG. 2 is formed, for example, in a GaAs IC. T1, T2, and T3 in the figure are depletion type Schottky gate FETs (MES-FETs). Further, the diode D1 is a Schottky junction diode.

[0011] This GaAs IC is made of Si ECL (
Emitter Coupled Logic) I
Consider the case where it is used in the same system as C. Then, since the power supply voltage is specified as -5.2V and the reference voltage Vref as -1.3V in Si ECL, Figure 2
The forward voltage drop of each FET-T2 and T3 is 0.65V. On the other hand, as mentioned above, the temperature coefficient of the clamp voltage VC of the diode D1, the FET-
Considering the temperature coefficient of the drain current of T1, the FET-
The resistance due to T2 and T3 has a positive required temperature coefficient,
The design is performed so that the reference voltage Vref does not change even when the current I1 decreases. In other words, FET-T1, T2
, T3 are selected according to the above, and the ratio of the resistors R2 and R3 is selected appropriately. FET-T2
, T3 has a positive temperature coefficient, as the temperature rises, the resistance value of the resistor T2
, T3 decreases (diode D1
This is because the decrease in the clamp voltage VC of FET-T1 decreases the drain current more than due to the increase in the drain current of FET-T1. ), the reference voltage Vref maintains a substantially constant value because the resistance value increases. Even when the temperature drops, the reference voltage Vref is kept constant in the same way.

According to a computer simulation, 16 mV for a temperature change from -30°C to 90°C.
(0.13 mV/°C), and it was found that there was almost no variation. Also, the fluctuation of power supply voltage VSS △VSS
ΔVref /ΔVSS=about 8.7%, and it was found that it is resistant to fluctuations in power supply voltage.

[0013] The present invention is not limited to the above embodiments, and various modifications are possible. For example, as the impedance X1, three or more FETs whose gates and drains are directly connected may be connected in series. Further, instead of taking out the reference voltage directly from the drain of the constant current FET, a voltage dividing resistor may be provided between the drain of the FET and the ground, and the voltage dividing result may be used as the reference voltage. By doing so, a desired constant voltage can be obtained regardless of the temperature characteristics of elements such as FETs and diodes used. Furthermore, a bipolar transistor may be used instead of the FET.

[0014]

[Effects of the Invention] As explained in detail above, according to the present invention, since the impedance connected to the transistor has a positive temperature coefficient, the clamp voltage of the diode changes due to temperature change, and the bias voltage fluctuates. Even though the current flowing through the transistor cannot compensate for the current decrease due to the bias voltage fluctuation, the output voltage, which is the product of the impedance value and the current value, remains approximately constant. Furthermore, in response to fluctuations in the power supply voltage, a clamping diode works to keep the bias voltage constant, thereby suppressing fluctuations in the output voltage.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing the principle of an embodiment of the present invention.

FIG. 2 is a circuit diagram of a constant voltage circuit according to an embodiment of the present invention.

[Explanation of symbols]

D1...Diode R1, R2, R3...Resistance X1...Impedance T1, T2, T3...FET VC...clamp voltage VB...bias voltage

Claims (2)

[Claims] 1. A transistor serving as a constant current source, an impedance connected to the transistor and having a positive temperature coefficient, a clamping diode, and a voltage clamped by the diode being divided and applied to a control electrode of the transistor. 1. A constant voltage generating circuit comprising first and second resistors for applying a bias voltage, and an output is obtained from a connection point between the impedance and the transistor. 2. The impedance is configured by cascading a plurality of FETs whose gates and drains are directly connected, and the source of the FET is connected to the transistor serving as the constant current source. A constant voltage generating circuit according to claim 1.