JPH04348909A - Processing method of semiconductor wafer - Google Patents
Processing method of semiconductor waferInfo
- Publication number
- JPH04348909A JPH04348909A JP2904491A JP2904491A JPH04348909A JP H04348909 A JPH04348909 A JP H04348909A JP 2904491 A JP2904491 A JP 2904491A JP 2904491 A JP2904491 A JP 2904491A JP H04348909 A JPH04348909 A JP H04348909A
- Authority
- JP
- Japan
- Prior art keywords
- die
- semiconductor wafer
- work
- workpiece
- punch
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 20
- 238000003672 processing method Methods 0.000 title description 6
- 239000013078 crystal Substances 0.000 claims abstract description 11
- 238000004080 punching Methods 0.000 claims abstract description 11
- 238000003776 cleavage reaction Methods 0.000 claims abstract description 9
- 238000000034 method Methods 0.000 claims abstract description 9
- 230000007017 scission Effects 0.000 claims abstract description 9
- 230000003247 decreasing effect Effects 0.000 abstract 1
- 239000000126 substance Substances 0.000 abstract 1
- 235000012431 wafers Nutrition 0.000 description 15
- 238000010586 diagram Methods 0.000 description 7
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- 230000000694 effects Effects 0.000 description 2
- 230000002950 deficient Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000003780 insertion Methods 0.000 description 1
- 230000037431 insertion Effects 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
Classifications
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B28—WORKING CEMENT, CLAY, OR STONE
- B28D—WORKING STONE OR STONE-LIKE MATERIALS
- B28D5/00—Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor
- B28D5/04—Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor by tools other than rotary type, e.g. reciprocating tools
Landscapes
- Engineering & Computer Science (AREA)
- Mechanical Engineering (AREA)
- Processing Of Stones Or Stones Resemblance Materials (AREA)
Abstract
Description
【0001】0001
【産業上の利用分野】本発明は半導体ウェハーの加工方
法に係わり、特には、半導体ウェハーを加工するのに結
晶構造を利用する加工方法の改良に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of processing semiconductor wafers, and more particularly to an improvement in a method of processing semiconductor wafers that utilizes crystal structure.
【0002】0002
【従来の技術】従来、図8、図9に示すように研削方法
によって加工している。例えば、テーブル20にワーク
(シリコンウェハ)21を図示しない固定具で固定し、
ガイドフランジ22で保持されたブレード(砥石)23
がスピンドル24で回転された状態でブレード23によ
りワーク21に切り込みを与え、テーブル20によりあ
る送り速度を与えて、ワーク21を図10の被加工物の
ように約0.3mm角の大きさに研削加工している。2. Description of the Related Art Conventionally, processing has been carried out by a grinding method as shown in FIGS. 8 and 9. For example, a workpiece (silicon wafer) 21 is fixed to the table 20 with a fixture (not shown),
Blade (grindstone) 23 held by guide flange 22
While being rotated by the spindle 24, the blade 23 makes a cut into the workpiece 21, and the table 20 gives a certain feed rate to cut the workpiece 21 into a size of about 0.3 mm square like the workpiece shown in FIG. It is being ground.
【0003】0003
【発明が解決しようとする課題】しかしながら、上記従
来の半導体ウェハーの加工方法では、図5の2点鎖線に
示すように被加工物の結晶構造の劈開面角度と違った面
、すなわち六方最密構造あるいは、面心立方構造等の面
心立方(111)面を四角に切断(研削)するために、
研削面に第9図のように必ずチッピングが生ずる。
また、研削砥石と被加工物との加工が研削加工のために
砥石が被加工物を打撃の状態で切断するのでチッピング
を生ずる要因ともなっている。[Problems to be Solved by the Invention] However, in the conventional semiconductor wafer processing method described above, as shown by the two-dot chain line in FIG. In order to cut (grind) a face-centered cubic (111) surface such as a structure or a face-centered cubic structure into squares,
As shown in FIG. 9, chipping always occurs on the ground surface. In addition, since the grinding wheel and the workpiece are processed by the grinding wheel, the workpiece is cut by impact, which is a cause of chipping.
【0004】このチッピングにより被加工物が加工後に
不良品となるばかりでなく、半導体の製品になった後に
も使用中に振動などによりチッピング部から欠けて漏電
する等の問題がある。[0004] Due to this chipping, not only the workpiece becomes a defective product after processing, but even after the workpiece is made into a semiconductor product, there are problems such as chipping from the chipping part due to vibration etc. during use and leakage of electricity.
【0005】本発明は上記従来の問題点に着目し、半導
体ウェハーの加工方法に係わり、特には、半導体ウェハ
ーを加工するのに結晶構造を利用する加工方法の提供を
目的としている。The present invention focuses on the above-mentioned conventional problems and relates to a method for processing semiconductor wafers, and particularly aims to provide a processing method that utilizes crystal structure for processing semiconductor wafers.
【0006】[0006]
【課題を解決するための手段】上記目的を達成するため
には、本発明に係わる発明では面心立方構造を有する半
導体ウェハーの加工方法において、半導体ウェハーの結
晶構造の劈開面角度に沿って半導体ウェハーを打ち抜く
加工である。[Means for Solving the Problems] In order to achieve the above object, the present invention provides a method for processing a semiconductor wafer having a face-centered cubic structure, in which a semiconductor wafer is processed along a cleavage plane angle of a crystal structure of a semiconductor wafer. This process involves punching out a wafer.
【0007】[0007]
【作用】上記構成によれば、パンチ、ダイを用いて結晶
構造の劈開面の角度に合わせて打ち抜き加工を行うため
に、チッピング量が低減されるとともに加工精度が向上
する。また、加工方法が打ち抜きとなるため、加工工数
が削減でき原価を低減することができる。[Operation] According to the above structure, punching is performed using a punch and a die in accordance with the angle of the cleavage plane of the crystal structure, so that the amount of chipping is reduced and the processing accuracy is improved. Furthermore, since the processing method is punching, the number of processing steps can be reduced and the cost can be reduced.
【0008】[0008]
【実施例】以下に、本発明に係わる半導体ウェハーの加
工方法の実施例につき、図面を参照して詳細に説明する
。図1は本発明の打ち抜き治具の1実施例の全体構成図
である。図1において、ワーク(半導体ウェハ)1は、
ダイ2の上にワーク1の面心立方構造の一辺と平行な一
端を合わせて、ダイ2に配設された位置決め治具に合わ
せて固定される。ダイ2の上方には、打ち抜き形状に構
成されたカッタ刃3を有するパンチ4が配設され、図示
しないアクチュエータ等の駆動装置により、ベース5に
固設された主柱6に沿って上下方向に駆動される。
ダイ2の下方にはダイ2を保持するダイ支え7がベース
5に固設されている。ダイ2およびダイ支え7には、打
ち抜いたワーク1を下方に落とすための中空の穴が設け
られている。DESCRIPTION OF THE PREFERRED EMBODIMENTS Examples of the semiconductor wafer processing method according to the present invention will be described in detail below with reference to the drawings. FIG. 1 is an overall configuration diagram of one embodiment of the punching jig of the present invention. In FIG. 1, a workpiece (semiconductor wafer) 1 is
One end parallel to one side of the face-centered cubic structure of the work 1 is aligned on the die 2 and fixed in alignment with a positioning jig provided on the die 2. A punch 4 having a cutter blade 3 configured in a punched shape is disposed above the die 2, and is punched vertically along a main column 6 fixed to a base 5 by a drive device such as an actuator (not shown). Driven. A die support 7 for holding the die 2 is fixed to the base 5 below the die 2. The die 2 and the die support 7 are provided with hollow holes for dropping the punched workpiece 1 downward.
【0009】図2はダイ2の一例を示し、打ち抜き形状
、寸法にあわせたカッタ穴8が多数形成されている。
また、ダイ2のカッタ穴8の一辺、例えば図2では六角
形の一辺Aはダイ2に配設された位置決め治具2aと平
行に配設されている。FIG. 2 shows an example of the die 2, in which a large number of cutter holes 8 are formed to match the punched shape and dimensions. Further, one side of the cutter hole 8 of the die 2, for example, one side A of a hexagon in FIG. 2, is arranged parallel to the positioning jig 2a arranged on the die 2.
【0010】図3はパンチ4の一例を示し、打ち抜き形
状、寸法にあわせたカッタ9が多数配設されている。カ
ッタ9の一辺9aはダイ2に配設された位置決め治具2
aと平行になるように図示しない位置決め治具により、
パンチ押さえ4aに固設される。また、ワーク1には図
4、図5に示すようにその結晶構造(111面心立方構
造)の粒子に沿って平行に一端1aが切断されている。FIG. 3 shows an example of the punch 4, in which a large number of cutters 9 are arranged to match the punching shape and dimensions. One side 9a of the cutter 9 is a positioning jig 2 disposed on the die 2.
Using a positioning jig (not shown) so that it is parallel to a,
It is fixed to the punch holder 4a. Further, as shown in FIGS. 4 and 5, the workpiece 1 has one end 1a cut in parallel along the grains of its crystal structure (111 face-centered cubic structure).
【0011】図2、図3に示すカッタ穴8、カッタ9の
形状は、図5に示すようにワーク1が例えばシリコンの
場合にはその結晶構造(111面心立方構造)から劈開
面の角度(Θ)に合わせた正六角形となるように、ワー
ク1の結晶構造に合わせて形成されている。When the workpiece 1 is made of silicon, for example, the shape of the cutter hole 8 and the cutter 9 shown in FIGS. 2 and 3 is determined by the angle of the cleavage plane from its crystal structure (111 face-centered cubic structure) as shown in FIG. (Θ) is formed in accordance with the crystal structure of the workpiece 1 so as to be a regular hexagon.
【0012】図6は図1の一部拡大図であり、ダイ2に
はカッタ穴8が設けられ、また、ダイ2の位置決め治具
2aに合わせてワーク1がダイ2の中に挿入されている
。パンチ4にはワーク1の厚さより高いカッタ3が設け
られており、図示しないアクチュエータ等の駆動装置に
より下降してワーク1を打ち抜いて中空穴に落としてい
る。FIG. 6 is a partially enlarged view of FIG. 1, and the die 2 is provided with a cutter hole 8, and the workpiece 1 is inserted into the die 2 in alignment with the positioning jig 2a of the die 2. There is. The punch 4 is provided with a cutter 3 which is higher than the thickness of the workpiece 1, and is lowered by a drive device such as an actuator (not shown) to punch out the workpiece 1 and drop it into the hollow hole.
【0013】図7はワーク1の結晶構造とカッタ3およ
びダイ2の関係を示し、黒部Mはカッタ9(オス)とダ
イ2のカッタ穴8(メス)を示し、白部Nはダイ2のカ
ッタ穴8部の残部の一例を示す。FIG. 7 shows the relationship between the crystal structure of the workpiece 1, the cutter 3, and the die 2. The black area M shows the cutter 9 (male) and the cutter hole 8 (female) of the die 2, and the white area N shows the cutter hole 8 (female) of the die 2. An example of the remainder of eight cutter holes is shown.
【0014】上記構成において、次に作動を説明する。
図4に示すワーク1(例えば、シリコンウェハーの場合
には、現在では6インチ径、厚さ300から900ミク
ロンミリメートルの製品に合わせたシリコンウェハー)
の面心立方構造の一辺と平行な一端1aをダイ2の位置
決め治具2aに合わせてダイ2の中に挿入し固定させる
。次に、ダイ2の位置決め治具2aと平行になる用に固
定されたパンチ4を駆動装置により下方に押し下げてワ
ーク1を打ち抜く。打ち抜かれたワーク1はカッタ穴8
より中空穴に落ちる。これにより、ワーク1は劈開面に
沿った形状の多数の被加工物1aが得られる。The operation of the above configuration will now be explained. Work 1 shown in Figure 4 (for example, in the case of silicon wafers, silicon wafers are currently suitable for products with a diameter of 6 inches and a thickness of 300 to 900 microns)
One end 1a parallel to one side of the face-centered cubic structure is inserted into the die 2 in alignment with the positioning jig 2a of the die 2 and fixed. Next, the punch 4, which is fixed so as to be parallel to the positioning jig 2a of the die 2, is pushed down by the driving device to punch out the workpiece 1. Punched workpiece 1 has cutter hole 8
Fall into a more hollow hole. As a result, a large number of workpieces 1a having shapes along the cleavage plane are obtained as the workpiece 1.
【0015】上記実施例では六角形で説明したが、形状
は六角形に囚われることなく他の形状でも良い。また、
大きさ、厚さも上記寸法に囚われることはなくこれ以上
、以下でも良い。さらに、上記実施例では、ダイ2に位
置決め治具を配設したが、ワーク1の挿入および固定が
ワーク1の粒子が一定に配設される場合には省略しても
良い。Although the above embodiment has been described using a hexagonal shape, the shape is not limited to a hexagonal shape, and other shapes may be used. Also,
The size and thickness are not limited to the above dimensions, and may be larger or smaller. Further, in the above embodiment, a positioning jig is provided in the die 2, but the insertion and fixing of the workpiece 1 may be omitted if the particles of the workpiece 1 are arranged uniformly.
【0016】[0016]
【発明の効果】以上説明したように、本発明によれば、
パンチ、ダイを用いて結晶構造の劈開面の角度に合わせ
て打ち抜き加工を行うために、チッピング量が低減され
るとともに加工精度が向上する。加工精度は従来ではダ
イジング(研削)加工のためにチッピング量が15ミク
ロンミリメータ以上発生しているのに対して、本案の劈
開面の切断精度は原子レベル(10オングストローム)
となり、約千倍から一万倍の精度の向上が図られる。ま
た、加工方法が打ち抜きとなるため、加工工数が削減で
き原価が低減されるとともに半導体の製品になった後に
も使用中に振動などによりチッピング部から欠けて漏電
することがなくなるという優れた効果が得られる。[Effects of the Invention] As explained above, according to the present invention,
Since punching is performed using a punch and die to match the angle of the cleavage plane of the crystal structure, the amount of chipping is reduced and processing accuracy is improved. In terms of processing accuracy, conventional dicing (grinding) processing results in a chipping amount of 15 microns or more, whereas the cutting accuracy of the cleavage plane in this project is at the atomic level (10 angstroms).
This results in an improvement in accuracy of approximately 1,000 to 10,000 times. In addition, since the processing method is punching, the number of processing steps is reduced and costs are reduced, and even after the semiconductor product is made, it has the excellent effect of eliminating the possibility of chipping from the chipping part due to vibration etc. during use and causing electrical leakage. can get.
【図1】本発明の打ち抜き治具の1実施例の全体構成図
。FIG. 1 is an overall configuration diagram of one embodiment of a punching jig of the present invention.
【図2】ダイの一例を示す図。FIG. 2 is a diagram showing an example of a die.
【図3】パンチの一例を示す図。FIG. 3 is a diagram showing an example of a punch.
【図4】ワークの一例を示す図。FIG. 4 is a diagram showing an example of a workpiece.
【図5】図4に示すワークの一部の拡大図。FIG. 5 is an enlarged view of a part of the workpiece shown in FIG. 4.
【図6】図1の一部拡大図。FIG. 6 is a partially enlarged view of FIG. 1.
【図7】ワークおよびダイとパンチの関係を説明する図
。FIG. 7 is a diagram illustrating the relationship between a workpiece, a die, and a punch.
【図8】従来の研削加工を示す側面図。FIG. 8 is a side view showing conventional grinding processing.
【図9】従来の研削加工を示す平面図。FIG. 9 is a plan view showing conventional grinding processing.
【図10】従来の被加工物を示す図。FIG. 10 is a diagram showing a conventional workpiece.
1 ワーク(半導体ウェハ) 2 ダイ 3 カツタ刃 4 パンチ 5 ベース 6 主柱 7 ダイ支え 9 カッタ 1 Work (semiconductor wafer) 2 Die 3 Katsuta blade 4 Punch 5 Base 6 Main pillar 7 Die support 9 Cutter
Claims (1)
の加工方法において、半導体ウェハーの結晶構造の劈開
面角度に沿って半導体ウェハーを打ち抜くことを特徴と
する半導体ウェハーの加工方法。1. A method for processing a semiconductor wafer having a face-centered cubic structure, the method comprising punching out the semiconductor wafer along the cleavage plane angle of the crystal structure of the semiconductor wafer.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP03029044A JP3077910B2 (en) | 1991-01-31 | 1991-01-31 | Processing method of semiconductor wafer |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP03029044A JP3077910B2 (en) | 1991-01-31 | 1991-01-31 | Processing method of semiconductor wafer |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH04348909A true JPH04348909A (en) | 1992-12-03 |
JP3077910B2 JP3077910B2 (en) | 2000-08-21 |
Family
ID=12265395
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP03029044A Expired - Lifetime JP3077910B2 (en) | 1991-01-31 | 1991-01-31 | Processing method of semiconductor wafer |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP3077910B2 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1994005476A1 (en) * | 1992-08-31 | 1994-03-17 | New Man International Co., Ltd. | Stone cutting method and device |
EP0744796A1 (en) * | 1995-05-22 | 1996-11-27 | ALCATEL ITALIA S.p.A. | Method and device for carrying out the cleavage in ultra-high-vacuum environment of portions of a processed semiconductor wafer |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6053906B1 (en) * | 2015-12-14 | 2016-12-27 | 株式会社Louvredo | Hair Dryer |
-
1991
- 1991-01-31 JP JP03029044A patent/JP3077910B2/en not_active Expired - Lifetime
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1994005476A1 (en) * | 1992-08-31 | 1994-03-17 | New Man International Co., Ltd. | Stone cutting method and device |
EP0744796A1 (en) * | 1995-05-22 | 1996-11-27 | ALCATEL ITALIA S.p.A. | Method and device for carrying out the cleavage in ultra-high-vacuum environment of portions of a processed semiconductor wafer |
Also Published As
Publication number | Publication date |
---|---|
JP3077910B2 (en) | 2000-08-21 |
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