JPH04345245A - Communication processing unit - Google Patents

Abstract

PURPOSE:To obtain a maximum processing speed at all times by revising the processing share of each CPU dynamically in response to the state of a processed packet so as to uniformize the processing quantity of each CPU with respect to the communication processing unit using plural CPUs for communication processing. CONSTITUTION:A packet is processed by CPUs 131-133. Then the length of the packet during processing is obtained by a packet length monitor 161 and the length is reported to a packet length statistic processing unit 171. The packet length statistic processing unit 171 generates a packet length statistic by the data reported from a packet length monitor 161 and reports it to a packet processing sharing device 181 which kinds of packets are much processed at present. The packet processing sharing device 181 revises the processing share of the CPUs 131-133 based on the report and the processing share of each CPU in response to the packet length registered in advance.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a communication processing device that performs communication processing in parallel using a plurality of CPUs.

0002

2. Description of the Related Art FIG. 9 shows an example of the configuration of a conventional communication processing device using a plurality of CPUs. In the case of reception processing in FIG. 9, the packet is stored in the shared memory 921 from the network interface 901 via the internal bus 911. The N CPUs 931 to 93N perform the processing assigned to each CPU in their own local memory 94.
1 to 94N to process the packets in shared memory 921 and restore the data to its original format. The restored data is passed to the host computer via host interface 951.

In the case of transmission processing, data to be transmitted from the host computer via the host interface 951 is stored in the shared memory 921 . N CPU93
1 to 93N indicate the processing assigned to each CPU,
It is executed using the respective local memories 941 to 94N, and processes data in the shared memory 921 to generate packets. The generated packet is sent out onto the network via network interface 901.

[0004] In a communication processing device having such a configuration, each CPU cooperatively accesses the shared memory 921 while
By executing the processing assigned to each CPU and performing communication processing, it is possible to
The purpose is to realize high-speed communication processing by reducing the processing load per PU.

[0005]

However, a general problem with parallel processing is the problem of the division of processing among each CPU, the so-called problem of processing granularity. For example, if two CPUs are used to perform parallel processing, one CPU may be tasked with processing that is extremely burdensome, and the other CPU may be tasked with processing that is very light. The processing power is dominated by the processing power of the heavily loaded CPU, and as a result, the processing power is only about the same as when processing with a single CPU. Moreover, due to overheads such as arbitration of shared memory access rights, there may be cases where the performance is lower than that of a single CPU.

Therefore, when performing parallel processing, it is necessary to allocate the processing load as evenly as possible to each CPU, and to avoid cases where only one or some of the CPUs are extremely loaded, or where one or some of the CPUs are It is important to prevent a situation where the load is extremely light from occurring.

On the other hand, in a series of communication processing, the amount of processing at each processing stage changes depending on various factors specific to communication at each point in time.

[0008] For example, in general, the length of the header or trailer of a packet is a fixed length to some extent and does not change drastically, whereas the data body of a packet ranges from several kilobytes to several kilobytes with no data at all. Extremely variable up to megabytes. Therefore, processing for only the packet header (address processing, etc.) requires a nearly constant amount of processing in any case, whereas processing for the entire packet (checksum processing, etc.) varies greatly depending on the packet length. do.

[0009] Furthermore, when considering the hierarchical structure of communication, O
As can be seen in SI's wine glass model, relatively few types of protocols are used in the communication middle layer (network layer to session layer), whereas the upper application layer uses a wide variety of protocols, ranging from very simple ones. A wide variety of protocols exist, some of which are extremely complex. When parallelizing the processing of such a multi-layer protocol, parallelization is often performed for each layer, but in this case, the processing load on the middle layer is almost constant, whereas the processing load on the upper layer varies depending on the application used. The amount of processing changes significantly. Therefore, if you perform parallel processing using two CPUs, for example allocating one CPU to middle layer processing and one CPU to upper layer processing, the processing capacity of the entire device when running a simple application will be equal to the processing capacity of the CPU processing the middle layer, and On the contrary, it is expected that the processing power of the entire device when executing a complex application is dominated by the processing power of the CPU processing the upper layer.

[0010] In this way, communication processing is performed by several CPUs.
When processing in parallel, it is very difficult to make the processing amount of each CPU fixed and uniform, and parallel processing, in which the processing share of each CPU is fixed in advance, as shown in Figure 9, is very difficult. The configuration does not allow for sufficient effects from parallel processing.

SUMMARY OF THE INVENTION In view of the above problems, it is an object of the present invention to provide a function that always equalizes the processing load of each CPU depending on the communication situation at each point in time.

0012

[Means for Solving the Problems] In order to achieve the above object, in the communication processing device of the present invention, as a first method, a plurality of CPUs process packets in parallel. A packet length monitoring device determines the length of the packets that have been received by checking the length of the packet, and calculates the packet length of all or some of the packets that have come in up to that point based on the packet length data output from the packet length monitoring device. A communication processing device comprising a packet length statistics processing device for taking statistics, and a packet processing assignment instruction device for instructing each CPU to assign a range of packet processing based on the packet length statistics outputted by the packet length statistics processing device. Configure.

As a second method, in a communication processing device that processes packets in parallel using a plurality of CPUs, a protocol type monitoring device that monitors the protocol type of the packet to be processed, and protocol type data outputted by the protocol type monitoring device. A protocol type statistics processing device that calculates statistics on the protocol types of all or some of the packets that have arrived up to that point based on the protocol type statistics processing device; A communication processing device is configured that includes a packet processing assignment instructing device for instructing each CPU to assign a range of packet processing.

As a third method, in a communication processing device that processes packets in parallel by a plurality of CPUs, a sender/receiver monitoring device that checks and determines the sender and receiver of a packet to be processed, and the sender/receiver monitoring device. a sender/receiver statistics processing device that calculates statistics on senders and receivers of all or some of the packets processed up to that point based on sender data and receiver data output by the sender/receiver; A communication processing device is configured that includes a packet processing assignment instruction device that instructs each CPU to assign a range of packet processing based on sender/receiver statistical data outputted by the statistical processing device.

[0015] As a fourth method, in a communication processing device that processes packets in parallel using a plurality of CPUs, a sender/receiver monitoring device that checks and determines the sender and receiver of the packet to be processed, and a A protocol type monitoring device that monitors the type of communication protocol used, sender data and recipient data output by the sender/receiver monitoring device, and data used between each sender/receiver output by the protocol type monitoring device. a sender-receiver protocol type statistics processing device that calculates statistics on the packet types of all or some of the packets processed up to that point and the sender and receiver of the packets based on the protocol type information in the packet; , a sender-receiver protocol type statistical data storage device for accumulating sender-receiver protocol type statistical data outputted by the sender-receiver protocol type statistical data storage device; a used protocol estimating device that estimates which protocol will be used in the next communication between a specific sender and receiver based on the received data; and a used protocol estimating device that estimates the range of packet processing to be shared based on the estimation of the used protocol estimating device. A communication processing device is configured that includes a packet processing allocation instruction device that instructs each CPU.

[0016]

[Effect] With the first method, if a large number of packets with a large amount of data in the data body are being processed, a large number of CPUs will be allocated to processing the entire data included in the packet, such as checksum calculation, and vice versa. If you are processing many packets with a small amount of data in the data body part, allocate many CPUs to processing the packet header and packet trailer, and adjust the processing of each CPU according to the packet length of the received packet. By making the load uniform, it becomes possible to effectively take advantage of advantages such as faster processing due to parallelization of packet processing.

According to the second method, in a situation where there is a large number of processes for a certain protocol among the various protocols and layers being processed, many CPUs are required to process that protocol.
By allocating U, it becomes possible to effectively take advantage of advantages such as increased processing speed due to parallelization of packet processing.

[0018] Furthermore, in a situation where a protocol is being processed that requires a very large amount of processing at one time due to the complexity of the processing even though the number of processing is small, it is necessary to allocate a large number of CPUs to the processing of that protocol. By doing so, it becomes possible to effectively take advantage of advantages such as faster processing due to parallelization of packet processing.

According to the third method, in a situation where the amount of communication processing between a certain sender and receiver is extremely large, by allocating CPUs so as to equalize the load on each CPU for communication processing between the sender and receiver. It becomes possible to effectively take advantage of advantages such as faster processing due to parallelization of packet processing.

[0020] According to the fourth method, when communication is about to start between a certain sender and receiver, which protocol is used between the sender and receiver stored in the past in the protocol type statistical data storage device between the sender and receiver. It is possible to predict in advance the communication protocol that will be used for communication that is about to start based on statistical information on how many communications are being performed, and quickly change the processing division of each CPU to a state suitable for speeding up the communication. can.

[0021]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows a block diagram of a communication processing device according to a first embodiment of the present invention. In FIG. 1, the communication processing device includes a network interface 101, an internal bus 111, a shared memory 121, and three CPUs 131 to 13.
3. Local memory 141 to 143 used by each CPU
, host interface 151, packet length monitoring device 1
61, a packet length statistical processing device 171, and a packet processing assignment instruction device 181.

[0022] Here, a case will be described in which TCP/IP, which is a typical protocol for the network layer and transport layer, is processed.

[0023] The contents of the TCP/IP protocol reception process can be broadly divided into (1) checksum calculation, (2) confirmation of sending and receiving addresses, (3) data reconfiguration, (4) flow control, and (5) ) timer processing, and (6) error recovery processing.

[0024] Similarly, the contents of the TCP/IP protocol transmission process are broadly divided into (1) checksum calculation, (2) confirmation of sending and receiving addresses, (3') data division, and (4) flow control. , (5) timer processing, and (6) error recovery processing.

Among these, the checksum calculation in (1) requires processing for all data in the packet, and the processing in (2), (3), (3'), and (4) is Processing is performed only on packet headers and trailers. Further, (5) and (6) are not processes for the packet itself, but processes for peripheral information such as the arrival status of the packet.

First, reception processing will be explained. In the initial settings, the CPU 131 performs checksum processing (1).
The CPU 132 performs (2) confirmation of sending and receiving addresses, (3) data reconfiguration, and (4) flow control, and the CPU 133
It is assumed that (5) timer processing and (6) error recovery processing are assigned to. During reception, packets received from the network interface 101 are stored one after another in the shared memory 121 via the internal bus 111. CPU13
1 to 133 use local memories 141 to 143 to execute processes assigned to each in advance on packets in the shared memory.

During this time, the packet length monitoring device 161
131 to 133 check the length of the packet being processed. This may be done by simply counting the number of bytes in the packet, or by analyzing the IP header and extracting the packet length information therein. In the case of large packets, the former method requires processing time, so it is generally better to use the latter method, but if the network is unreliable and many errors occur, the latter method may result in incorrect packets. Therefore, it is necessary to decide which method to use, taking into consideration the reliability of the network.

The packet length monitoring device 161 passes the determined packet length to the packet length statistical processing device 171. The packet length statistics processing device 171 takes statistics on the packet length data passed from the packet length monitoring device 161, and observes what length of packets are currently being received. This observation result is notified to the packet processing assignment instruction device 181.

The packet processing assignment instructing device 181 changes the processing assignment of each CPU, if necessary, based on the information on the trend of the packet length of the current received packets notified from the packet length statistical processing device 171.

For example, if the current data contains only a small amount of data,
Assume that the packet length statistical processing device 171 obtains a result that a large number of short packets are being received. In this case, the amount of processing for checksum calculation becomes extremely small, so in the initial CPU processing allocation of this embodiment described earlier, the amount of processing for the CPU 131 is reduced, and the other two CPUs are
The CPU 131 remains in a standby state until the packet processing by the PU is completed, and the processing capacity of the CPU 131 is wasted.

Therefore, the packet processing allocation instructing device 181 instructs the CPU 131 to perform the data reconfiguration process in (3) in addition to the checksum calculation, and conversely, the CPU 132 instructs the data reconfiguration process Instruct not to run. As a result, the load on the CPU 131 increases, while the load on the CPU 132 decreases, so the CPU
It is possible to achieve uniform processing.

Next, the transmission process will be explained. In the initial settings, the CPU 131 performs checksum processing (1).
To the CPU 132 (2) Confirm the sending/receiving address, (3')
Data division, (4) flow control is also performed by the CPU 133.
It is assumed that (5) timer processing and (6) error recovery processing are assigned to. At the time of transmission, transmission data is stored in the shared memory 121 from the host interface 151 via the internal bus 111. The CPUs 131 to 133 use the local memories 141 to 143 to execute processes assigned to them in advance on data in the shared memory. As a result, the data in the shared memory 121 is generally divided into several segments, a header is added to each segment, and the data is sent out from the network interface 101 onto the network.

At the same time, the packet length monitoring device 161 checks the length of each generated packet. this is(
The simplest method is for the CPU (CPU 132 in this example) that performs the data division process of step 3') to notify the packet length monitoring device 161.

The packet length monitoring device 161 passes the obtained packet length to the packet length statistical processing device 171. The packet length statistics processing device 171 takes statistics on the packet length data passed from the packet length monitoring device 161, and observes what length of packets are currently being transmitted. This observation result is notified to the packet processing assignment instruction device 181.

The packet processing assignment instructing device 181 changes the processing assignment of each CPU, if necessary, based on the information on the trend of the packet length of the current transmitted packet notified from the packet length statistical processing device 171.

For example, if the current data contains only a small amount of data,
Assume that the packet length statistical processing device 171 obtains a result that a large number of short packets are being transmitted. In this case, the amount of processing for checksum calculation becomes extremely small, so in the initial CPU processing allocation of this embodiment described earlier, the amount of processing for the CPU 131 is reduced, and the other two CPUs are
The CPU 131 remains in a standby state until the packet processing by the PU is completed, and the processing capacity of the CPU 131 is wasted.

Therefore, the packet processing allocation instructing device 181 instructs the CPU 131 to perform, for example, (3') data division processing in addition to checksum calculation.
Conversely, the CPU 132 is instructed not to perform (3') data division processing. As a result, the load on the CPU 131 increases, while the load on the CPU 132 decreases.
It is possible to equalize the processing of the PU.

FIG. 2 shows an example of the processing allocation algorithm of the packet processing allocation instruction device 181 in the first embodiment of the present invention.

In FIG. 2, when the packet processing assignment instruction device 181 receives the trend of the length of the packet currently being processed from the packet length statistical processing device 171 (step 201
), it is checked whether the current processing allocation status of each CPU is the same as the processing allocation for the packet length just received (step 202). If both are the same, the process returns to the state of receiving data from the packet length statistical processing device 171 (step 201). If they are different, the new processing allocation information for the packet length trend is read from the allocation table (step 203), and the contents to be processed are instructed to each CPU according to the information (step 204). After that, the packet length statistical processing device 171
The process returns to the state of receiving data from (step 201).

FIG. 3 is a table of processing assignment information in the first embodiment of the present invention. In Figure 3, if the packets being processed are mostly short, the CPU
131, the CPU 13 performs (1) checksum processing, (3) data reconstruction, or (3') data division processing.
The CPU 133 is set to be assigned (2) confirmation of sending/receiving addresses and (4) flow control, and the CPU 133 is assigned (5) timer processing and (6) error recovery processing.

Conversely, if there are many packets being processed that are long, the CPU 131 (1) performs checksum processing, and the CPU 132 (2) confirms the sender/receiver address.
(3) data reconfiguration, or (3') data division processing, (4) flow control, and the CPU 133 (5)
) timer processing and (6) error recovery processing.

[0042] So far, this embodiment has explained the case of processing the TCP/IP protocol, but since the processing of all communication protocols is basically similar, the TCP/IP protocol
Processing of protocols other than P can be speeded up using the same configuration and processing method.

FIG. 4 shows a configuration diagram of a communication processing device according to a second embodiment of the present invention.

In FIG. 4, the communication processing device includes a network interface 401, an internal bus 411, and a shared memory 4.
21, five CPUs 431 to 435, local memories 441 to 445 used by each CPU, a host interface 451, a protocol type monitoring device 461, a protocol type statistical processing device 471, and a packet processing allocation instruction device 481. .

[0045] Here, TCP/IP is used as the protocol for the network layer and transport layer, and the first application that operates on it (however, the application in this example includes the session layer, presentation layer, and application layer). A case will be described in which an e-mail system (MOTIS/MHS) defined by OSI is used as a second application (including a second application) and TELNET is used as a second application.

Generally speaking, the protocol of the OSI electronic mail system (hereinafter abbreviated as MOTIS) is very large, and the processing amount per unit of protocol data is large. In particular, ASN. One encode/decode process requires a very large amount of processing.

On the other hand, TELNET is a lightweight protocol, and its processing itself does not increase the load much.

[0048]Also, although the amount of processing per packet of TCP/IP itself, which is a network layer/transport layer protocol, is not as large as that of MOTIS, it is used by both MOTIS and TELNET. The number of packets to be processed increases, and the overall amount of processing becomes relatively large.

Therefore, if you simply assign processing to CPUs, assign many CPUs to MOTIS, and then
It is sufficient to allocate the least number of CPUs to IP and TELNET. However, MOTIS and TE
In LNET, the reaction time required by users is completely different. That is, e-mail, which is information exchanged through MOTIS, is generally not required to reach the recipient very quickly, just like regular mail. In addition, the receiving side always monitors whether or not mail has arrived, and usually reads the accumulated mail at certain intervals, rather than reading it immediately upon arrival. Therefore, it can be said that the processing on the MOTIS side generally does not need to be processed very fast.

On the other hand, in TELNET, contrary to MOTIS, the user is usually at the terminal and is always waiting for a response from the other party to the information he/she has sent. Therefore, high speed is always required for TELNET protocol processing.

In other words, from this point of view, it is a good idea to allocate more CPUs to TELNET protocol processing.

[0052] In addition, the usage status of the application at each moment must also be considered. That is, M.O.T.
It is necessary to change CPU allocation depending on whether IS is used a lot, TELNET is used a lot, or about the same amount.

[0053] In general, TELNET mostly exchanges very short packets, whereas MOTIS mostly exchanges quite long packets. Therefore,
It is also necessary to consider changing the allocation of CPU processing according to the packet length described in the first embodiment.

In the initial setting of this embodiment, the CPU 431
Processing other than TCP/IP checksum calculation, CPU
432 is TCP/IP checksum processing, CPU4
MOTIS transmission processing to 33, MOTIS to CPU434
Assume that the entire TELNET processing is assigned to the CPU 435 for reception processing.

[0055] At the time of reception, the network interface 4
The received packets from 01 onwards are stored in the shared memory 421 one after another via the internal bus 411. CPU431-435
uses the local memories 441 to 445 to execute pre-allocated processing on packets in the shared memory.

During this time, the protocol type monitoring device 461 checks the protocol type of the packet being processed by the CPUs 431-435. This would be simplest by receiving information from the CPUs 431-435 about what protocol is currently being analyzed.

The protocol type monitoring device 461 transmits the obtained protocol type to the protocol type statistical processing device 4.
Pass it to 71. The protocol type statistics processing device 471 takes statistics on the protocol type data passed from the protocol type monitoring device 461, and observes what kind of protocol packets are currently being received. This observation result is notified to the packet processing assignment instruction device 481.

The packet processing assignment instructing device 481 changes the processing assignment of each CPU, if necessary, based on the information on the tendency of the protocol type of the current received packets notified from the protocol type statistical processing device 471.

For example, assume that the protocol type statistical processing device 471 obtains a result that a large number of TELNET packets are currently being processed. In this case, the initial CP
MOTIS assigned to U433 and 434
The processing is performed only by the CPU 433, and the CPU 434 and
TELNET protocol processing is performed with this. Additionally, as explained earlier, the packets exchanged in TELNET are often very short, so the amount of header processing increases in TCP/IP processing as described in the first embodiment. However, since the amount of checksum calculation processing is reduced, the CPU 432 is
Other T assigned to header processing and including checksum
By changing the allocation so that the CP/IP processing is processed by the CPU 431, the speed of communication processing mainly for TELNET is increased.

[0060] After that, when the processing of MOTIS packets increases, the initial setting, that is, the CPU 43
1. Processing other than TCP/IP checksum calculation, CP
U432 includes TCP/IP checksum processing, CPU
MOTIS transmission processing to 433, MOTI to CPU 434
S reception processing returns to the state where the entire TELNET processing is assigned to the CPU 435. This allocation makes it possible to perform high-speed communication processing mainly in the MOTIS protocol, which uses many long packets.

[0061] Also, TELNET packet and MOTIS
If the packets are being processed to the same degree, the CPU will be allocated with the aim of increasing the speed mainly for TELNET, which requires a high-speed response. However, in this case, since the number of packets to be processed as a whole increases, it is necessary to improve the throughput of TCP/IP packet processing used in both MOTIS and TELNET. Also, M
T because it is necessary to process many OTIS packets.
CP/IP checksum processing becomes a burden and may impede overall high-speed processing, and many TELNET packets must also be processed, so TCP/IP packet header processing becomes a burden and may impede overall high-speed processing. There is also a possibility that it may hinder. Therefore, the CPU 431 performs TCP/IP checksum processing, the CPU 432 performs TCP/IP header processing, the CPU 433 performs other TCP/IP processing, and
Assign U434 to perform MOTIS protocol processing and CPU435 to perform TELNET protocol processing,
The processing is shared by the CPU, which improves the processing speed of TCP/IP.

The processed data is stored in the shared memory 421
The data is passed from the host via the host interface 451 to the host.

During transmission, the transmission data is stored in the shared memory 421 from the host via the host interface 451, which is the reverse of the reception. The CPUs 431 to 435 use the local memories 441 to 445 to execute pre-allocated processes on the transmission data in the shared memory, generate packets of the protocol specified by the host, and send the packets to the network interface 401. Send it out on the network via .

The protocol type of the packet generated at this time is determined by the protocol type monitoring device 4 as in the case of reception.
61 and the protocol type statistics processing device 471, and the packet processing allocation instruction device 481 collects the statistics.
Change the processing assignment of PU.

As described above, by changing the processing allocation to the CPU based on the statistical information of the type of protocol currently being processed, it is possible to equalize the processing amount of each CPU and improve the overall processing speed. can.

FIG. 5 shows an example of the processing allocation algorithm of the packet processing allocation instruction device 481 in the second embodiment of the present invention.

In FIG. 5, when the packet processing allocation instruction device 481 receives the trend of the protocol type currently being processed from the protocol type statistical processing device 471 (step 501), the current processing allocation status of each CPU is determined based on the current processing allocation status of each CPU. It is checked whether the processing allocation is the same as the processing allocation for high-speed processing of the selected protocol type (step 502). If both are the same, the protocol type statistical processing device 471
The process returns to the state of receiving data from (step 501). If they are different, processing allocation information for the new protocol type is read from the allocation table (step 50).
3) Instruct each CPU what to process according to the information (step 504). Thereafter, the process returns to the state of receiving data from the protocol type statistical processing device 471 (step 501).

FIG. 6 is a table of processing assignment information in the second embodiment of the present invention. In Figure 6, T.E.
If a large number of LNET packets are processed, the CPU 431
The CPU 432 performs TCP/IP processing other than TCP/IP header processing (including checksum calculation processing).
Header processing, MOTIS protocol processing by CPU 433, TELNET transmission processing by CPU 434, CPU 435
It is set to perform TELNET reception processing.

On the other hand, when there are many MOTIS packets to be processed, the CPU 431 performs TCP/IP processing other than TCP/IP checksum calculation processing, and the CPU 432 performs TCP/IP processing other than TCP/IP checksum calculation processing.
P checksum calculation processing, CPU 433 performs MOTIS transmission processing, CPU 434 performs MOTIS reception processing, CPU 4
35 to perform TELNET protocol processing.

[0070] Furthermore, if the TELNET packet and MOTIS packet are processed at the same level, the CPU 431 performs TCP/IP checksum calculation processing, and the CPU 432 performs TCP/IP checksum calculation processing.
CP/IP header processing, other T in CPU 433
CP/IP protocol processing, MOTIS with CPU434
Protocol processing: The CPU 435 performs TELNET protocol processing.

FIG. 7 shows a configuration diagram of a communication processing device according to a third embodiment of the present invention.

In FIG. 7, the communication processing device includes a network interface 701, an internal bus 711, and a shared memory 7.
21, five CPUs 731 to 735, local memories 741 to 745 used by each CPU, a host interface 751, a sender/receiver monitoring device 761, a sender/receiver statistical processing device 771, and a packet processing allocation instruction device 781. ing.

[0073] Here, TCP/IP is used as the protocol for the network layer and transport layer, and the first application (in this example, the application includes the session layer, presentation layer, and application layer) runs on it. ) can be used as an e-mail system (MOTIS/MHS) specified by OSI, and TELNET as a second application.
The following describes the case where the user mainly uses TELNET.

[0074] In the initial settings of this embodiment, the CPU 731
Processing other than TCP/IP checksum calculation, CPU
732 has TCP/IP checksum processing, CPU7
MOTIS transmission processing to 33, MOTIS to CPU734
Assume that the entire TELNET process is assigned to the CPU 735 for reception processing.

[0075] At the time of reception, the network interface 7
The received packets from 01 onwards are stored in the shared memory 721 one after another via the internal bus 711. CPU731-735
uses the local memories 741 to 745 to perform processing assigned to each in advance on packets in the shared memory. The received data that has been processed is sent to the host interface 7.
51 to the host.

At the time of transmission, transmission data is sent from the host interface 751 to the shared memory 72 via the internal bus 711.
It is stored in 1. The CPUs 731 to 735 use the local memories 741 to 745 to execute processes assigned to them in advance on data in the shared memory. A packet generated after the processing is completed is sent out onto the network via the network interface 701.

During these processes, the sender/recipient monitoring device 76
1, the CPUs 731 to 735 check the sender and receiver of the packet being processed. This is CPU731-735
The simplest method would be to receive information about who is the sender/receiver of the packet currently being processed.

The sender/recipient monitoring device 761 passes the obtained sender/recipient information to the sender/recipient statistical processing device 771 . The sender/receiver statistics processing device 771 takes statistics on the sender/receiver passed from the sender/receiver monitoring device 761, and observes which sender and recipient are currently sending and receiving the most packets. This observation result is notified to the packet processing assignment instruction device 781.

The packet processing allocation instructing device 781 adjusts the processing of each CPU, if necessary, based on the trend information of which sender/receiver is currently exchanging the most packets, which is notified from the sender/receiver statistical processing device 771. Change assignments.

For example, assume that the sender/receiver statistical processing device 771 obtains a result indicating that a large number of communications by the second user are currently being processed. In this case, the application protocol being used is TELNET, so the MOTIS processing that was originally assigned to CPUs 733 and 734 is reduced to only CPU 733, and CPU 7
34 and 735 to perform TELNET protocol processing. Also, as explained earlier, TEL
Packets exchanged via ET are often very short, so as described in the first embodiment, TCP/I
In the processing of P, the amount of processing for header processing increases and the amount of processing for checksum calculation decreases, so the CPU 732 is assigned to TCP/IP header processing and other TCP/IP processing including checksum is processed by CPU 731. By changing the allocation to , the speed of communication processing for the second user, mainly using TELNET, is increased.

After that, when the number of packets processed by the first user increases, the initial setting, that is, the CPU
731, processing other than TCP/IP checksum calculation,
The CPU 732 performs TCP/IP checksum processing, C
MOTIS transmission processing to PU733, MO to CPU734
The TIS reception process and the entire TELNET process are assigned to the CPU 735 again. This allocation enables high-speed processing of communication by the first user who uses the MOTIS protocol, which uses many long packets.

[0082] Furthermore, if the first user's packets and the second user's packets are processed to the same degree, the second user's packets, which require a fast response, T
The CPU allocation will be aimed at increasing the speed mainly for ELNET. However, in this case, since many MOTIS packets must be processed, the TCP/IP checksum processing becomes a burden and may impede overall high-speed processing. Therefore, the CPU 731 performs TCP/IP checksum processing, the CPU 732 performs TCP/IP header processing, and
U733 performs other TCP/IP processing, CPU734
MOTIS protocol processing, CPU735 TELN
ET protocol processing, TCP/
The processing is shared by the CPU, which improves the IP processing speed.

FIG. 8 shows a configuration diagram of a communication processing device according to a fourth embodiment of the present invention. In FIG. 8, the communication processing device includes a network interface 801, an internal bus 811, a shared memory 821, and five CPUs 831 to 8.
35. Local memory 841 to 84 used by each CPU
5, host interface 851, sender/recipient monitoring device 8
61, a protocol type monitoring device 862, a protocol type statistical processing device 871 between sender and receiver, a protocol type statistical data storage device 872 between sender and receiver, a usage protocol estimation device 873, and a packet processing allocation instruction device 881. .

[0084] Here, TCP/IP is used as the protocol for the network layer and transport layer, and the first application (in this example, the application includes the session layer, presentation layer, and application layer) runs on it. ), and a case where TELNET can be used as a second application will be described.

[0085] In the initial settings of this embodiment, the CPU 831
Processing other than TCP/IP checksum calculation, CPU
832 has TCP/IP checksum processing, CPU8
MOTIS transmission processing to 33, MOTIS to CPU834
Assume that the entire TELNET processing is assigned to the CPU 835 for reception processing.

[0086] At the time of reception, the network interface 8
The received packets from 01 onwards are stored in the shared memory 821 one after another via the internal bus 811. CPU831-835
uses the local memories 841 to 845 to execute pre-allocated processing on packets in the shared memory. The received data that has been processed is sent to the host interface 8.
51 to the host.

At the time of transmission, transmission data is sent from the host interface 851 to the shared memory 82 via the internal bus 811.
It is stored in 1. The CPUs 831 to 835 use the local memories 841 to 845 to execute processes assigned to them in advance on data in the shared memory. A packet generated after the processing is completed is sent out onto the network via the network interface 801.

During these processes, the sender/recipient monitoring device 86
1, the CPUs 831 to 835 check the sender and receiver of the packet being processed. Further, the protocol type monitoring device 862 checks the protocol type of the packet. The simplest way to do this would be to receive information from the CPUs 831 to 835 about who is the sender/receiver of the packet currently being processed and what protocol is being processed.

The sender/recipient monitoring device 861 and the protocol type monitoring device 862 pass the respective obtained information to the sender/receiver protocol type statistical processing device 871 . The sender-receiver protocol type statistics processing device 871 takes statistics on the sender-receiver and protocol type passed from the sender-receiver monitoring device 861 and the protocol type monitoring device 862, and determines which protocol is currently being used between which sender and receiver. Observe whether many packets are being sent and received. The observation results are stored in the sender-receiver protocol type statistical data storage device 872.

[0090] In this way, statistical information about which protocols are frequently used between a particular receiver and a sender is stored in the sender-receiver protocol type statistical data storage device 8.
72. Assume that the result is that the TELNET protocol is often used between the first receiver and the first sender.

[0091] Here, it is assumed that a new communication is about to be started between the first receiver and the first sender, and a communication start request is received by the communication processing device. This communication processing device receives a communication start request and prepares to process the communication between the two parties, but at this time, the usage protocol estimating device 873 confirms the sender and receiver of the communication that is about to be started. Then, information stored in the sender-receiver protocol type statistical data storage device 872 is searched to find out which communication protocol has been frequently used between the corresponding sender and receiver. As a result, it can be seen that TELNET is particularly frequently used between the two, so the usage protocol estimation device 873
instructs the packet processing assignment instructing device 881 to perform high-speed TELNET processing.

[0092] The packet processing allocation instructing device 881 transmits TELN based on the instruction from the usage protocol estimating device 873.
The processing of each CPU is divided to speed up the processing of ET.

For example, the MOTIS processing originally assigned to the CPUs 833 and 834 is set to only the CPU 833, and the TELNET protocol processing is performed by the CPUs 834 and 835. Additionally, as explained earlier, the packets exchanged in TELNET are often very short, so the amount of header processing increases in TCP/IP processing as described in the first embodiment. However, since the amount of processing for checksum calculation is reduced, the CPU 832 is allocated to TCP/IP header processing,
Other TCP/IP processing including checksums is performed by the CPU.
By changing the allocation so that processing is performed using 831, communication processing mainly using TELNET is accelerated.

[0094]

[Effects of the Invention] As explained above, according to the present invention,
In a device that performs communication processing using multiple CPUs,
The packet length and protocol type of the packet being processed,
It is now possible to equalize the processing load of each CPU, which varies depending on factors specific to the communication between the sender and receiver, etc., and this makes it possible to equalize the processing load of each CPU, which may be affected by an extremely large processing load on some CPUs. The overall processing speed decreases due to a decrease in the processing speed of the CPU, and the processing capacity of some CPUs decreases, resulting in a standby state until the processing of other CPUs is completed, wasting processing power. This makes it possible to effectively utilize all CPUs and maximize the processing power of multiple CPUs.

[0095] Furthermore, as shown in the fourth embodiment, when communication begins between a specific sender and receiver, it is possible to determine what kind of communication took place between them based on past statistics. By anticipating whether communication will occur and allocating processing to the CPUs in advance so that the communication can be processed efficiently, it becomes possible to more quickly and optimally allocate processing among the CPUs.

[Brief explanation of the drawing]

FIG. 1 is a configuration diagram of a communication processing device in a first embodiment of the present invention.

FIG. 2 is a diagram showing an example of a processing allocation algorithm of the packet processing allocation instruction device 181 in the first embodiment of the present invention.

FIG. 3 is a diagram showing a table of processing allocation information in the first embodiment of the present invention.

FIG. 4 is a configuration diagram of a communication processing device in a second embodiment of the present invention.

FIG. 5 is a diagram showing an example of a processing allocation algorithm of the packet processing allocation instruction device 481 in the second embodiment of the present invention.

FIG. 6 is a diagram showing a table of processing allocation information in the second embodiment of the present invention.

FIG. 7 is a configuration diagram of a communication processing device in a third embodiment of the present invention.

FIG. 8 is a configuration diagram of a communication processing device in a fourth embodiment of the present invention.

FIG. 9 is a configuration example of a conventional communication processing device using multiple CPUs.

[Explanation of symbols]

101 Network interface 111 Internal bus 121 Shared memory 131-133 CPU 141-143 Local memory 151 Host interface 161 Packet length monitoring device 171 Packet length statistical processing device 181 Packet processing allocation instruction device 401 Network interface 411 Internal bus 421 Shared memory 431-435 CPU 441-445 Local memory 451 Host interface 461 Protocol type monitoring device 471 Protocol type statistical processing device 481 Packet processing allocation instruction device 701 Network interface 711 Internal bus 721 Shared memory 731-735 CPU 741-745 Local memory 751 Host interface 761 Transmission/reception sender monitoring device 771 sender/receiver statistical processing device 781 packet processing allocation instruction device 801 network interface 811 internal bus 821 shared memory 831-835 CPU 841-845 local memory 851 host interface 861 sender/receiver monitoring device 862 protocol type monitoring device 871 Inter-recipient protocol type statistical processing device 87
2 Protocol type statistical data storage device 8 between sender and receiver
73 Usage protocol estimation device 881 Packet processing allocation instruction device 901 Network interface 911 Internal bus 911 921 Shared memory 921 931 to 93N CPU 941 to 94N Local memory 951 Host interface

Claims (4)

[Claims] 1. A communication processing device that processes packets in parallel using a plurality of CPUs, comprising: a packet length monitoring device that checks the length of the packet being processed; and packet length data output from the packet length monitoring device. and a packet length statistics processing device that calculates packet length statistics of all or some of the packets that have arrived up to that point, and a division of packet processing based on the packet length statistics output by the packet length statistics processing device. A communication processing device including a packet processing allocation instruction device that instructs a range for each CPU. 2. A communication processing device that processes packets in parallel using a plurality of CPUs, including a protocol type monitoring device that monitors the protocol type of the packet to be processed, and a protocol type monitoring device that monitors the protocol type data output from the protocol type monitoring device. A protocol type statistics processing device that takes statistics on the protocol type of all or some of the packets that have come in up to that point, and a division of packet processing based on the protocol type statistics output by the protocol type statistics processing device. A communication processing device including a packet processing allocation instruction device that instructs a range for each CPU. 3. A communication processing device that processes packets in parallel using a plurality of CPUs, comprising: a sender/receiver monitoring device that checks and determines the sender and receiver of a packet to be processed; a sender-receiver statistical processing device that takes statistics on senders and receivers of all or some of the packets processed up to that point based on user data and receiver data, and the sender-recipient statistical processing device A communication processing device comprising: a packet processing assignment instruction device that instructs each CPU to assign a range of packet processing based on sender/receiver statistical data to be outputted. 4. In a communication processing device that processes packets in parallel by a plurality of CPUs, a sender/receiver monitoring device that checks and determines the sender and receiver of a packet to be processed, and communication used between each sender/receiver. A protocol type monitoring device that monitors protocol types, sender data and recipient data output by the sender/receiver monitoring device, and protocol type information used between each sender/receiver output by the protocol type monitoring device. a sender-receiver protocol type statistics processing device that calculates statistics on the packet types of all or some of the packets processed up to that point and the sender and receiver of the packets based on the above information; a sender-receiver protocol type statistical data storage device that accumulates sender-receiver protocol type statistical data outputted by the sender-receiver protocol type statistical data storage device; A usage protocol estimating device that estimates which protocol will be used in the next communication between a specific sender and receiver, and a range of packet processing assigned to each CPU based on the estimation of the usage protocol estimating device. A communication processing device having a packet processing allocation instruction device for instructing.