JPH0434355B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a giant dropout measuring method suitable for measuring the performance of magnetic tape used in video tape recorders and the like.

Home video tape recorder (hereinafter referred to as VTR)
), so-called helical scan VTRs that use 2/1-inch wide magnetic tape are rapidly becoming popular. In such VTRs, the magnetic tape is housed in a cassette, making it very easy to load and remove the tape and perform other operations.Also, it is possible to record continuous programs for up to 6 hours, making it possible to record long programs. It became.

In this way, it has become possible to record long programs because it has become possible to dramatically improve the recording density of magnetic tape. Explain using.

In FIG. 1, 1 is a magnetic tape, 2 is a magnetic head, 3 is a recording track, and 4 is a horizontal synchronizing signal.

The magnetic tape 1 runs in the direction of arrow A, and the magnetic head 2 scans the magnetic tape 1 in the diagonal direction of arrow B at an angle θ. For this purpose, record track 3
is formed obliquely on the magnetic tape 1 at an angle θ. Although not shown, two magnetic heads are used as the magnetic head 2, and these magnetic heads are provided on the rotating drum at an angular interval of 180° from each other, and one magnetic head records every other magnetic head. The other magnetic head records or plays back every other recording track. Therefore, the recording tracks 3 are recorded or reproduced one by one alternately with different magnetic heads.

On each recording track 3, a video signal is recorded one field at a time, and therefore, a video signal of 262H (H is a horizontal scanning period) is recorded. Although not shown, a vertical synchronizing signal is recorded at the end of each recording track 3, and a horizontal synchronizing signal 4 is
It is recorded every 1 hour.

By the way, in general, a guard band is provided between each recording track 3 in order to prevent crosstalk between the recording tracks, but in order to increase the recording density, a so-called azimuth method is used. Each recording track 3 is made to touch each other without providing a guard band.
That is, the gap directions of the two magnetic heads mentioned above are made different, and the magnetization directions are made different between adjacent recording tracks 3. In this way, the reproduction output can be sufficiently suppressed even if the recording track 3 is reproduced and scanned by a magnetic head whose gap direction is different from the magnetization direction of the recording track 3. Therefore, during recording, it is possible to form a recording track that partially overlaps the adjacent recording track, and the width of the recording track can be made sufficiently narrow, resulting in a significant improvement in recording density.

Incidentally, the width w of the recording track 3 is set to 20 .mu.m to 58 .mu.m, so that even if the magnetic head 2 partially scans the adjacent track 3, no crosstalk occurs. Length between 4 horizontal sync pulses (1H
The length at which the video signal is recorded) l _H is approximately 370 μm,
θ is approximately 7°.

The above has explained the recording tracks formed at high density on the magnetic head. Generally, when a magnetic tape is reproduced and scanned, a dropout occurs in the video signal due to a defect on the magnetic tape, and white dots or white lines appear on the reproduction screen. noise appears, degrading the image quality.

The causes of defects in magnetic tape include scratches, protrusions, and depressions on the magnetic tape, as well as dirt and dust adhering to the magnetic tape. The nature of defects caused by such causes can be classified as follows. First, there are defects that cannot be removed, such as scratches on the magnetic tape, and such defects always cause dropouts (hereinafter, such dropouts are referred to as permanent dropouts). out). Next, if the magnetic tape is scanned by a magnetic head once due to a defect caused by dirt or dust, the dropout will occur, but at the same time the dust is removed and no dropout will occur in the next scan (hereinafter referred to as Dropouts like this are called temporary dropouts), and although dropouts do not occur during the first scan of the magnetic head, certain substances in the coating on the magnetic tape may be scraped up by the scan of the magnetic head. This is a defect caused by strong adhesion to a certain position on the magnetic tape, and dropouts appear after multiple scans (hereinafter, such dropouts will be referred to as semi-permanent dropouts).

In any case, dropouts are not desirable because they cause deterioration in image quality, and in magnetic tapes that perform high-density recording for long-term recording as mentioned above, Even a minute defect in the tape will appear as a large dropout, so it is necessary to minimize even the slightest defect.

Of course, dropout can be compensated for by electrical means, and various methods and devices have been proposed so far, but in principle they make it visually unnoticeable by utilizing the correlation of image information. Therefore, if dropouts occur frequently, the image quality will inevitably deteriorate, and if the dropouts are extremely large (hereinafter, such dropouts will be referred to as giant dropouts).
Nowadays, it is difficult to even make it inconspicuous.

Therefore, in order to understand the performance of magnetic tape, it is necessary to investigate the cause of such huge dropouts, but the conventional method of measuring dropouts is to count the number of dropouts that occur per unit time. There is a method of evaluating these by aggregating and averaging them, and although this method is uniformly effective for evaluating the performance of magnetic tapes, it is not useful in any way for investigating the cause of dropouts.

On the other hand, there is a method in which a recorded magnetic tape is magnetically developed and defects in the magnetic tape are visually observed using a microscope, and the cause of the dropout can be investigated by directly analyzing the defects. Indeed, according to this method, it is possible to know whether the defect is a protrusion, a depression, or an adhesion of dust on the magnetic tape. Furthermore, the shape of the defect that causes the huge dropout can be used to determine the cause of the failure of the defect. For example, scratches that occur when the magnetic tape runs may be defects that extend in the longitudinal direction of the magnetic tape, or if fine threads are attached, it may be a curved defect.
Further, since defects caused by the material of the magnetic tape have a certain area, the cause can be inferred from the shape of the defect, and countermeasures can be taken.

However, this method requires a great deal of time and effort to find the defect itself. In order to reduce the time required to search for dropouts, there is a method of playing the magnetic tape at low speed, stopping when a dropout is detected, magnetically developing that part, and visually observing it with a microscope, but even with this method only one dropout can be detected. However, it is very difficult to analyze the shape of many defects in a timely manner.

Furthermore, it is impossible to determine whether the detected dropout is a giant dropout or not, and if a dropout is developed and visually observed every time a dropout is detected, it becomes virtually impossible to investigate the cause of a giant dropout.

The purpose of the present invention is to eliminate the drawbacks of the above-mentioned prior art,
To provide a method for measuring a huge dropout by which the huge dropout can be quickly detected and displayed.

To achieve this object, the present invention expresses the position of a dropout detected on a magnetic tape using vertical and horizontal synchronizing pulses of a video signal recorded on the magnetic tape, and obtains width information of the dropout. , determining whether a dropout occurring in a selectable arbitrary area on the magnetic tape is a giant dropout based on the dropout occurrence position information and width information, and determining the area of the magnetic tape where the giant dropout occurs. It is characterized by being able to display.

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 2 is a block diagram showing an embodiment of the giant dropout measuring method according to the present invention, and shows five steps.
is a VTR, 6 is a microcomputer (hereinafter referred to as microcomputer), 7 is a time setting timer, 8 is a vertical synchronization pulse counter (hereinafter referred to as V counter),
9 is a horizontal synchronization pulse counter (hereinafter referred to as an H counter), 10 is a dropout detector, 11 is a dropout width counter, and 12 is an oscillator.

Next, the operation of this embodiment will be explained.

In FIG. 2, a VTR 5 is controlled by a microcomputer 6. From terminals c ₁ , c ₂ , c ₃ , and c ₄ of the microcomputer 6, command signals for recording, playback, stop, and rewind modes are sent to the VTR 5, and the VTR 5 responds to the sent command signals. operate in mode. The time setting timer 7 is used to set the time for the recording and playback modes.When a reset signal is sent from the terminal _c5 of the microcomputer 6, the time setting timer 7 starts operating, and at the same time, the time setting timer 7 starts operating when the reset signal is sent from the terminal _c5 of the microcomputer 6. or
A command signal is sent from _c2 , and the VTR 5 enters recording or playback mode. The time setting timer 7 sends a time over signal to the microcomputer 6 when the set time has elapsed, and the microcomputer 6 sends command signals from terminals c ₃ and c ₄ to stop the VTR 5 and put it into rewind mode.

When the VTR 5 is in the playback mode according to a command from the microcomputer 6, the magnetic tape 1 shown in FIG.
The video signal is reproduced from the video signal, and the vertical synchronizing pulse VS separated from the reproduced video signal is sent to the V counter 8, and the horizontal synchronizing pulse HS is sent to the H counter 9.
The RF signals V are respectively supplied to dropout detectors 10.

V counter 8 is a 16-bit 9 counter,
Count the supplied vertical synchronization pulses VS.
The H counter 9 is a 9-bit counter that counts the supplied horizontal synchronizing pulse HS and is reset by the vertical synchronizing pulse VS.
Therefore, the H counter 9 repeatedly counts the horizontal synchronizing pulses HS for each field.

A dropout detector 10 detects a dropout from a decrease in the amplitude of the reproduced RF signal V, and supplies this to the microcomputer 6 as well as to a dropout width counter 11. The dropout width counter 11 is composed of an 8-bit counter, and when the dropout is supplied, it counts the pulses from the dropout period oscillator 12, and uses the counted number as the dropout width.
supply to.

Therefore, the microcomputer 6 detects the dropout detector 1.
When a dropout is supplied from 0, the respective counts of the V counter 8 and H counter 9 at that time are also supplied, and the dropout width counter 11
is stored in a memory (not shown) along with the count from . The count number of the V counter 8 represents the recording track in which a defect causing dropout exists, and the count number of the H counter 9 represents the H period in which the defect exists on the recording track. becomes an address signal representing the position of the defect on the magnetic tape.

Since V counter 8 is a 16-bit counter,
2 ¹⁶ = 65536 recording tracks can be counted, and therefore 65536/60≈1090 seconds, or approximately 18 minutes of measurement is possible. 2 After counting ¹⁶ , it will be reset and the count will be repeated at this time period.

Since H counter 9 is a 9-bit counter,
2 ⁹ = 512 counts and is reset by the vertical synchronization pulse VS, so in the case of the NTSC system, the count from 1 to 262 is repeated,
In the PAL and SECAM systems, counting from 1 to 315 is repeated. In addition, PAL
In the SECAM method, the repetition frequency of the vertical synchronization pulse VS is 50Hz, so 2 ¹⁶ /50≒1310 seconds,
That is, measurement can be performed in about 20 minutes.

Since the dropout width counter 11 is an 8-bit counter, it can count 2 ⁸ = 256. Now, if the oscillation frequency of the oscillator 12 is 500KHz, the dropout width can be set from 2μs to 512μs with an accuracy of 2μs. This means that it is possible to detect defect widths from H/30 to approximately 8H. In the case of the magnetic tape in Figure 1, 1H≒370μm, so 370÷30
This means that it is possible to detect minute defects up to approximately 12 μm.

Note that the above numerical values are merely an example.
For example, it is clear that by increasing the oscillation frequency of the oscillator 12, it is possible to detect even smaller dropouts and therefore even smaller defects on the magnetic tape.

The operation of each block in FIG. 2 has been described above. Next, a case will be described in which defects in a magnetic tape are measured using the flowchart in FIG. 3.

First, the time to be measured is set in advance by the time setting timer 7. Then press the record button (not shown)
Press to start microcomputer 6 (13),
Issue a recording command signal from the _c1 terminal to start recording on the VTR 5 (14). At an appropriate time after the start of recording, a start audio signal is placed on one end of the magnetic tape 1 (not shown in FIG. 1).
At the same time, a reset signal is sent from the _c5 terminal to operate the time setting timer 7 (16).

After that, when the time setting timer 7 elapses the set time and generates a time-over signal (17), the stop button (not shown) is pressed, and the microcomputer 6 issues a stop command signal to the _c3 terminal to stop recording on the VTR 5. Then, a rewind button (not shown) is pressed to issue a rewind command signal to the _c4 terminal to rewind the magnetic tape (not shown) to its original position (18).

Next, when you press the playback button (not shown), the microcomputer 6
issues a playback command signal to the _c2 terminal, and the VTR 5 enters playback mode (19). While playing the audio recording track, a start audio signal is detected for playback (20)
Then, a reset pulse is supplied to the V counter 8, H counter 9, and dropout width counter 11 to reset them (21). Then, the V counter 8 counts the vertical synchronizing pulse VS, and the H counter 9 counts the horizontal synchronizing pulse HS, as described above.

Therefore, when a dropout is detected by the dropout detector 10, the microcomputer 6 detects this (hereinafter referred to as a dropout interrupt) (22), reads the count numbers of the V counter 8 and the H counter 9 at the start of the dropout,
The count number from the dropout width counter 11 is also read (23), and each count number is stored in the memory (not shown) of the microcomputer 6 (24). At the same time, the dropout width counter 11 is reset (25). Note that the dropout width counter 11 can be reset using, for example, a pulse detected from the end of the detected dropout.

When the count numbers of each counter 8, 9, and 11 are stored in memory, it is determined whether or not the memory exceeds (26), and if it exceeds, the data stored in the memory is transferred to an external memory (not shown). (27). Next, it is determined whether or not there is a time over signal from the time setting timer 7 (28).
If the set time has not elapsed, prepare for the next dropout interrupt (22).

Each time a dropout is detected within the time set by the time setting timer 7, the counts of the V counter 8, H counter 9, and dropout width counter 11 are stored in the memory. The stored data is transferred to external memory.

When the time set by the time setting timer 7 has elapsed, the time setting timer 7 generates a time over signal (28), and by pressing the stop button and the rewind button, the microcomputer 6 sends stop and rewind signals to the c ₃ and c ₄ terminals, respectively. A command signal is generated to put the VTR 5 in stop mode and then in rewind mode (29). At the same time, microcontroller 6
All data stored in the memory is transferred to external memory (30), and all measurements are completed (31).

Now, next, V and H obtained as above
Dropout occurrence position information based on the count numbers of counters 8 and 9 (hereinafter referred to as V address and H address, respectively) and dropout width counter 11
The following describes how the shape of the giant dropout is displayed by determining whether or not it is a giant dropout using the count number (hereinafter referred to as DO width information).

First, the principle of searching for a giant dropout will be explained with reference to FIG.

The search for a giant dropout according to the present invention involves setting an arbitrary area on a magnetic tape and determining whether or not a giant dropout exists in the area. If this is due to a defect in the width or length of the magnetic tape 1, then 5 mm in the longitudinal direction of the magnetic tape
A region 33 having sides of 5 mm in the track direction is set, and it is determined whether or not there is a huge dropout in this region 33.

If a huge dropout exists in the area 33, the area 33 is displayed, and if it does not exist, the area 33 is sequentially shifted in the track direction shown by arrow A, and if the area 33 is located at the other end of the magnetic tape 1. When reaching this point, the magnetic tape 1 is shifted in the longitudinal direction (arrow B) and then again in the direction of arrow A, and when a huge dropout is detected, that area 33 is displayed.

Therefore, as explained in FIG. 1, for example, the recording track width is 58 μm and the 1H recording length is 370 μm.
m, and the inclination θ of the recording track is approximately 7°, the width of the recording track in the longitudinal direction of the magnetic tape 1 is approximately
Since the length is 476 μm, the length in the longitudinal direction of the magnetic tape 1 in the area 33 (each side is 5 mm) corresponds to 10 recording tracks, and the recording track direction corresponds to 14H. Therefore, the area 33 includes recording tracks ₃₁ to n+9 (where n is a positive integer) of n at the V address.
Recording track 3 up to ₂ , 1H address from m to m
The area is up to +13 (where m is a positive integer).

FIG. 5 is a flowchart showing the operation of the microcomputer shown in FIG. 2 for searching and displaying a huge dropout.

Below, based on this flowchart and Figure 4,
The operation of the microcomputer shown in FIG. 2 will be explained.

In FIGS. 4 and 5, when starting, first, n is specified (34) to set the longitudinal range of the magnetic tape 1 in the area 33 in FIG. 4, and then,
m=1 is set and (35) area 33 is set. Counters 1 and 2 (not shown) are then reset to zero (36) and the preparation stage ends.

Next, the V address stored in the memory is read out (39), and it is determined whether the V address is greater than or equal to n, that is, whether the V address falls within the area 33 (40). Address is read. When the V address becomes n or more, n+9
It is determined whether or not the following is true (41). If the V address that first becomes n or more in decision 40 is a value exceeding n+9 in decision 41, it means that there is no dropout in the area between recording tracks 3 ₁ and 3 ₂ including area 33, In this case,
Since the counts of counters 1 and 2 reset in judgment 36 are zero (48, 54), the set n
Add +10 to n+10 (56), move area 33 to arrow B
Move the track by 10 recording tracks in the direction and press V again.
A similar determination is made by sequentially reading out the addresses. If there is no V address, that is, if no dropout occurs (39), the microcontroller's operation will stop, but since this rarely happens, the loop 39→40→41→48→54 →
Repeat steps 56→36→39 to move area 33 in the direction of arrow B to the location where dropout occurs.

Therefore, when area 33 moves to the location where dropout occurs, a certain V address of area 33 is included between n and n+9 (40, 41), and the count number of counter 2 is zero (42), so counter 2's count number is zero (42). Set the count number to 1 (58), set n to the value of the V address at that time (59), move the area 33 in the direction of arrow B, and set the recording track where the dropout occurs to the first recording track ₃₁ in the area 33. The area 33 is set so that

As described above, the area 33 of m=1 including the recording track where dropout occurs is first
It is set by recording tracks 3 ₁ and 3 ₂ .

Regarding the range for n set in this way, address n, which is the lowest V address, is read out (39), and judgments 40 and 41 are both "yes", and the count number of counter 2 is not zero. , the H address of the above V address (address n) is read (43).

Therefore, when the H address is read when the V address is n (43), since m=1 at this time, the H address is always greater than or equal to m (44),
When it is greater than or equal to m+14 (45), the H address of the next V address is attempted to be read, but if there is no H address within the range of V address ≦ n + 9 (41), the count number of counter 1 is zero. (48), the count number of counter 2 is not zero (54), so m
+14 to get m+14, and since m=1 in this case, the value 15 is set as the new m. Therefore, the area 33 moves in the direction of arrow A and changes from the new m (=15) to m+
An area 33 determined by up to 13 (=28) H addresses is set.

Then, the same operation as above is started for this new area 33.

Now, if n≦V address≦n+9 ...(1), and if there exists an H address such that m≦H address≦m+13 ...(2), then the dropout width (D/O width ) is determined (46), and if the D/O width is 1 mm or more, it is displayed as a huge dropout (52). At this time,
Counter 2 is reset to zero (53).

However, when the D/O width is less than 1 mm (46),
After counting counter 1 by +1, the following formula
If there are V and H addresses that satisfy (1) and (2), the counter 1 is sequentially counted by +1. At this time, of course, if there is an H address with a D/O width of 1 mm or more (46), the counter 2 is reset (53) and its dropout is immediately displayed. However, V and H satisfying the above formulas (1) and (2)
If the address does not represent a dropout wider than 1mm (46), then counter 1 is sequentially +1
(47), and when the V address finally no longer satisfies the above formula (1) (41), the count number of counter 1 is determined (48, 49), and if the count number is 3 or more, The width of the recording track in the longitudinal direction of the magnetic tape is 476 μm, and 476 μm x 3 = 1428 μm, so there is a possibility that this is a huge dropout with a length of 1 mm or more, so it is necessary to detect the dropout (50). , if it is a huge dropout, (51) is displayed (52). If it is not a huge dropout (51), add 1 to m to make it m + 1,
The area 33 is shifted by 1H in the direction of arrow A, and the same operation is performed using this as a new area 33.

Also, when the count number of the counter 1 is less than 3, m is increased by 1 to make m+1, and the area 33 is shifted by 1H in the direction of arrow A to create a new area.

In the above manner, when m is increased by +1 or +14 and the area 33 is moved in the direction of the arrow A, finally, when m+14 becomes 262 or more (38), the area 33 is moved further in the direction of the arrow A. cannot,
Add 1 to n to make n+1, shift area 33 by one recording track in the direction of arrow B (60), and m=
1 (35) to set a new area 33 and operate as described above to explore the giant dropout. Then, when n+9 becomes greater than or equal to the maximum V address value n _nax (37), the area 33 can no longer move in the direction of arrow B, so the search operation for the giant dropout is stopped.

In addition, a huge dropout was displayed (52)
It goes without saying that the area 33 can be further moved from there to continue the operation or end the operation so that the next giant dropout can be searched and displayed.

6A and 6B are block diagrams showing a specific example of a circuit configuration that performs the operation shown in FIG. 5, in which 61 is a memory, 62, 63, 64, 65 are registers, 66,
67, 68, 69 are comparators, 70, 71, 72,
73 is an AND circuit, 74 is a flip-flop circuit (hereinafter referred to as FF), 75 is a counter, 76, 7
7 is an input terminal, 78, 79, 80 are inverters,
81 is a dropout width determination circuit (hereinafter referred to as D/O
82 and 83 are registers; 8
4, 85 are comparators, 86, 87 are AND circuits, 8
8 is a NOR circuit, 89 is an inverter, and 90 is an OR circuit.

Next, the operation of this specific example will be explained.

In FIGS. 6A and 6B, first, the input terminal 76,
By resetting FF74 and counter 75 with the reset pulse from 77 and specifying n,
Registers 6 input and 63 are set to values n and n+9, respectively, and registers 64 and 65 are set to m and m+13, respectively, where m is 1.

Therefore, the V address is read from the memory 61, and if it is less than n, the comparator 66 outputs "1".
A bit is generated commanding the next V address to be read. In this way, the V address is sequentially read out, and when it is greater than or equal to n and less than n+9, the comparator 6
“0” and “1” bits are generated from 6 and 67 respectively,
It is supplied to an AND circuit 72 through an AND circuit 70. FF74 (corresponds to counter 2 in Figure 5)
Since it is in the reset state, the output of the AND circuit 72 is "0" bit, and the inverter 78 outputs "1" bit.
It becomes a bit and sets the FF74, sets the value of n in the registers 62 and 63 to the value of the V address at that time, and sets this to the new n
be the value of

Therefore, the V address is sequentially read out again, and when the V address becomes equal to the value n of the register 62, the output of the AND circuit 72 becomes a "1" bit, instructing the reading of the H address for that V address.

Note that if there is no V address with a value between n and n+9 stored in the registers 62 and 63, the output of the comparator 67 becomes "1" from the inverter 79 when the output becomes "0" bit. The bits are obtained and decisions 48 and 54 of FIG. 5 are made, as described below.

The above are the operations of process 34 to determination 42 in the flowchart of FIG.

Now, when a command is given to read the H address, the H address is read out from the memory 61 to the comparators 68 and 69, and the values m and m are read from the registers 64 and 65, respectively.
Compared to +13. When the H address is m or more, a “0” bit is output from the comparator 68, and m
When the value is less than +13, the comparator 69 outputs a "1" bit. When the H address is less than m, the “1” bit output of the comparator 68 is the next H address.
Commands address reading. Then, the H address is read out sequentially, and when the H address is m≦H address≦m+13, the AND circuit 71 outputs a “1” bit, which is supplied to the AND circuit 73.

On the other hand, along with reading the H address, the memory 6
The D/O width information is read out from 1 to the D/O width determination circuit 81, and a "1" bit is supplied to the AND circuit 73 when the D/O width is less than 1 mm. Therefore, the "1" bit output from the AND circuit 71 passes through the AND circuit 73, and the counter 75 (corresponding to counter 1 in FIG. 5) counts by 1 based on this "1" bit, and also outputs the next V address. command to read.

In addition, when the D/O width is 1 mm or more, the D/O
The width determination circuit 81 resets the FF 74 and instructs the display of D/O. The D/O width determination circuit 81 can be configured with a comparator.

Further, when the H address exceeds the value m+13, a "0" bit is output from the comparator 69, which is inverted by the inverter 80 and issues a command to read the next V address.

The above are the operations of determination 43 to process 47 and process 53 in the flowchart of FIG.

Next, the V address from memory 61 is the value n+9
When the value exceeds 1, the "1" bit of the inverter 79 instructs the FF 74 and the counter 75 to determine their values.

When this command is issued, the count number of counter 75 is supplied to comparators 84 and 85, and compared with the value 0 of register 82 and the value 3 of register 83, respectively.

When the count number of the counter 75 is 3 or more, a "0" bit is generated from the comparator 85, which is inverted by the inverter 89, and a D/O detection command is generated.

On the other hand, the comparator 84 generates a "0" bit only when the count number of the counter 75 is 0;
The AND circuit 86 to which the outputs of 4 and 85 are supplied is
When the count number of the counter 75 is 1 or 2, a "1" bit is generated, the values stored in the registers 64 and 65 are increased by 1, and the V address is read out again. This is the operation of determination 48, determination 49, and processing 57 in FIG.

When the count number of the counter 75 is equal to the value 0, the "0" bit from the comparator 84 is supplied to an AND circuit 87 and an OR circuit 88. The output signal from the FF 74 is also supplied to the AND circuit 87 and the OR circuit 88, but when the output of the FF 74 is a "0" bit, a "1" bit is obtained from the OR circuit 88, and n of the registers 62 and 63 is output. The value is set to n+10 and the V address is read out again. This is the operation of determination 48, determination 54, and processing 56 in FIG. Further, when the output of the FF 74 is a "1" bit, a "1" bit is obtained from the AND circuit 87, the values of the registers 64 and 65 are increased by 15, and the V address is read out again. This is the fifth
These are the operations of determination 48, determination 54, and processing 55 in the figure.

Note that the "1" bit from the AND circuits 86 and 87 resets the FF 74 and the counter 75 via the OR circuit 90.

In addition, in FIGS. 6A and B, judgment 3 in FIG.
7. Although the circuit configurations for the determination 38 and processing 60 are not shown, they are simply the registers 63 and 6.
Since the determination can be made by comparing the value of 5 with the values n _nax and 262, respectively, the disclosure in FIGS. 6A and 6B is omitted. Note that n _nax is the maximum value of detected V addresses.

FIG. 7 is a flowchart showing a specific example of the subroutine 50 and determination 51 for detecting a huge dropout in FIG. In this specific example, a series of dropouts between adjacent tracks is determined. In this specific example, if a dropout straddles three sequentially adjacent recording tracks, this dropout is determined to be a huge dropout. In Figure 8,
In the case of a dropout due to an elongated defect lying in the direction of arrow A or arrow B, the length is 476 μm x 3 = 1428 μm, which is 1 mm or more, so whether the dropouts existing in three consecutive recording tracks are connected? All you have to do is decide whether or not. Of course, the dropout caused by a defect lying in the direction of arrow c in Fig. 8 has a length of 58 μm x 3 = 174 μm when it spans three consecutive recording tracks, which also causes an error in regarding it as a huge dropout. , rather, the above error is allowed because it is necessary not to overlook the actual huge dropout.

Therefore, in FIG. 7, determination 49 (FIG. 5)
When the answer is "yes", counter 3 is reset (91), and the V address is read (92).
The value V ₁ is determined using the value n of the register 62 (FIG. 6A), and a V address satisfying n≦V ₁ ≦n+9 is obtained (93, 94). Next, the V address V ₂ next to this V address is read (95), and it is determined whether V ₁ and V ₂ are in order (96). Note that "in order" means that the values are consecutive integers. If they are not in order, the V address of V ₂ is set to the value V ₁ , and this V address and the next V address are read to determine the order (96), and in this way, the 27 V addresses are determined in sequence. . Finally, the value V ₁ becomes n+
If it exceeds 9, it is assumed that no giant dropout exists and the process moves to step 57 (FIG. 5).

If there are two V addresses with the values V ₁ and V ₂ in order, the H address of the value H ₁ for the value V ₁ is read out (97) and using the value m of the register 64 (FIG. 6A). Then, find the H address such that m≦H ₁ ≦m+13 (98, 99). And if the count number of counter 3 is zero (100),
The H address of value _H2 for value _V2 is read out (102).
Then, an H address satisfying m≦H ₂ m+13 is searched for (103, 104).

In this case, if at least one of the values H ₁ and H ₂ does not satisfy the above conditional expression, the process moves to searching for two sequential V addresses again.

When the values H ₁ and H ₂ both satisfy the above conditional expressions, it is determined whether or not dropouts are consecutive in the recording tracks whose adjacent V addresses are V ₁ and V ₂ (105).

This determination (105) uses the D/O width information detected by the dropout width counter 11 (FIG. 2) at H ₁ and H ₂ . That is, find the H address included in the D/O width from H ₁ and H ₂ , respectively,
It is determined whether there is a matching H address (including H ₁ and H ₂ ) for the recording tracks V ₁ and V ₂ . In this case, H in two adjacent recording tracks is
Address discrepancies must be corrected. For example, if there is a difference of 1 in the adjacent H addresses between the recording track of V ₁ and the recording track of V ₂ , then add 1 to the H address of the recording track of V ₁ and add the same address to the recording track of V ₂ . Determine whether there is an H address for the value.

If there is no matching H address, read the next H address of the _V2 recording track (102)
However, if there is a matching H address, the counter 3 counts "1" (106). Next, counter 3
If the count number of is not "2" (107), the value m is
The above-mentioned H address at _V2 is set to the value _H2 (108), and the above operation is repeated by setting the recording track of the V address at the above-mentioned value _V2 to the V address of the value _V1 .

Therefore, when the two V addresses of the next values V ₁ and V ₂ are in order, the count number of the counter 3 is not zero (100), so the value H ₁ equal to the above set m is read out (101 ), this is compared with the H address _H2 in _V2 to determine whether the dropout spans three recording tracks in sequence (105). If there is a straddle, the counter 3 counts "1" (106), and since the count number of the counter 3 becomes "2", it is determined that a huge dropout exists (107).

9A and 9B are block diagrams showing a specific example of a circuit configuration that performs the operation shown in FIG. 7, in which 61 is a memory;
114, 115 are registers, 116, 117, 1
18, 119, 120, 121 are comparison circuits, 12
2, 123 is a matching circuit, 124, 125, 12
6, 127, 128, 129 are AND circuits, 13
0,131 is OR circuit, 132,133,13
4,135 is an inverter, 136,137,13
8 is an adder circuit, 139, 140, 141, 14
2,143,144,145 are memories, 146,
147 is a subtraction circuit, 148, 149, 150 is a counter, 151, 152, 153, 154, 15
5 is a matching circuit, 156 and 157 are OR circuits, 15
8,159,160 are inverters.

Next, the operation of this specific example will be explained.

In FIG. 9A, first, the V address is read from the memory 61, and is supplied to the comparison circuits 116 and 117, and the values n and n of the registers 109 and 110, respectively.
Compared to +9. In this case, the value n is the value n accumulated in the register 62 (FIG. 6A) when the count number of counter 1 (counter 75 in FIG. 6A) is 3 or more in determination 49 in FIG. be equivalent to. At the same time, the counter 150 (FIG. 9B) is reset.

Comparing circuits 116 and 117 determine whether the read V address satisfies n≦V address≦n+9, and when this condition is satisfied, a “1” bit is generated from AND circuit 124. Note that when the V address does not reach the value n, a "1" bit is generated from the comparison circuit 116, and the OR circuit 1
30, a read command for the next V address is generated. Further, when the V address exceeds the value n+1, the comparator circuit 117 generates a "0" bit, and this "0" bit becomes a "1" bit in the inverter 132, causing processing 57 in FIG. 5 to be performed.

On the other hand, the V address that satisfies the above conditions is also supplied to the match circuit 122 and incremented by +1, and then the next V address is also read and supplied to the match circuit 122. Matching circuit 122 determines whether or not these V addresses match, and if they match, it generates a "1" bit to indicate that the two V addresses are in order. Therefore, the AND circuit 125 outputs a "1" bit based on the "1" bit from the AND circuit 124 and the "1" bit from the coincidence circuit. If the V address with the smaller value satisfies the above conditions but is not in the same order as the V address to be read subsequently, then the AND circuit 1
25 outputs a "0" bit, which is inverted by an inverter 133 and passes through an OR circuit 130 to generate a command to read the next V address.
Note that this next V address is the V address read next to the V address with the smaller read value.
address, and this V address is the comparator circuit 1
16 and repeats the same determination.

The above operations are the operations from process 91 to determination 96 in FIG.

The "1" bit from AND circuit 125 is supplied to AND circuit 128. In addition, at this time 2
Letting the values of the two V addresses be V ₁ and V ₂ , respectively, V ₁ +1=V ₂ .

Therefore, from memory 61, the H address for V address V ₁ is supplied to comparison circuits 118 and 119, and the H address for V address V ₂ is supplied to comparison circuits 120 and 121. The H address for V ₁ is determined by the value m of the register 111 and the value m of the register 112 in the comparison circuits 118 and 119.
The AND circuit 126 outputs a "1" bit when m≦H address≦m+13. If the H address does not reach the value m, the comparison circuit 118 generates a "1" bit and a read command for the next H address for _V1 is issued. Moreover, when the value m+13 is exceeded, the comparator circuit 119 outputs a "0" bit, and this "0" bit is inverted by the inverter 134 and outputted to the counter 1.
50 (Fig. 9B), and at the same time, the next V
A command for reading the address is generated and the previous operation is repeated again.

Furthermore, the H address for V ₂ is the comparator circuit 1
20, 121, and similarly, register 11
3 and 114, and it is determined whether m≦H address≦m+13. When this condition is satisfied, the AND circuit 127 outputs a "1" bit. If the H address for _V2 does not reach m, the comparison circuit 120 outputs a "1" bit and issues a command to read the next H address for _V2 . Furthermore, when m+13 is exceeded, the comparator circuit 121 outputs a "0" bit, and this "0"
The bit is inverted by an inverter 135, and an instruction for reading the V address is issued again via an OR circuit 130.

The outputs of the AND circuits 125, 126, and 127 are each "1" bit, and the counter 150
When the count number (FIG. 9B) is zero, the output of the AND circuit 128 becomes "1" bit, and the H address for V ₁ and V ₂ are output via the OR circuit 131.
Based on the H address and the D/O width information, a command is issued to determine whether or not the dropout straddles the recording tracks of V ₁ and V ₂ .

The above is the process 97, 98, 9 in FIG.
9, 100, 102, 103, and 104, and it has been found that a dropout exists in two adjacent recording tracks in the set area 33 (FIG. 4).

Now, in FIG. 9B, when the above command is issued by the "1" bit from the OR circuit 131 (FIG. _9A ), first, the H address (hereinafter referred to as H' ₁ address) is read out, an adder circuit 136 adds the value 1 from the memory 139, and an adder circuit 137 adds the value 1 from the memory 139.
is supplied and held. The addition of this value 1 is to compensate for the fact that the adjacent H addresses of V ₁ and V ₂ are shifted because the recording track 3 is formed diagonally on the magnetic tape 1, as shown in FIG. In this case, it is assumed that the difference is 1, that is, 1H.

Therefore, next, the H address for V ₂ (hereinafter,
_H′2 address) is read out and added to adder circuit 1.
38. Addition circuits 137 and 138
The H′ ₁ and H′ ₂ addresses are compared in a match circuit 152,
If they match, the counter 150 counts by 1,
At the same time, counters 148 and 149 are reset.
The count number of the counter 150 is determined by the coincidence circuit 154,
At step 155, it is compared with values 2 and 0 in memories 144 and 145, respectively.

If the count number of the counter 150 is not equal to the value 2, the "0" bit of the match circuit 154 is inverted by the inverter 159, and the value H' of the H address stored in the adder circuit 138 is stored in the register 115 (FIG. 9A). Accumulate ₂ . Also, since the count number of the counter 150 is no longer zero, the output of the coincidence circuit 155 becomes a "1" bit, and this "1" bit is supplied to the AND circuit 129 (FIG. 9A), and the output from the inverter 160 is The "0" bit is supplied to AND circuit 128 (FIG. 9A).

In this state, the "1" bit from the inverter 159 generates a command to read the next V address, and the above value _V2 is read out as _V1 and supplied to the comparison circuit 116 (FIG. 9A). ,Also,
The match circuit 122 determines whether or not the next V address, which is V ₁ and V _2, is in order as described above.

Therefore, when the two V addresses are in sequence, the H address for V ₁ that matches the aforementioned value H' ₂ stored in the register 115 (FIG. 9A) is detected by the matching circuit 123 (FIG. 9A). At this time, if the H address for V ₂ satisfies m≦H address≦m+13, a “1” bit is output from the AND circuit 129 (FIG. 9A), and the OR circuit 131 (FIG. 9A) is detected. ), a command is issued to determine whether or not dropouts straddle V ₁ and V ₂ .

Therefore, as mentioned above, the matching circuit 15
If a match is obtained at 2, the counter 150 further counts by 1 to make the count number 2. Since this count matches the value 2 stored in the memory 144, a "1" bit is generated from the matching circuit 154, and the area 3 where the huge dropout is set across three recording tracks is generated.
3 (FIG. 4) and generates a display command.

However, in the above case, as shown in FIG. 10A, the presence or absence of a dropout 161 extending in the width direction of the recording track 3 is detected, but as shown in FIG.
A dropout 161 that diagonally crosses the recording track must also be detected.

In FIG. 10B, now the recording track 3 ₁ ,
Let the V addresses of 3 ₂ and 3 ₃ be V ₁ , V ₂ , and V ₃ , and the recording positions of the horizontal synchronizing pulses be 4 ₁ , 4 ₂ , 4 ₃ , and 4 ₄ .

Therefore, assuming that the H addresses of adjacent tracks are different by 1, and the H address of recording position 4 ₂ with respect to V ₁ is H ₀ , then the H address of recording position 4 ₃ with respect to V ₁ = H ₀ + 1 H address of recording position 4 ₄ with respect to V 1 H address = H ₀ + 2 H address of recording position 4 ₁ for V ₂ = H ₀ H address of recording position 4 ₂ = H ₀ + 1 H address of recording position 4 ₃ = H ₀ + 2 However, as shown in Fig. 2 and From what was explained in Figure 3, for the dropout 161, for V ₁ , the H address value H ₀ and the D/O width information, and for V ₂ , the H address value H ₀ and the D/O width information. This is shown in Figure 9B.
If only the comparison is made using the matching circuit 152 described above, the dropout 161 shown in FIG. 10B will be missed.

Next, means for preventing this will be explained with reference to FIGS. 9B and 10B.

First, H accumulated in adder circuits 137 and 138
When the addresses do not match, the “0” bit output from the matching circuit 152 is inverted by the inverter 158 and becomes a “1” bit, and the D/O width information of the H address is subtracted from the V ₂ stored in the adder circuit 138. The value is supplied to the circuit 147 and is subtracted by a value representing the length corresponding to 1H on the recording track stored in the memory 141 (hereinafter referred to as 1H length information). When the difference between them is positive, the subtraction circuit 147 generates a pulse to set the counter 149 to 1.
only count. At the same time, the above difference value is held in the subtraction circuit 147. The value 1 of the counter 149 is added to the H address for V ₂ stored in the adder circuit 138 , and this H address is compared with the H address for V ₁ stored in the adder circuit 137 in the matching circuit 152 . This means that in FIG. 10B, the recording tracks 3 ₁ , 3
_2. The purpose of this is to determine whether or not a dropout exists between the respective recording positions 4 ₂ and 4 _{3 of} .

If the matching circuit 152 does not find a match, the subtracting circuit 147 subtracts again, and the adding circuit 1
Add 1 to 38. The count number of the counter 149 is compared with the value 4 from the memory 143 in the match circuit 153, and when the count number equals 4, the match circuit 153 generates a "1" bit and resets the counter 149 via the OR circuit 157. .
The counter 148 is similar, but the counter 149
The reason for resetting the D/O width information with a count number of 4 is that D/O width information of 1 mm or more is removed by judgment 46 in Figure 5, and all D/O width information of 1 mm or less with a count number of 4. This is to prepare for the next operation.

Then, when the difference in the subtraction circuit 147 becomes negative or when the match circuit 152 does not find a match even when the count number of the counter 149 reaches 4 (this determination is made, for example, when the difference between the subtraction circuit 147 and the match circuit 152
The output of the inverter 15 is ORed, and the inverter 15
All you have to do is AND the output of 8. ), adder circuit 13
D/O of H address for V ₁ accumulated in 7
The width information is supplied to the subtraction circuit 146 and the memory 140
If the difference is positive after subtracting the 1H length information of
Make 8 count by 1. So counter 14
The count number of 8 is added to the H address of the adder circuit 137. At the same time, the H address for V ₂ is stored again in the adder circuit 138, and the H addresses in the adder circuits 137 and 138 are compared in the matching circuit 152.

As described above, the value of the H address accumulated in the addition circuit 138 is sequentially changed according to the count number of the counter 149 for each value corresponding to the count number of the counter 148 of the H address accumulated in the addition circuit 137. The matching circuit 152 sequentially determines whether the values of the adder circuits 137 and 138 match. Then, the counts of counters 148 and 149 both become 4, and the coincidence circuit 1
If a match is not obtained in step 52, it is assumed that the dropout no longer spans between adjacent recording tracks, and the process moves on to the next operation, ie, process 102 in FIG.

Then, when the above operation is repeated and the count number of the counter 150 reaches 2, a "1" bit is generated from the coincidence circuit 154, and a display command is issued.

As described above, the area 33 (Fig. 4) in which a huge dropout may exist is set, and a command to display this area 33 is issued. All V and H addresses and D/O width information are read out sequentially, a pulse signal with a width corresponding to the D/O width information is formed, and is displayed at a timing corresponding to the V/H address, for example. , as shown in FIG. 11, the shape and size of the dropout can be displayed. In FIG. 11, 162 is the displayed area 33 (FIG. 4), 163 is the actual dropout, 164 is the displayed dropout, and the left side of the outline of the dropout 164 is the horizontal synchronization pulse (i.e., H address ).

As described above, a huge dropout can be automatically detected, and the cause of the dropout can be investigated by displaying the size, shape, etc. In this case, by specifying the value of n arbitrarily, it is possible to measure a huge dropout from any position on the magnetic tape, so for example, when the measurement operation is interrupted, the value of n can be memorized. If you do this, you can restart the measurement from the interrupted position, and if you want to display the defined dropout again, you can immediately display the desired dropout by specifying the value of n at that time. .

By the way, in the above embodiment, in FIG.
Regarding a dropout extending in the direction of arrow c, when the counter 150 (FIG. 9B) counts and the count reaches 2, it is determined to be a huge dropout, but in reality, this dropout is 58 μm x 3 = 174 μm. Well, it might not be a huge dropout. In that case, the measurement work will require wasted time. In this regard, it was previously determined that this is permissible.

However, in order to eliminate such wasted time, in the block diagram shown in FIG. In addition, a counter 150 counts when the counters 148 and 149 are both zero and a match is obtained in the match circuit 152, and another counter is provided so that the above-mentioned another counter starts counting when a match is obtained in the match circuit 152. Then, when the count number of the other counter does not exceed a certain value of 3 or more, for example, the value 5, it may be configured such that when the count number of the counter 150 does not reach 2, it is determined that there is no huge dropout. The value of 5 is not exceeded because the maximum dropout of the area 33 (Fig. 4) extending in the direction of arrow c in Fig. 8 crosses 10 recording tracks. This was set because there is a possibility that area 33 (Fig. 4) has a diamond shape and a dropout straddles the adjacent area. do not have.

It should be noted that the numerical values shown in the above embodiments are simply adopted to make the explanation concrete, and the present invention is not limited thereto. Furthermore, the circuit configurations shown in each block diagram are not limited to these. That is, these block diagrams are shown as an example to explain the operation of the microcomputer 6 in FIG. 2 to search for a giant dropout.

As explained above, according to the present invention, a huge dropout larger than a set size can be automatically, quickly, and accurately detected, and the shape and size of the huge dropout can be displayed. This makes it possible to easily investigate the cause of dropouts, and provides a method for measuring large dropouts that has excellent functionality and eliminates the drawbacks of the prior art.

[Brief explanation of drawings]

FIG. 1 is an explanatory diagram showing an example of a recording pattern of a conventional magnetic tape, FIG. 2 is a block diagram showing an embodiment of a giant dropout measuring method according to the present invention, and FIG. 3 is a dropout detection operation of FIG. FIG. 4 is an explanatory diagram showing the principle of searching for the giant dropout in FIG. 2, FIG. 5 is a flowchart showing the search operation for the giant dropout in FIG. 2, and FIGS. A block diagram showing a specific example of a circuit configuration for the search operation shown in FIG.
FIG. 7 is a flowchart showing the huge dropout determination processing operation in the flowchart of FIG.
10A and 10B are diagrams for explaining a part of the operation of FIG. 9B, and FIG. FIG. 3 is an explanatory diagram showing an example of dropout. 5...VTR, 6...Microcomputer,
8... Vertical synchronous pulse counter, 9... Horizontal synchronous pulse counter, 10... Dropout detector, 11... Dropout width counter, 12...
...Oscillator, 13...Display device.

Claims (1)

[Claims] 1. Counting the vertical synchronizing pulses of a video signal reproduced from a magnetic tape and the horizontal synchronizing pulses for each vertical synchronizing pulse, and calculating the number of vertical synchronizing pulses when a dropout is detected from the video signal. Let the count number be a V address representing the position where the dropout occurs in the longitudinal direction of the magnetic tape, and let the count number of the horizontal synchronizing pulse be the H address representing the position where the dropout occurs in the width direction of the magnetic tape.
In the method for measuring a gigantic dropout, in which information on the width of the dropout is obtained as well as the address, a predetermined size including the occurrence position of at least one of the dropouts on the magnetic tape is determined from the detected V address and H address. a large dropout of a predetermined size or more, and determines whether or not there is a huge dropout larger than a predetermined size in the area from the V address, H address indicating the position included in the area, and the width information of the dropout. , When the giant dropout is in the area, the giant dropout is displayed using the area as the display area, and when there is no giant dropout in the area, the next area is similarly set and the presence or absence of the giant dropout is displayed. A method for measuring a huge dropout characterized by determining and displaying.