JPH04339487A - Television receiver - Google Patents

Abstract

PURPOSE:To apply the existing television system to an EDTV system, as well by generating an interpolation scanning line by an arithmetic operation between frames and a signal processing of a signal series of an interlace scanning. CONSTITUTION:A television VS demodulated in a base band area is converted into a digital signal series by a sampling operation by an A/D converting part 1. In a YC separating part 2, a separating operation of a multiple signal is executed, and it is separated into a luminance signal component Y and a chrominance signal component C. A demodulating part 3 executes a synchronous detection operation to the chrominance signal component C by a chrominance subcarrier fSC and demodulates it to color difference signals I, Q. In an interpolation scanning line generating part 4, a signal of an interpolation scanning line required for an image display of a sequential scanning is generated from a signal of an interlace scanning. As a result, there is no problem of deterioration of a picture quality caused by a detection omission, etc., of motion information, and a high picture quality can be realized by a simple signal processing. In such a way, in both the existing television system and the EDTV system in which a finish scanning conversion is constituted by a multiple signal by a pair of field lines, an image of a high quality can be displayed.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a television receiver, and more particularly to a television receiver suitable for receiving television signals of the current television system and the EDTV system that is compatible with the current system.

0002

[Prior art] Current television system (NTSC system)
As one of the EDTV systems that is compatible with the current television system and enables high-quality television images, it uses frame-complete scan conversion on the transmitting side to generate an interlaced scan signal sequence similar to that of the current television system. There are television signals that are generated and multiplexed color signal components and the like in the form of field line pairs to form a television signal. This method allows reproduction of high-quality images with excellent resolution characteristics without performing motion-adaptive signal processing on the receiving side.

0003

The transition from the current television system to the above-mentioned EDTV system is a gradual process, and in the early stages of introduction, a mixture of both systems is used. Therefore, it is necessary for the television receiver to have a function capable of receiving both types.

[0004] An object of the present invention is to improve the current television system,
To provide a television receiver capable of realizing high-quality image reproduction for any television signal of the EDTV system by simple signal processing.

[0005]

[Means for Solving the Problems] In order to achieve the above object, the present invention applies two-dimensional YC separation processing to television signals of the current television system, and separates signals of scanning lines within the same field. Interlace used ~
Performs signal processing for scan conversion to progressive scanning to achieve high image quality.

[0006] Furthermore, in the present invention, in scan conversion from interlaced to progressive scanning for EDTV television signals, multiple types of selectable interpolation frame signals are used to adjust the scanning according to the viewer's preference. Achieve high image quality according to your needs.

[0007]

[Operation] The present invention does not perform complex signal processing such as motion adaptive processing used in IDTV etc. on the television signal of the current television system, but uses two-dimensional YC separation processing with fixed parameters, Since scan conversion processing to sequential scanning is performed using signals, there is no problem of image quality deterioration due to failure to detect motion information, etc., and high image quality can be achieved with simple signal processing.

[0008] Furthermore, for EDTV television signals, multiple types of interpolation frames can be selected in the scan conversion process to progressive scanning, such as repeating the previous frame or the average value of the signals of the previous and next frames. It is possible to provide high-quality images according to the viewer's preferences.

Furthermore, according to the present invention, costs can be reduced by sharing signal processing between the current television system and the EDTV system.

0010

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows the overall block configuration of a first embodiment of the present invention. The television signal VS demodulated into the baseband domain is converted into a digital signal sequence by sampling operation in the AD converter 1. The YC separation unit 2 performs a separation operation on the multiplexed signal and separates it into a luminance signal component Y and a color signal component C. The demodulator 3 demodulates the color signal component C into color difference signals I and Q by performing a synchronous detection operation on the color subcarrier fsc. The interpolation scanning line generation unit 4 generates interpolation scanning line signals necessary for progressive scanning image display from an interlaced scanning signal sequence. The RGB conversion unit 5 converts the luminance signal and color difference signal into three primary color signals R, G, and B by matrix calculation operation. The time axis conversion unit 6 compresses the time axis of the signal series of the main scanning line and the interpolation scanning line by half and rearranges the order.
Convert to a progressive scanning signal sequence. The signal series converted into analog signals by the DA converter 7 is supplied to the progressive scanning display section 8, which displays a high-quality image in the form of progressive scanning. In addition,
A control signal generator 9 generates various control signals, clock signals, etc. necessary for the operation of each part.

Next, the configuration of each block will be explained based on an embodiment. FIG. 2 shows an embodiment of the YC separation unit 2. The LPF circuit 10 extracts the components of the television signal below 2 MHz as a luminance low frequency signal YL. Subtraction circuit 1
1 subtracts the YL signal from the television signal and extracts components of 2 MHz or higher as the Y&C signal. The 262-line delay circuit 12 and the 1-line delay circuit 13 perform separation processing by arithmetic operations between signals delayed by 262 lines and 1 line period, respectively. In the current system (NTSC system) television signal, the phase of the color signal C is inverted every line period, so the color signal is separated by a line comb filter. That is, 1
A coefficient multiplication circuit 14 multiplies each output signal of the line delay circuit 13 by coefficient values 1/4, 1/2, and 1/4, and an addition circuit 15 adds these signals to produce a luminance signal component YM.
Extract S. Then, the subtraction circuit 11 performs a subtraction operation on this signal component to extract the color signal component CS. On the other hand, E
Separation circuit 16 for DTV television signals
Separation processing is performed to separate and extract the luminance signal component YME and color signal component CE. The switch circuit 17 selects signal sequences corresponding to the current system and the EDTV system based on the system identification signal FCT detected by the control signal generator 9, and outputs them as a brightness mid-range signal YM and a chrominance signal C. Then, in the adder circuit 15, the luminance signal Y is separated and extracted by performing an addition operation with the luminance low-frequency signal whose time delay has been adjusted in the delay circuit 18.

FIG. 3 shows one form of an EDTV television signal constructed by frame complete scan conversion and signal multiplexing of field line pairs.
(a) shows the signal spectrum, and (b) shows the multiplexing form of field line pairs. As shown in the same figure (b), the brightness middle range signal YM and the color signal C are the scanning lines L1, L3, L5, ... of the first field, and the scanning line L2 of the second field.
, L4, L6,..., the pair of scanning lines L1, L2, L3
, the same component YM for the pair L4 and the pair L5, L6, respectively.
1, YM2, YM3, and C1, C2, C3 are assigned. Therefore, the YM and C components can be separated by arithmetic operations between the signals of these pairs of scanning lines.

FIG. 4 shows an embodiment of the separation circuit 16 for this EDTV system. signal Y&C, and this 26
The signal DLY delayed by three lines is input to an addition circuit 19 and a subtraction circuit 20. The adder circuit 19 (DLY+Y&
C) Extract the luminance component by calculating /2. The extracted signal and the signal delayed by 263 lines by the 263-line delay circuit 21 are input to the switch circuit 17. The switch circuit 17 selectively outputs signals alternately in the field period in accordance with the control signal FSL, and separates and extracts the luminance middle range signal YME of the field line pair as shown in the figure. On the other hand, the subtraction circuit 20 extracts the color component by calculating (DLY+Y&C)/2. Then, the 263-line delay circuit 21
A signal delayed by 63 lines and having its polarity inverted by the polarity inverting circuit 22 is input to the switch circuit 17. The switch circuit 17 selectively outputs alternately every field period in accordance with the control signal FSL, and separates and extracts the color signal EC as shown in the figure.

Note that in this embodiment, the luminance middle range signal YM
E has the same component in pairs of scanning lines L1 and L2, L3 and L4, etc., and as will be described later, in image display using a progressive scanning system, image quality deteriorates in diagonal lines with a high vertical frequency. FIG. 5 shows an embodiment of the separation circuit 16 that reduces this image quality deterioration. As for the color signal, the signal CE is similar to the embodiment shown in FIG.
Separate and extract. On the other hand, regarding the luminance signal, the adder circuit 1
The luminance component obtained from step 9 and the signal delayed by one line by the one-line delay circuit 13 are input to the adder circuit 19 to generate the average value of both (for example, (YM1+YM2)/2),
62-line delay circuit 12. Switch circuit 17
is alternately selected and outputted every field period according to the control signal FSL to separate and extract the luminance middle range signal YME. As shown in the figure, this signal is generated from the average value of the signals between the scanning lines of the first field in the scanning lines of the second field.

Next, an embodiment of the demodulator 3 is shown in FIG. The separated and extracted color signal C is subjected to synchronous detection using the color subcarrier fsc in the synchronous detection circuit 23, and then sent to the LPF circuits 24, 2.
In step 5, predetermined low frequency components are extracted and the color difference signals I and Q are demodulated. On the other hand, the separated and extracted luminance signal Y is sent to the delay circuit 26
The delay time associated with the demodulation operation of the color signal C is adjusted. FIG. 7 shows an outline of a method for generating an interpolated scanning line signal IP for the current television system and FDTV system. In the case of the current television system, the signal of the interpolated scanning line (scanning line indicated by diagonal lines in the figure) is generated by the average value of the signals above and below the scanning line transmitted in the form of interlaced scanning. On the other hand, in the case of the EDTV system, the signal sequence of one frame of the progressive scanning system constitutes the signal sequence of one frame of the interlaced scanning system by frame-complete scanning conversion. That is, the signal sequences of the first and second fields of interlaced scanning are generated by rearranging the signal sequences of the same frame of progressive scanning. Therefore, the interpolated scanning line signals in the first field are generated using the transmitted signals of the scanning lines L2, L4, . . . in the second field. On the other hand, in the second field, interpolated scanning line signals are generated by frame interpolation. This figure shows the generation of interpolated scanning lines when frame interpolation is performed by repeating the previous frame. In this case, the interpolated scanning line signals of the second field are generated using the signals of the scanning lines L1, L3, L5, . . . transmitted in the first field. Note that when frame interpolation is performed by averaging the previous and subsequent frames, all scanning lines of the second field become interpolated scanning lines, and these interpolated scanning lines are the same as those of the previous and subsequent first fields. Generated by the average value of the signal sequence.

FIG. 8 shows an embodiment of the interpolation scanning line generation section 4. 262 line delay circuit 12, 1 line delay circuit 13
By arithmetic operations between the signals obtained by the combination of
The main signal M corresponding to the scanning line shown as the transmission scanning line in FIG.
and an interpolation signal IP corresponding to the interpolation scan indicated by diagonal lines. In the case of the current television system, the main signal M
is S3, and the interpolation signal IP is the average IPS (IPS=(S2+
S3)/2) is selectively outputted by the switch circuit 17 according to the control signal FCT.

In the case of the EDTV system, the signal ME is selectively output as the main signal M, and the signal IPE is selectively output as the auxiliary signal IP. Signals ME and IPE are generated by signals S3 and S1 during the first field. On the other hand, in the second field period, the control signal MOD selects either one of the signal sequences obtained by frame interpolation using the previous frame repetition method or the averaging method of the previous and subsequent frames, and these are the main signal M and the auxiliary signal. Output as IP. The viewer can select an interpolation frame using the control signal MOD. Note that the interpolation scanning line generation section 4 generates a main signal and an interpolation signal by performing signal processing of the configuration shown in FIG. 8 for each of the luminance signal Y and color difference signals I and Q.

As described above, in the EDTV system, interpolated scanning lines are generated by rearranging signal sequences of interlaced scanning, and scanning conversion to a progressive scanning system is performed.

Therefore, by using the separation circuit 16 of the YC separation section 2 described above having the configuration shown in FIG. 5, deterioration in image quality due to diagonal lines etc. can be reduced.

Next, an example of the RGB converter 5 is shown in FIG.
Shown below. Main signals MY, MI, MQ of luminance signal and color difference signal
, and interpolation signals IPY, IPI, and IPQ are subjected to predetermined matrix calculation operations in a matrix calculation circuit 27, respectively, to generate three primary color main signal sequences MR, MG, MB and interpolation signal sequences IPR, IPG, IPB.

FIG. 10 shows another embodiment of the RGB conversion section 5. In this embodiment, after the contour emphasizing circuit 28 performs an operation to improve sharpness by emphasizing high frequencies on the luminance signal component, the matrix arithmetic circuit 27 performs conversion into a signal sequence of three primary colors. It is preferable that the contour emphasizing circuit 28 performs high-frequency emphasis in a horizontal and vertical two-dimensional frequency domain, but in some cases, a horizontal one-dimensional frequency domain may be used.

Next, an example of the time axis converter 6 is shown in FIG.
Shown in 1. The main signal MR and the interpolation signal IPR are used for write operation (WT
operation) is written into the memory circuit 29. On the other hand, the read operation (RD operation) from the memory circuit is performed every one line period of the sequential scanning system at twice the operation speed of the WT operation. In this case, the main signal MR and interpolation signal IPR are read out by alternating RD operations every line period, and these signals are selectively outputted by the switch circuit 17 to generate a desired progressive scanning signal series R. . Note that the memory control circuit 30 generates signals necessary for RD and WT operations of the memory circuit 29 and selection control of the switch circuit 17.

Similar processing is performed on the signals MG, IPG, MB, and IPB, and the progressive scanning signal series G,
Generate B.

This concludes the description of the first embodiment of the present invention, which is capable of displaying high-quality images for television signals of both the current television system and the EDTV system. In this example, the EDTV television signal has the same aspect ratio (4:3) as the current television system, but recently, the screen has been made to have a wider aspect ratio in order to provide more realistic images. This is also being done.

Next, wide aspect ratio (for example, 16
FIG. 12 shows the overall block configuration of an embodiment of the present invention for the EDTV television signal of 9). The basic configuration is almost the same as that in FIG. 1, but the time axis converter 31
The processing is different.

FIG. 13 shows an example of image display on a wide aspect ratio display section. In an EDTV television signal, an image with a wide aspect ratio is displayed on the entire screen. On the other hand, if the current television signal is displayed as is, it will be displayed as a horizontally elongated image. Therefore, as shown in the figure, it is necessary to perform time compression processing on the signal of the current television system to 3/4 of that of the horizontal system, and display the image in the form of the original aspect ratio (4:3). This function is realized by the time axis converter 31.

FIG. 14 shows an embodiment of the time axis converter 31. As will be described later, the downsampling circuit 33 generates sample values at sampling points corresponding to 3/4 compression of the time axis in the case of the current television system, based on the system identification signal FCT. Then, data is written into the memory circuit 34 by a WT operation whose period is one line period of the interlaced scanning system. This WT operation is performed using WT addresses as shown in the figure, and pixel signals corresponding to a', b', and c' are written into the memory circuit. On the other hand, reading from the memory circuit is performed by an RD operation whose period is one line period in a sequential scanning system. In this RD operation, pixels corresponding to a', b', and c' are successively read out using consecutive RD addresses, and a progressive scanning signal sequence with a time axis compressed to 3/4 is generated.

On the other hand, in the case of the EDTV system, the downsampling circuit 33 outputs the same signal as the input signal, and the memory circuit 34 outputs the same WT, R as in the case of FIG.
Perform the D action.

The memory control circuit 35 receives the method identification signal FC.
According to T, signals necessary for WT and RD operations of a memory circuit compatible with the current television system and EDTV system are generated.

FIG. 15 shows an embodiment of the downsampling circuit 31. A signal delayed by one pixel in a one-pixel delay circuit 36 is subjected to coefficient weighting with coefficient values k1 and k2 in a coefficient multiplication circuit 14, and both are added in an addition circuit 15 to correspond to a signal sequence compressed by 3/4 of the time axis. Generate a sample point signal. Note that the coefficient values k1 and k2 have a period of 4 pixels as shown in the figure, and (k1, k2) are (1, 0), (2/3, 1), respectively.
/3), (1/3, 2/3), (0,0). The switch circuit 17 selects ED by the system identification signal FCT.
In the TV system, the output signal of the 1-pixel delay circuit 36 is selected, and in the current television system, the output signal of the adder circuit 15 is selected and output.

As described above, according to the second embodiment of the present invention, the current television system,
Both signals of the EDTV system can display high-quality images. In addition to the signal format shown in FIG. 3, the signal format of the EDTV system includes a format in which horizontal high-definition information is further multiplexed as a high-definition signal. An example of this is shown in FIG. In this method, the luminance high frequency signal YH is converted into a signal in the 2 to 4 MHz band by a frequency shift operation, and frequency-multiplexed as a high-definition signal YHH. In this case as well, the signal components corresponding to the color signal C, the brightness midrange signal YM, and the high-definition signal YHH take the form of field line pairs (the color signal C is shown in FIG.
1 frame shown in Figure 1, signals YM and YHH are configured in units of 2 frames). Further, these signals have a signal spectrum at the position shown in the figure in the time and vertical frequency domain of time frequency f and vertical frequency ν.

FIG. 17 shows the overall block configuration of an embodiment in which the present invention is applied to the EDTV system with the signal format shown in FIG. This embodiment is basically the same as the embodiment shown in FIG. 1 or 12, but the functions of separating and extracting the high-definition signal YHH and demodulating the luminance high-frequency signal YH are added. These functions are realized by the YC separator 37 and the demodulator 38.

FIG. 18 shows this YC separation section 37 and demodulation section 38.
This is an example. The low-luminance signal YL is separated and extracted by the LPF circuit 10, and this signal component is subtracted by the subtraction circuit 11, resulting in a mid-luminance signal YM, a color signal C, and a high-definition signal YH.
Extract the signal component in which H is mixed. The separation circuit 39 performs arithmetic operations between fields and frames of this signal,
The signal components of the brightness mid-range signal YM, high-definition signal YHH, and color signal C are separated and extracted. The high-definition signal YHH undergoes a synchronous detection operation using the subcarrier μ0 in the frequency shift circuit 40 to reproduce the luminance high-frequency signal YH demodulated to the original frequency band. These signals are added by an adder circuit 42 to generate a luminance signal Y. On the other hand, the color signal C is transmitted by the synchronous detection circuit 23.
performs synchronous detection using the color subcarrier fsc, extracts predetermined low frequency components in the LPF circuits 24 and 25, and generates the color difference signal I.
, Q.

FIG. 19 shows an embodiment of the separation circuit 39. The output signal Y&C of the subtraction circuit 11 and the signal DLY delayed by 263 lines are input to the separation circuit 16 whose configuration is shown in FIG. Separate and extract YM & YHH signal components mixed with high-definition signals. This YM&
1 by the YHH signal and the 1 frame delay circuit 44.
The signal FDLY delayed by the frame period is sent to the YM separation circuit 4.
Enter 5. This YM separation circuit 45 has the configuration shown in FIG. 4 (however, a 1-frame delay circuit is used instead of a 263-line delay circuit, and the switch circuit selects and outputs alternate signals every frame period), and performs calculations between frames. By the operation, the brightness mid-range signal YM and the high-definition signal YHH are separated and extracted.

As described above, the first to third embodiments of the present invention provide a television receiver that can reproduce television signals of the current television system and EDTV system as high-quality images through simple signal processing. can be realized.

Note that in any of the embodiments, it is preferable that the sampling frequency of AD conversion be four times the color subcarrier fsc, but in some cases it may be limited to this as long as it satisfies the sampling theorem. Never.

[0037]

According to the present invention, the present invention provides a television that can display both the current television system and the EDTV system, which is composed of frame complete scan conversion and signal multiplexing using field line pairs, as high-quality images. A receiver can be realized at low cost.

Further, according to the present invention, it is possible to select an image of a quality that matches the viewer's preference in EDTV images, and it is possible to provide a multifunctional image service.

[Brief explanation of drawings]

FIG. 1 is an overall block diagram of a receiver according to an embodiment of the present invention.

FIG. 2 is a block diagram of a YC separation section of a receiver according to an embodiment of the present invention.

FIG. 3 is an explanatory diagram of a signal format of an EDTV system in an embodiment of the present invention.

FIG. 4 is an explanatory diagram of a configuration example and operation of a separation circuit in an embodiment of the present invention.

FIG. 5 is an explanatory diagram of another configuration example and operation of the separation circuit in one embodiment of the present invention.

FIG. 6 is a block diagram of a demodulation section of a receiver according to an embodiment of the present invention.

FIG. 7 is an explanatory diagram of a generation form of an interpolated scanning line signal in an embodiment of the present invention.

FIG. 8 is a block diagram of an interpolation scanning line generation section of a receiver according to an embodiment of the present invention.

FIG. 9 is a block diagram of an RGB converter according to an embodiment of the present invention.

FIG. 10 is a block diagram showing another example of the configuration of the RGB converter according to the embodiment of the present invention.

FIG. 11 is an explanatory diagram of a configuration example and operation of a time axis conversion section according to an embodiment of the present invention.

FIG. 12 is an overall block diagram of a receiver according to a second embodiment of the present invention.

FIG. 13 is an explanatory diagram showing an example of image display in the second embodiment of the present invention.

FIG. 14 is an explanatory diagram of a configuration example and operation of a time axis conversion section in a second embodiment of the present invention.

FIG. 15 is an explanatory diagram of a configuration example and operation of a downsampling circuit in a second embodiment of the present invention.

FIG. 16 is an explanatory diagram of another signal form of the EDTV system in one embodiment of the present invention.

FIG. 17 is an overall block diagram of a receiver according to a third embodiment of the present invention.

FIG. 18 is a block diagram of a YC separation section and a demodulation section in a third embodiment of the present invention.

FIG. 19 is a block diagram of a separation circuit in a third embodiment of the present invention.

[Explanation of symbols]

1... AD conversion unit, 2... YC separation unit, 3... Demodulation unit, 4... Interpolation scanning line generation unit, 5... RGB conversion unit, 6... Time axis conversion unit, 7... DA conversion unit, 8... Sequential scanning display unit , 9... Control signal generation section, 10... LPF circuit, 11... Subtraction circuit, 12... 2
62 line delay circuit, 13...1 line delay circuit, 14...
Coefficient multiplication circuit, 15... Addition circuit, 16... Separation circuit, 17
...Switch circuit, 18...Delay circuit, 19...Addition circuit, 2
0... Subtraction circuit, 21... 263 line delay circuit, 11... Polarity inversion circuit, 23... Synchronous detection circuit, 24... LPF circuit,
25...LPF circuit, 26...delay circuit, 27...matrix calculation circuit, 28...contour emphasis circuit, 29...memory circuit, 3
0...Memory control circuit, 31...Time axis conversion section, 32...Wide aspect sequential scanning display section, 33...Down sampling circuit, 34...Memory circuit, 35...Memory control circuit, 3
6...1 pixel delay circuit, 37...YC separation unit, 38...demodulation unit, 39...separation circuit, 40...frequency shift circuit, 41...delay circuit, 42...addition circuit, 43...delay circuit, 44...1 frame delay circuit , 45...YM separation circuit.

Claims (4)

[Claims] 1. Means for identifying television signals of the current system and EDTV system; means for implementing YC separation processing and generation of interpolated scanning lines for the television signal of the current system by signal processing with specific characteristics; For EDTV television signals, field line pair signal components are separated by inter-field and inter-frame arithmetic operations, and interpolated scanning lines are generated by rearranging interlaced scanning signal sequences and frame interpolation processing. 1. A television receiver comprising a signal processing means and displaying an image signal sequence generated by the signal processing of the method identified above in a sequential scanning format. Claim 2: In a television receiver whose display unit has a wide aspect ratio different from that of the current system, the television signal of the current system is subjected to horizontal time axis compression processing, and the display unit has the same aspect ratio as the current system. 2. The television receiver according to claim 1, wherein the television receiver displays the image as an image. 3. The specific signal processing for the television signal of the current system is two-dimensional YC separation and generation of an interpolated scanning line by averaging the signals of the upper and lower scanning lines. television receiver. 4. The television set according to claim 1 or 2, further comprising means for generating a signal sequence of interpolated frames through a plurality of different frame interpolation processes, and a viewer can select any one of the signal sequences. John receiver.