JPH04337503A - Signal characteristic compensation circuit - Google Patents

Abstract

PURPOSE:To provide the signal characteristic compensation circuit capable of stably compensating signal characteristic at all times with simple circuitry and effectively preventing data errors. CONSTITUTION:An equalizer 5 equipped with a variable gain amplifier controlling the gain of the high frequency of a signal to be decoded and means 11 and 12 controlling the gain of the variable gain amplifier based on the frequency band of the reference data of a signal to be decoded through this equlizer circuit 5, are provided.

Description

[Detailed description of the invention]

0001

[Industrial Field of Application] The present invention is a signal characteristic compensation circuit suitable for preventing data errors caused by changes in electromagnetic conversion characteristics due to differences in relative speed between a magnetic recording medium and a magnetic head, for example in a magnetic recording/reproducing device. It is related to.

0002

2. Description of the Related Art A magnetic disk that rotates at a constant speed is used as a magnetic recording medium, and a magnetic head is moved in the radial direction of the disk to form a large number of concentric or spiral tracks to record digital data. When reproducing the recorded data, the relative speed between the magnetic disk and the magnetic head changes between the outer and inner tracks of the magnetic disk, as shown by a and a' in FIG. Here, if the relative speed between the magnetic disk and the magnetic head is v, the recording frequency is f, and the recording wavelength is λ, then from the relationship λ = v/f, when the relative speed v changes, the signal with the same recording frequency f As a result, the recording wavelength λ changes, and as a result, the electromagnetic conversion characteristics change. For this reason, for example, when digital data is magnetically recorded and reproduced by MFM modulation and demodulation, the reproduced signal waveform on the outer circumferential side is as shown in FIG. 7A, and on the inner circumferential side, the reproduced signal waveform has deteriorated shoulder characteristics as shown in FIG. 7B. As a result, the high-frequency components of the reproduction response on the inner circumferential side shown in FIG. 8B are degraded compared to those on the outer circumferential side shown in FIG. 8A. Note that in FIGS. 8A and 8B, f1 indicates a reference frequency, and f2 indicates a frequency twice the reference frequency f1.

[0003] As a method of compensating for such signal characteristics, for example, Japanese Patent Laid-Open No. 60-20303 discloses a method of adjusting the relative playback output level based on the difference in relative speed between the magnetic recording medium and the magnetic head in accordance with the track. Record two types of signals consisting of different frequencies that can change, and
A system has been proposed in which an equalizer circuit corrects the reproduced output level based on the detected output level difference between different types of signals.

0004

However, the compensation method disclosed in the above-mentioned Japanese Patent Laid-Open No. 60-20303 has the problem that two types of signals must be recorded corresponding to the tracks. and the compensation characteristic is 2
Since the type of signal is fixed for each recorded track, there is a problem that it is not possible to cope with speed fluctuations, etc., and that the signal characteristics cannot always be compensated stably.

The present invention has been made in view of these conventional problems, and provides a signal characteristic compensation circuit that can always stably compensate for signal characteristics with a simple configuration and that can effectively prevent data errors. The purpose is to provide.

[0006]

[Means for Solving the Problems] In order to achieve the above object, the present invention includes an equalizer circuit having a variable gain amplifier that controls the gain of the high frequency of a signal to be demodulated, and a signal that is demodulated through the equalizer circuit. and means for controlling the gain of the variable gain amplifier based on the period width of the reference data of the signal.

[0007]

[Operation] That is, in this invention, as shown in a conceptual diagram in FIG. After being amplified by step 4, the signal is supplied to an equalizer circuit 5 having a variable gain amplifier that controls the gain of high frequencies to compensate for high frequency components. The output of the equalizer circuit 5 is supplied to a data demodulator 6 to demodulate the data, and the demodulated data is supplied to an output terminal 7 and a control circuit 8 such as a microcomputer, and is also supplied to a memory 10 via a gate generator 9. do. The gate generator 9 and the memory 10 are controlled by the control circuit 8 based on the demodulated data, so that the gate generator 9 extracts data serving as a reference for compensation from the demodulated data and stores it in the memory 10. The data stored in the memory 10 is repeatedly read out and supplied to the phase comparator 11, where it is compared with the reference clock from the reference signal generator 12 to determine the amount of phase shift corresponding to the relative speed between the magnetic disk 2 and the magnetic head 3. Based on this amount of phase shift, the gain of the variable gain amplifier of the equalizer circuit 5 is controlled to compensate for the high frequency range as shown by the symbol b' in FIG. However, in the case of a phase lag, on the contrary, the high frequency range increases, so compensation is performed as indicated by the symbol b in FIG. With this configuration, it is possible to obtain stable demodulated data with a simple configuration that requires some additional circuitry.

[0008]

Embodiment FIG. 3 shows a first embodiment of the present invention. This embodiment is applied to a hard disk drive, in which a magnetic disk 21 is rotated at a constant speed by a motor 22, a signal recorded on the magnetic disk 21 is read by a magnetic head 23, and the read signal is sent to an amplifier 24. After amplifying the signal, the signal is supplied to an equalizer circuit 25 to compensate for high-frequency components. Equalizer circuit 25
are an amplifier 25a and a high pass filter (HPF) 25b.
, voltage control amplifier (VCA) 25c and adder 25d
The output of the amplifier 24 is supplied to one input terminal of the adder 25d via the amplifier 25a, and the H
After extracting a high-frequency component with a frequency twice the recording reference frequency by supplying it to the PF25b, the high-frequency component is sent to the VCA.
25c amplifies the signal and supplies it to the other input terminal of the adder 25d. In this way, the output of the equalizer circuit 25 obtained by adding the output of the amplifier 25a and the output of the VCA 25c in the adder 25d is supplied to the data demodulator 26 to demodulate the data.

The data demodulated by the data demodulator 26 is
Data is supplied to the output terminal 27 and is also supplied to the gate generator 28 to serve as a reference for compensation, and is stored in the memory 29 . The data stored in this memory 29 is repeatedly read out and supplied to a phase comparator 30, where it is compared with a reference clock from a reference signal generator 31 to detect a phase shift corresponding to the relative speed between the magnetic disk 21 and the magnetic head 23. Detect amount. This phase shift amount is supplied to the phase-voltage converter 32 to be converted into a voltage, and based on this voltage, the amplification degree of the VCA 25c of the equalizer circuit 25, that is, the gain at a frequency twice the recording reference frequency is controlled. The amount of compensation for the high frequency range of the signal characteristics is controlled by this. Note that in order to effectively compensate for the difference between the inner and outer circumferences of the magnetic disk 21, the reference data retrieval cycle of the gate generator 28 is set to be higher for the inner circumference than for the outer circumference, depending on the amount of high-frequency compensation. is set in advance so that it is short.

In this way, by extracting the reference data for compensation from the demodulated data, detecting the phase shift with respect to the reference signal, and controlling the amount of high frequency compensation in the equalizer circuit 25 based on this, the signal Characteristics can always be compensated stably and data errors can be effectively prevented.

FIG. 4 shows a second embodiment of the invention. This embodiment is applied to a magnetic card reading device. The signal recorded on the magnetic card 41 is read by the magnetic head 42, and the read signal is sent to the amplifier 4.
3 and then supplied to the equalizer circuit 44. The equalizer circuit 44 includes an amplifier 44a, HPFs 44b to 44d having different cutoff frequencies, a selection switch 44e for selecting these, a VCA 44f, and an adder 44.
g, and supplies the output of the amplifier 43 to one input terminal of the adder 44g via the amplifier 44a,
Supply in parallel to HPF44b~44d and select switch 4
The high frequency component is extracted by the HPF selected by 4e, the high frequency component is amplified by VCA 44f, and the adder 44g
so that it is supplied to the other input terminal of the In this way, in the adder 44g, the output of the amplifier 44a and the VCA
The output of the equalizer circuit 44, which has been added to the output of the equalizer 44f, is supplied to the data demodulator 45 to demodulate the data.

The data demodulated by the data demodulator 45 is
Data is supplied to the output terminal 46 and is also supplied to the gate generator 47 to serve as a reference for compensation, and is stored in the memory 48 . The data stored in the memory 48 is supplied to a control circuit 49 such as a microcomputer, where it is compared with a reference clock from a reference signal generator 50 to detect a phase shift corresponding to the relative speed between the magnetic card 41 and the magnetic head 42. Based on this amount of phase shift, the selection switch 44e of the equalizer circuit 44 is switched and the VC
By controlling the amplification degree of A44f, the amount of compensation for the high frequency range of the signal characteristics is controlled. Note that the control circuit 49
HPF44b to 44d and VCA4 are used to obtain the optimum equalized characteristic corresponding to the detected phase shift amount.
A table of 4f amplification degrees is stored in advance. Further, the data demodulated by the data demodulator 45 is also supplied to a control circuit 49, and the gate generator 47 and memory 48 are controlled by the control circuit 49 based on this demodulated data. Data serving as a reference for compensation is extracted and supplied to the memory 48 to update its contents.

In this embodiment, the magnetic card 4 to be inserted is
Reference data is recorded in advance at the insertion start position of No. 1, and when a magnetic card 41 is inserted, the data is read by a magnetic head 42, and the read signal is supplied to an equalizer circuit 44 via an amplifier 43. At this time, the equalizer characteristic of the equalizer circuit 44 is set to the characteristic with the highest reading probability. In this state, the reference data is separated by the gate generator 47 and stored in the memory 48, and the stored data and the reference clock from the reference signal generator 50 are compared by the control circuit 49, and the comparison result is Based on the amount of phase shift, the selection switch 44e is controlled to select a required HPF, and the amplification degree of the VCA 44f is controlled. This allows optimal equalization to be performed on the data after the reference data.
The amount of reading errors that occur can be significantly reduced.

As described above, in this embodiment, the equalizer circuit 44 has a plurality of H
Since the PFs 44b to 44d are provided and switched according to the relative speed, the insertion speed of the magnetic card 41 varies greatly depending on individual differences, and as a result, the relative speed between the magnetic card 41 and the magnetic head 42 fluctuates greatly. However, the signal characteristics can always be compensated stably, and data errors can therefore be effectively prevented.

FIG. 5 shows a third embodiment of the invention. This embodiment is applied to a magnetic tape reader. The signal recorded on the magnetic tape 51 is read by a magnetic head 52, and the read signal is sent to an amplifier 53.
After amplifying the signal, the signal is supplied to the equalizer circuit 54. The equalizer circuit 54 includes an amplifier 54a, HPFs 54b to 54d having different cutoff frequencies, a selection switch 54e for selecting these, a VCA 54f, and an adder 54g.
The output of the amplifier 53 is supplied to one input terminal of the adder 54g via the amplifier 54a, and the H
The selection switch 54 is supplied in parallel to PF54b to 54d.
The high frequency component is extracted by the HPF selected in e,
The high frequency component is amplified by the VCA 54f and supplied to the other input terminal of the adder 54g. In this way, in the adder 54g, the output of the amplifier 54a and the VCA5
The output of the equalizer circuit 54, which has been added with the output of 4f, is supplied to the data demodulator 55 to demodulate the data.

The data demodulated by the data demodulator 55 is
Data is supplied to the output terminal 56 and is also supplied to the gate generator 57 to serve as a reference for compensation, and is stored in the memory 58 . The data stored in the memory 58 is supplied to a phase comparator 59, where it is compared with a reference clock from a reference signal generator 60 to detect the amount of phase shift corresponding to the relative speed between the magnetic tape 51 and the magnetic head 52. Then, the amount of phase shift is converted into a voltage by the phase-voltage converter 61 to control the amplification degree of the VCA 54f of the equalizer circuit 54. Further, a mode selection circuit 62 for selecting a standard reproduction mode, a high-speed search mode, etc. is provided, and a mode signal selected by this mode selection circuit 62 is supplied to a control circuit 63 such as a microcomputer.
Based on the mode signal, the switching of the selection switch 54e of the equalizer circuit 54 is controlled, and the frequency of the reference clock generated from the reference signal generator 60 is controlled.

In this embodiment, in the standard reproduction mode, the mode signal causes the HPF 54 of a corresponding predetermined cutoff frequency to be activated via the control circuit 63.
c is selected, and the reference signal generator 60 generates a reference clock of a corresponding predetermined frequency. In this state, data recorded on the magnetic tape 51 is demodulated, reference data is separated from the demodulated data by a gate generator 57 and stored in the memory 58, and the stored data and reference signal are generated. A phase comparator 59 compares the reference clock from the device 60 to detect the amount of phase shift,
The amount of phase shift is converted into a voltage by the phase-voltage converter 61, and the amplification degree of the VCA 54f of the equalizer circuit 54 is controlled to perform high frequency compensation. In the high-speed search mode, the mode signal causes the control circuit 63 to select an HPF with a corresponding predetermined cutoff frequency, for example, H
While selecting the PF 54d, a reference clock of a corresponding predetermined frequency is generated from the reference signal generator 60, and high frequency compensation is performed in the same manner.

In this way, the equalizer circuit 54 includes a plurality of HPFs 54b to 5, each having a different cutoff frequency.
4d, select these according to the mode, and control the frequency of the reference clock generated from the reference signal generator 60 according to the mode, thereby stably compensating the signal characteristics in various modes. be able to.

The present invention is not limited to compensation of signal characteristics in the above-mentioned magnetic recording and reproducing apparatus, but can also be effectively applied to compensation of signal characteristics in optical recording and reproducing apparatuses and other recording and reproducing apparatuses.

[0020]

As described above, according to the present invention, the equalizer circuit is provided with a variable gain amplifier that controls the gain of high frequencies, and the gain of the variable gain amplifier is used as a reference for the signal demodulated through the equalizer circuit. Since the control is based on the periodic width of data, the signal characteristics can always be compensated stably with a simple configuration. Therefore, for example, in a magnetic recording/reproducing device, electromagnetic Data errors caused by changes in conversion characteristics can be effectively prevented.

[Brief explanation of drawings]

FIG. 1 is a conceptual diagram of the present invention.

FIG. 2 is a diagram for explaining the operation of FIG. 1;

FIG. 3 is a diagram showing a first embodiment of the invention.

FIG. 4 is a diagram showing a second embodiment of the invention.

FIG. 5 is a diagram showing a third embodiment of the invention.

FIG. 6 is a diagram for explaining a conventional technique.

FIG. 7 is a diagram for explaining the conventional technique.

FIG. 8 is a diagram for explaining the conventional technology.

[Explanation of symbols]

1 Motor 2 Magnetic disk 3 Magnetic head 4 Amplifier 5 Equalizer circuit 6 Data demodulator 7 Output terminal 8 Control circuit 9 Gate generator 10 Memory 11 Phase comparator 12 Reference signal generator

Claims (3)

[Claims] 1. An equalizer circuit having a variable gain amplifier that controls the high frequency gain of a signal to be demodulated; A signal characteristic compensation circuit comprising: means for controlling gain. 2. Means for extracting a reference portion of the signal to be demodulated, and means for storing the extracted signal so as to be repeatedly readable, the signal stored in the storage means being used as the reference data. 2. The signal characteristic compensation circuit according to claim 1, wherein the signal characteristic compensation circuit is configured to have the following characteristics. 3. The signal characteristic compensation circuit according to claim 1, wherein the equalizer circuit controls a gain at a frequency twice as high as a recording reference frequency of the signal to be demodulated.