JPH04333254A - Manufacture of solar cell - Google Patents

Abstract

PURPOSE:To enable a solar cell to be both enhanced and stabilized in output characteristics by a method wherein the substrate is controlled in heating time while abserving the change of the surface of the substrate in roughness rate with time. CONSTITUTION:A substrate 101 is heated by a substrate heater 102. A sensor 103 is provided with a white light irradiating part and a reflected light part used for measuring the roughness rate which and able to carry out a monoaxial scanning operation to a plane parallel with the substrate 101. The sensor 103 is connected to an optical reflectivity measuring device 105 through the intermediary a light transmission line 104. The substrate 101 is controlled in heating time as it is observed by the optical reflectivity measuring device 105 that the surface of the substrate 101 is changed in roughness rate with time. By this setup, the surface of the solar cell substrate 101 can be optimized in roughness rate, so that a solar cell can be enhanced and stabilized in output characteristics.

Description

[Detailed description of the invention]

0001

[Industrial Application Field] The present invention relates to a method for manufacturing a solar cell, and in particular, to a method of producing a solar cell by reflecting and scattering incident light transmitted through a semiconductor layer on the surface of a substrate and effectively utilizing the light absorbed by the semiconductor layer to output the light. This invention relates to a method for producing a solar cell with improved characteristics.

0002

[Prior Art] In a solar cell using a light-reflecting substrate, the light-reflecting surface is formed as a rough surface with unevenness to increase the optical path length of long-wavelength light with a small absorption coefficient and improve its output characteristics. The method is described, for example, in USP 4,126,150.
This is suggested in the description in column 7, lines 3 to 8 of the publication, and is also described in Japanese Patent Laid-Open No. 56-152276. Further, in Japanese Patent Application Laid-Open No. 59-104185, the optical effects of a roughened substrate are detailed.

[0003] Furthermore, Journal of Appl.
ied Physics magazine, Vol. 62, No. 7, p. 3016 (Th
omas C. Paulick. Oct '87), the optical reflection properties of amorphous silicon solar cells using silver textures are treated mathematically.

[0004] As a method for forming unevenness, Japanese Patent Application Laid-Open No. 54-1
In Publication No. 53588, wet etching is
In JP-A-58-159383, the sandblasting method, facet formation method, and codeposition method are described in JP-A-58-159383.
No. 14682 uses direct current electrolytic etching or chemical etching to roughen the aluminum surface, and JP-A No. 59-82778 uses a sputter etching method/sandblasting method, and JP-A No. 59-1041 mentioned above uses a sputter etching method/sandblasting method.
No. 85 discloses a phosphorography method, a transparent conductor deposition method using pyrolysis spray, an ion beam simultaneous deposition method, and an etching method, respectively.

[0005]

Problems to be Solved by the Invention The method of forming irregularities on the surface of a substrate during the formation of a solar cell according to the prior art has various problems as described below.

For example, in etching using a solution such as DC electrolytic etching or chemical etching, etching residue of the substrate remains on the surface of the substrate. If a semiconductor layer is laminated on top of this, there is a problem that the etching residue will diffuse into the semiconductor layer, degrading the characteristics of the solar cell. Furthermore, since such etching residue has low adhesion to the substrate, the semiconductor layer laminated thereon is likely to peel off, making it difficult to obtain a solar cell with uniform characteristics.

In addition, in the sandblasting method, since fine particles are sprayed onto the substrate to form unevenness, the slag generated by the fine particles sprayed onto the substrate may become the core of abnormal growth of the semiconductor layer. There is a problem that the adhesion of the layer is reduced. In addition, in the process in which the distortion of the substrate that occurs when forming the unevenness is alleviated over time,
There are problems in that it causes peeling of the semiconductor layer and deterioration of electrical characteristics.

Furthermore, when forming irregularities on the surface of a substrate by co-evaporation, at least two types of raw materials are deposited at the same time, which tends to cause non-uniformity in the deposited film, resulting in uneven characteristics of the manufactured solar cells. There is a problem in that it causes the occurrence of

[0009] In addition, all of the above methods require a special process to form an uneven surface on the substrate surface, making the process complicated and depending on the method used, an additional cleaning process is also required. Therefore, there is a problem that manufacturing costs increase.

Microwave CV used as part of the method for forming a semiconductor layer in the method for manufacturing a solar cell of the present invention
Method D is a method for forming other semiconductor layers, such as high-frequency CVD.
Compared to the method, it is possible to form a deposited film under lower pressure conditions. Therefore, it is possible to obtain a semiconductor deposited film with better electrical and chemical properties,
It also has the advantages of high utilization efficiency of raw material gas and fast deposition rate, and is an effective method for forming semiconductor layers for producing high-performance, low-cost solar cells.

However, when forming a semiconductor deposited film with high characteristics as described above using the microwave CVD method, it is necessary to maintain the substrate temperature at a relatively high temperature. Therefore, when producing solar cells using the microwave CVD method,
Depending on the substrate temperature and heating time, crystal grain boundaries of reflective metals formed on the substrate surface to increase the reflectance of visible light and the metals that make up the substrate gradually grow, and the roughness of the substrate surface increases over time. There is a problem in that the characteristics such as reproducibility and uniformity of the manufactured solar cell are deteriorated.

Furthermore, in the conventional method, a substrate heating treatment is performed after the roughening treatment of the substrate surface is completed. Therefore, as mentioned above, the roughness ratio of the substrate surface before substrate heat treatment and the roughness ratio of the substrate surface of the solar cell actually manufactured differ depending on the substrate heat treatment conditions, and the roughness of the substrate surface It becomes difficult to understand the relationship between the area ratio and the characteristics of the solar cell and find the optimum surface roughness ratio. As a result, the number of trials and errors required to determine the manufacturing conditions for the solar cell increases, resulting in a problem in that the manufacturing cost of the solar cell increases.

The present invention has been made in view of the problems of the above-mentioned prior art, and improves output by preventing deterioration of solar cell characteristics due to etching residue and fine particles remaining on the substrate. The purpose is to provide solar cells with stable and improved characteristics at low cost.

Furthermore, the present invention provides a high-performance solar cell that does not cause peeling of the semiconductor layer or deterioration of electrical characteristics during the process in which the distortion of the substrate that occurs when forming irregularities on the substrate surface is alleviated over time. The purpose is also to provide.

Furthermore, although the present invention uses the microwave CVD method which requires a relatively high substrate temperature, it is possible to monitor on the spot the change in roughness caused by the growth of grain boundaries of metal constituting the substrate surface. The present invention also aims to provide a solar cell with high reproducibility of output characteristics.

Furthermore, in the present invention, by performing the substrate heating step and the substrate surface roughness ratio optimization step simultaneously, the roughness ratio of the substrate surface can be determined at the stage when the semiconductor layer is actually formed. By understanding the relationship between the surface roughness of the substrate surface and the characteristics of the solar cell, it is easy to determine the optimum surface roughness, reducing the number of trials and errors required to determine the manufacturing conditions for solar cells, and as a result, improving the quality of solar cells. The aim is also to provide it at a low price.

[0017]

Means for Solving the Problems In order to achieve the above object, the present invention includes a doped semiconductor layer having a first conductivity type, an i-type semiconductor layer, and a doped semiconductor layer having a first conductivity type on a substrate. In the method for manufacturing a solar cell obtained by sequentially stacking doped semiconductor layers having a conductivity type different from the type, the first
In the substrate heating process when forming a doped semiconductor layer having a conductivity type, the substrate heating time is measured while observing how the roughness rate of the substrate surface changes over time using optical measurement means. It is for making adjustments.

In this case, silicon is used as the doped semiconductor layer having the first conductivity type, the i-type semiconductor layer, and the doped semiconductor layer having a conductivity type different from the first conductivity type. A non-single crystal semiconductor may also be used.

Further, at least one of the doped semiconductor layer having the first conductivity type, the i-type semiconductor layer, and the doped semiconductor layer having a conductivity type different from the first conductivity type. Microwave C as a method of forming
The VD method may also be used.

[0020]

[Operation] The substrate heating time is adjusted while observing how the roughness rate of the substrate surface changes over time using optical measurement means, so the roughness of the substrate surface of the solar cell actually manufactured is adjusted. The area ratio can be optimized.

[0021] "Roughness" of the substrate surface used in the present invention
refers to the degree of unevenness provided on the substrate surface to effectively utilize light transmitted through the semiconductor layer, and is defined by the average spacing of the uneven structure and the average height difference from the bottom to the top of the uneven structure. shall be carried out. Furthermore, the "optimal surface roughness" of the substrate surface used in the present invention means that the average interval between the uneven structures on the substrate surface is preferably 0.1 to 2 μm, more preferably 0.2 to 1 μm, from the bottom of the unevenness. The average height difference to the top is preferably 0.1 to 0.8 μm, more preferably 0.2 to 0.5 μm, and is determined as appropriate depending on the type and use of the solar cell to be manufactured. .

[0022] If the relationship between the height difference and the average spacing of the unevenness is known from the type of metal constituting the substrate surface, its thickness, substrate temperature, etc., the roughness ratio can be measured only by measuring the average spacing. It can be carried out.

[0023] Furthermore, the "roughness ratio optimization process" of the substrate surface employed in the present invention is performed simultaneously with the substrate heating process when forming the doped semiconductor layer having the first conductivity type. Specifically, the roughness ratio of the substrate surface, which gradually changes depending on the temperature and heating time of the substrate, is monitored by a "roughness ratio measuring means", while the heating time of the substrate is monitored, and the This is a step of adjusting the roughness ratio of the substrate surface to the above-mentioned "optimum roughness ratio" by adjusting the substrate temperature.

Generally, in the solar cell manufacturing process,
In order to prevent mutual diffusion of semiconductor layers and changes in film quality due to heat, a method is used in which the film formation temperature is lowered in the order in which each semiconductor layer is formed. Therefore, even if the method for forming the doped semiconductor layer having the first conductivity type is not the microwave CVD method, the method for forming the doped semiconductor layer having the first conductivity type is This means that the substrate temperature is the highest. This is the reason why, in the present invention, the substrate heating process and the roughness ratio optimization process are performed simultaneously when forming the doped semiconductor layer having the first conductivity type.

Furthermore, as the "roughness ratio measuring means" used in the present invention, a means for detecting the roughness ratio of the substrate surface by an optical method is used.

[0026] Hereinafter, the method of the present invention will be explained in detail with reference to the drawings, but the method of the present invention is not limited in any way by the examples listed below.

(Roughness Measuring Means) In the solar cell manufacturing method of the present invention, the following various methods may be used as the means for measuring the roughness of the substrate surface.

A method using a laser displacement meter using the principle of an optical micrometer, a light cutting method that observes the shape of reflected light from a slit light irradiated obliquely to the surface to be measured, and a method of scanning while shining light on the surface to be measured. The reflected light intensity method evaluates the surface roughness from changes in the intensity of reflected light, the scattered light distribution method uses the scattered light distribution to evaluate the surface roughness from the reflection angle distribution of light, and the maximum contrast of speckles caused by laser light is used. One example is the laser light speckle method for evaluating surface roughness.

FIG. 1 is a conceptual diagram of a surface roughness measuring device using a reflected light intensity method as an example of surface roughness measuring means used in the present invention.

The substrate 101 is heated by a heater 102 for heating the substrate. The sensor 103 has a white light emitting part and a reflected light receiving part for measuring the surface roughness ratio, and is capable of scanning in at least one axis in a plane parallel to the substrate 101. The sensor 103 described above is connected to a light reflectance measuring device 105 via an optical transmission line 104 made of a bundle of optical fibers, and a computer 106 for data analysis and control of various devices is connected to an interface 107 and a computer 106 for data analysis and control of various devices.
08, the light reflectance measuring device 105 and various devices (
(not shown). (Solar Cell) FIG. 2 is a conceptual diagram showing a typical configuration of a solar cell produced using the solar cell production method of the present invention.

The solar cell 201 has a conductive substrate 202, n
It is composed of a type semiconductor layer 203, an i-type semiconductor layer 205, a p-type semiconductor layer 200, a transparent electrode 207, a current collecting electrode 208, and an extraction electrode 209, and light enters through the transparent electrode 207.

FIG. 3 is a conceptual diagram showing another typical structure of a solar cell manufactured using the solar cell manufacturing method of the present invention.

The solar cell 301 of this typical example is a multi-band gap type solar cell, and is constructed by stacking two pin junction type solar cells using two types of semiconductor layers with different band gaps as the i-layer. ing.

The solar cell 301 includes a first n-type semiconductor layer 303, a first i-type semiconductor layer 305, and a first i-type semiconductor layer 305 on a conductive substrate 302.
A first p-type semiconductor layer 307, a second n-type semiconductor layer 309, a second i-type semiconductor layer 311 made of a semiconductor material having a wider band gap than the aforementioned first i-type semiconductor layer, and a second
p-type semiconductor layer 313, transparent electrode 314, and current collecting electrode 3
15, and it is assumed that light enters through the transparent electrode 314.

Note that in any of the solar cell examples, n
The stacking order of the type semiconductor layer and the p-type semiconductor layer can be changed depending on the purpose.

Each component of these solar cells will be explained below.

(Substrate) Conductive substrate 2 applicable to the present invention
Examples of the material of 02 include plates and films made of metals such as molybdenum, tungsten, titanium, cobalt, chromium, iron, copper, tantalum, niobium, zirconium, and aluminum, or alloys thereof. Among these, stainless steel, nickel-chromium alloys, and nickel, tantalum, niobium, zirconium, titanium metals and/or alloys are particularly preferred from the viewpoint of corrosion resistance. In addition, these metals and/or alloys can be used in films or sheets of synthetic resins such as polyester, polyethylene, polycarbonate, cellulose acetate, polypropylene, polyvinyl chloride, polyvinylidene chloride, polystyrene, polyamide, etc.
Those formed on glass, ceramic, etc. can also be used.

Although the substrate 202 can be used alone, it is desirable that a layer (hereinafter referred to as a reflective conductive layer) substantially reflective of visible light and conductive is provided on the substrate 202. As the material of the reflective conductive layer applicable to the present invention, silver, silicon, aluminum, an alloy thereof, or an alloy with iron, copper, nickel, chromium, or molybdenum can be applied. Among them, silver, aluminum, and aluminum-silicon alloys are preferred. Further, by increasing the thickness of the reflective conductive layer, it is possible to use the reflective conductive layer itself as a substrate.

[0039] Suitable methods for forming the reflective conductive layer on the surface of the substrate 202 include resistance heating evaporation, electron beam evaporation, sputtering, and the like.

(Electrode) In the solar cell produced using the method of the present invention, an appropriate electrode is selected and used depending on the configuration of the device. Examples of these electrodes include a lower electrode, an upper electrode (transparent electrode), and a current collecting electrode.

Specifically, the electrodes include the substrates 202 and 302 and the n-type semiconductor layers (or p-type semiconductor layers) 203 and 303.
established between. Further, if the electrical resistance of the substrates 202 and 302 is sufficiently small, the substrates can also serve as the lower electrode.

Materials for the lower electrode preferably used in solar cells applicable to the present invention include silver (Ag) and gold (Au).
), platinum (Pt), nickel (Ni), chromium (C
r), copper (Cu), aluminum (Al), titanium (T
i), metals such as zinc (Zn), molybdenum (Mo), tungsten (W), or alloys thereof, and thin films of these metals are formed by vacuum evaporation, electron beam evaporation, sputtering, etc. In addition, care must be taken to ensure that the formed metal thin film does not become a resistance component to the output of the solar cell, and the sheet resistance value is preferably 50Ω or less.
More preferably, it is 10Ω or less.

[0043] The lower electrodes 202, 302 and the n-type semiconductor layer (
Alternatively, although not shown in the figure, a buffer layer such as zinc oxide (ZnO) may be provided between the p-type semiconductor layers 203 and 303 to prevent short circuits and to prevent electrode metal diffusion. . The effect of the buffer layer is that the lower electrodes 202, 30
In addition to preventing the diffusion of the metal elements constituting the buffer layer 2 into the n-type semiconductor layer (or p-type semiconductor layer), the buffer layer itself can be provided with a semiconductor layer in between by giving it some resistance. The influence of short circuits caused by defects such as pinholes between the lower electrodes 202, 302 and the upper (transparent) electrodes 207, 314 can be reduced, and the thin film can cause multiple interference to reduce the incidence of incident light. This can have effects such as confining the inside of the solar cell.

Suitable materials for the buffer layer include magnesium fluoride-based materials, indium, tin, cadmium, zinc, antimony, silicon,
Examples include materials selected from oxides, nitrides, fluorides, and carbides of chromium, silver, copper, and aluminum, or mixtures thereof. In particular, magnesium fluoride and zinc oxide are desirable because they are easy to form and have appropriate resistance and light transmittance as a buffer layer.

It is desirable that the transparent electrodes 207 and 314 have a light transmittance of 30% or more, and 80% or more, so that light from the sun, a white fluorescent lamp, etc. can efficiently pass through the semiconductor layer nine times. It is even more desirable that there be one. Furthermore, electrically, it is desirable that the sheet resistance value be 300Ω or less so as not to become a resistance component with respect to the output of the solar cell. Materials with such characteristics include SnO2 and In2.
O3, ZnO, CdO, Cd2 SnO4, IT
Examples thereof include oxides such as O(In2O3+SnO2) and IrOx, and metal thin films made of extremely thin and translucent metals such as Au, Al, and Cu. The transparent electrode is shown in Figure 2.
In a solar cell having the configuration shown in FIG. 3, it is stacked on p-type semiconductor layers (or n-type semiconductor layers) 206 and 313. As a method for producing these, a resistance heating evaporation method, an electron beam heating evaporation method, a sputtering method, a spray method, etc. can be used, and these are appropriately selected depending on the desire.

The current collecting electrodes 208 and 315 are transparent electrodes 20
7 and 314 are provided on the transparent electrodes 207 and 314 for the purpose of reducing the sheet resistance value of the electrodes 207 and 314. In the solar cell having the configuration shown in FIGS. 2 and 3, the transparent electrodes 207 and 314 are formed after the semiconductor layer is formed.
, 314 cannot be raised too high, and the sheet resistance of the transparent electrodes must be relatively high. preferable.

Materials for the current collecting electrode include Ag, Cr, and Ni.
, Al, Ag, Au, Ti, Pt, Cu, Mo, W, or an alloy thereof, or carbon. In addition, by using these metals or carbon in a layered manner, it is possible to combine the advantages of each metal or carbon (resistance, low diffusion into the semiconductor layer, robustness, easy electrode formation by printing, etc.). It can be used as In addition, the shape and area of the semiconductor layer are appropriately designed to ensure a sufficient amount of light incident on the semiconductor layer, but the shape must be such that it spreads uniformly with respect to the light-receiving surface of the solar cell, and Its area is preferably 15
% or less, more preferably 10% or less.

(Semiconductor layer) Semiconductor materials for the i-type semiconductor layer preferably used in the solar cell produced using the method of the present invention include a-Si:H, a-Si:F,
a-Si:H:F, a-SiC:H, a-SiC:F,
a-SiC:H:F, a-SiGe:H, a-SiGe
:F, a-SiGe:H:F, polycrystalline Si:H, polycrystalline Si:F, polycrystalline Si:H:F, and other so-called group IV and group IV alloy semiconductor materials.

Further, the amount of hydrogen atoms contained in the i-type semiconductor layer is preferably 20 atomic % or less, more preferably 10 atomic % or less.

The semiconductor material constituting the p-type or n-type semiconductor layer that is suitably used in the solar cell produced using the method of the present invention is the semiconductor material constituting the i-type semiconductor layer described above that has valence electron control. obtained by doping with an agent.

The semiconductor materials constituting these semiconductor layers may be the same or different. For example, the semiconductor material constituting the p-type or n-type semiconductor layer on the side where light enters may be a semiconductor material with a wide forbidden band width such as a-SiC:H, or a semiconductor material that absorbs in the visible light region such as polycrystalline Si:H. Semiconductor materials with small coefficients are suitable. In addition, in multi-bandgap solar cells, the i
The semiconductor material constituting the layer is a-SiG, which has a narrow band gap.
e:H etc. are suitable.

Further, in order to prevent the formation of barriers at semiconductor interfaces having different forbidden band widths, a buffer layer may be provided to continuously connect the forbidden band widths at the interfaces.

The raw material gas for semiconductor layer formation used in forming these semiconductor layers is a simple substance, hydride, halide, organometallic compound, etc. of the constituent elements of the various semiconductor layers mentioned above, and is used in the film forming space. Those that can be introduced in a gaseous state are preferably used.

Of course, these raw material gases can be used not only alone, but also in combination of two or more. Further, these raw material gases may be mixed with rare gases such as He, Ar, Kr, Xe, and Rn, and diluent gases such as H2, HF, and HCl, and then introduced.

Further, as a means for forming the above-mentioned semiconductor layer and for forming a deposited film that can be used in combination with the microwave CVD method, there are RFCVD method, sputtering method, reactive sputtering method, ion plating method, Photo CVD method, thermal CVD method, MOCVD method, MB
Examples include methods used for forming so-called functional deposited films, such as the E method and the HR-CVD method.

The procedure for manufacturing a solar cell using the method of the present invention will be explained in detail with reference to the drawings. In the description, a layer made of Ag to be used as a lower electrode and a layer made of ZnO to be used as a buffer layer are formed on a substrate in this order in advance, and then a layer made of Ag used as a lower electrode and a layer made of ZnO used as a buffer layer are formed on a substrate, and then a microwave CVD method as described below is applied.
An example will be described in which a solar cell having the structure shown in FIG. 2 is manufactured by forming each semiconductor layer using a method.

FIG. 4 is a conceptual diagram of a microwave CVD apparatus which is a semiconductor layer forming means used in the method of the present invention.

[0058] Substrate 1004 and heater 1005 in the figure
, sensor 1015, and optical transmission line 1016 have the same configuration as substrate 101, substrate heater 102, sensor 103, and interface 107 in FIG. Gas cylinders 1071 to 1076 are sealed with raw material gas for forming each semiconductor layer.
1071 is SiH4 gas cylinder, 1072 is GeH4
Gas cylinder, 1073 is H2 Gas cylinder, 1074
1075 is a PH3 gas (hereinafter abbreviated as "PH3/H2") cylinder diluted to 10% with H2 gas, and 1075 is a BF3 gas (hereinafter referred to as "PH3/H2") diluted to 10% with H2 gas.
BF3/H2) cylinder, and 107
6 is an Ar gas cylinder. Gas cylinder 1071-1
When installing 076, remove Si from gas cylinder 1071.
H4 gas, GeH4 gas from gas cylinder 1072,
H2 gas from gas cylinder 1073, gas cylinder 107
4, BF3/H2 gas from the gas cylinder 1075, and Ar gas from the gas cylinder 1076 are introduced into the respective gas pipes from the valves 1031 to 1036 by opening the valves 1051 to 1056, and the pressure regulator 1061 to 1066, the gas pressure in each pipe was adjusted to 2 kg/cm2.

A substrate 1004 in the figure is a heater 100.
It is attached to 5. Valves 1031 to 1036
Then, confirm that the leak valve 1009 of the deposition chamber 1001 is closed, confirm that the auxiliary valve 1008 and gas outflow valves 1041 to 1046 are open, and fully open the conductance (butterfly type) valve 1007. Then, the deposition chamber 1001 and the gas piping are evacuated using a vacuum pump (not shown). Deposition chamber 10
The reading of the vacuum gauge 1006 that displays the pressure within 0.01 is preferably 1 x 10-4 Torr or less, more preferably 1 x
When the temperature drops below 10-5 Torr, turn on the auxiliary valve 100.
8 and gas outlet valves 1041 to 1046 are closed.

Next, gas inlet valves 1031 to 103
6 is gradually opened to introduce each gas into mass flow controllers (MFC) 1021 to 1026.

After preparations for film formation are completed as described above,
A heating process for the substrate 1004 and a surface roughness optimization process are performed simultaneously, and then an n-type semiconductor layer 203, i
A type semiconductor layer 205 and a p-type semiconductor layer 206 are sequentially formed.

[0062] The substrate 1004 is heated to a temperature of preferably 200°C or higher, more preferably 250°C by a heater 1005.
Heat and hold to above temperature. The rotatable mesh grid 1014 is removed from the vicinity of the substrate 1004 by rotation. In this state, the roughness ratio of the surface of the substrate 1004 is measured by scanning the white light irradiation and reflected light receiving portion 1015 for measuring the surface roughness near the surface of the substrate 1004 in parallel with the surface using a driving device (not shown). Start. The irradiated light and the reflected light are transmitted through the optical transmission path 1016 that connects the inside and outside of the deposition chamber.

When the roughness rate of the substrate surface, which changes over time, reaches a predetermined value, the white light irradiation and reflected light receiving portion 1015 and the optical transmission path 1016 are removed from the vicinity of the substrate, and a rotatable mesh grid is formed. 1014 is placed near the substrate 1004 by rotating it. In this example, the formation of the semiconductor layer can be started immediately after the heating process for heating the substrate in the deposition chamber is completed.
The substrate heating step is completed when the surface roughness ratio becomes optimum. However, for example, if the substrate heating process is performed at a different location,
After the heating process is completed, the substrate is heated and held while being transported, and if it takes some time to form the semiconductor layer, the substrate heating process is finished before the optimum surface roughness is reached, and the semiconductor layer is heated. It is also possible to obtain the optimum surface roughness during formation.

After the substrate heating and roughness ratio optimization process is completed, after confirming that the valve 1008 is open, the gas outlet valves 1041 and 1044 are gradually opened to prevent dust from scattering in the deposition chamber 1001. SiH4 gas and PH3/H2 gas are introduced into the deposition chamber 1001 through the gas introduction pipe 1003. SiH at this time
4 Gas flow rate is 1 to 500 sccm, PH3/H2
Each mass flow controller 1 is adjusted so that the gas flow rate is 0.5 to 30% of the SiH4 gas flow rate.
Adjust with 021 and 1024. The pressure inside the deposition chamber 1001 is controlled by the conductance valve 1007 while watching the vacuum gauge 1006 so that the pressure within the deposition chamber 1001 becomes a desired pressure, preferably 50 mTorr or less, more preferably 20 mTorr or less.
Adjusted the aperture. Next, 0V from the DC power supply 1011
(i.e., no DC bias) to 100 V DC bias and the sum of 0 W (i.e., no high frequency bias) to 200 W high frequency power (frequency 13.56 MHz) from the high frequency power source 1012 is applied to the bias applying electrode 101.
Apply to 3. Thereafter, the power of a microwave power source (not shown) is preferably set to 100 W to 1200 W, more preferably 200 W to 800 W, and the power is passed through a waveguide (not shown), a waveguide section 1010, and a dielectric window 1002 to the deposition chamber 1002.
Microwave power is introduced into the substrate 1001 to generate microwave glow discharge, thereby forming an n-type semiconductor layer on the substrate 1004. When the thickness of the n-type semiconductor layer reaches a desired value, preferably 20 Å to 300 Å, more preferably 30 Å to 200 Å, the microwave glow discharge is stopped, and the outputs of the DC power source 1011 and the high frequency power source 1012 are turned off.
Also, valves 1041, 1044, and 1008 are closed to stop gas from flowing into deposition chamber 1001.

The next method for forming the i-type semiconductor layer 105 is as follows. The substrate 1004 is heated by a heater 1005 to preferably 150° C. or higher, more preferably 200° C. or higher, and held there. valve 100
8 is open, and then open the valves 1041 and 104.
3 is gradually opened to allow SiH4 gas and H2 gas to flow into the deposition chamber 1001 through the gas introduction pipe 1003. The SiH4 gas flow rate at this time is preferably 1
The mass flow controller 1021 is adjusted so that the flow rate is between sccm and 500 sccm. Further, the H2 gas flow rate is adjusted by the mass flow controller 1023 so that it is preferably between 0 sccm and 1000 sccm. The pressure inside the deposition chamber 1001 is preferably 10 mTo.
While watching the vacuum gauge 1006, adjust the opening of the conductance valve 1007 so that the desired pressure is less than or equal to 7 mTorr, preferably less than 7 mTorr. The rotatable mesh grid 1014 is removed from the vicinity of the substrate 1004 by rotation.

Next, the DC power supply 1011 supplies voltage from 0V to 1V.
00V DC bias and 0W to 200W high frequency power (frequency 13.56
MHz) is applied to the bias application electrode 1013. Thereafter, the power of a microwave power source (not shown) is preferably set to 100 W to 1200 W, more preferably 200 W to 800 W, and the power is set to 100 W to 1200 W, more preferably 200 W to 800 W. Introducing microwave power to generate microwave glow discharge,
An i-type semiconductor layer is formed on the previously formed n-type semiconductor layer. The thickness of the i-type semiconductor layer is preferably 1000 to 10
When the desired value of 000 Å, more preferably 1500 Å to 7000 Å is reached, the microwave glow discharge is stopped, the output of the DC power supply 1011 and the high frequency power supply 1012 is turned off, and the bulbs 1041, 1043, and 100 are turned off.
8 to stop the gas from flowing into the deposition chamber 1001. Next, a p-type semiconductor layer 106 is formed. Substrate 100
4 by heating heater 1005, preferably at 150°C.
The SiH
4 Gas, H2 gas, BF3 /H2 into gas introduction pipe 1
003 into the deposition chamber 1001. The SiH4 gas flow rate at this time is 1 sccm to 500 sccm
m, H2 gas flow rate is 10sccm to 1000scc
m, BF3/H2 gas flow rate is adjusted by mass flow controllers 1021, 1023, and 1025, respectively, so that it is 0.5% to 30% of the SiH4 gas flow rate. The pressure inside the deposition chamber 1001 is preferably 50 mTo.
While watching the vacuum gauge 1006, adjust the opening of the conductance valve 1007 so that the desired pressure is below rr, preferably below 20 mTorr. Next, a DC bias of 0V to 100V by the DC power supply 1011,
In addition, the sum of 0 W to 200 W high frequency power (frequency 13.56 MHz) from the high frequency power source 1012 is applied to the bias application electrode 1013. After that, the power of a microwave power source (not shown) is preferably set to 100W to 1200W.
W, more preferably 200 W to 800 W, and a waveguide (not shown), a waveguide section 1010 and a dielectric window 1002.
Microwave power is introduced into the deposition chamber 1001 through the wafer to generate microwave glow discharge, thereby forming a p-type semiconductor layer on the substrate 1004. The thickness of the p-type semiconductor layer is preferably 20 to 300 Å, more preferably 30 to 20 Å.
When the desired value of 0 Å is reached, the microwave glow discharge is stopped, the output of the DC power supply 1011 and the high frequency power supply 1012 is cut off, and the valves 1041, 1043, 104 are turned off.
5 and 1008 are fully closed to stop the gas from flowing into the deposition chamber 1001.

It goes without saying that when forming each layer, the valves 1041 to 1046 for gases other than those required are completely closed, and each gas is supplied to the deposition chamber 1001 and the gas outlet valve 1041. ~1046
In order to avoid remaining in the piping leading from to the deposition chamber 1001, valves 1041 to 1046 are closed, valve 1008 is opened, and conductance valve 1007 is closed.
If necessary, the system is fully opened and the system is evacuated to a high vacuum.

Finally, gas inlet valves 1031 to 10
36. Check that the leak valve 1009 of the deposition chamber 1001 is closed, and also check that the valves 1041 to 10
46 and the valve 1008 are open, and the conductance (butterfly type) valve 1007 is fully opened, and the deposition chamber 1001 is opened by a vacuum pump (not shown).
Then, the inside of the gas pipe is evacuated, and when the reading of the vacuum gauge 1006 becomes approximately 1 x 10-4 Torr, the gas outlet valve 1
041 to 1046 and the auxiliary valve 1008 are fully closed, the leak valve 1009 is opened to open the inside of the deposition chamber 1001, and the substrate 1004 has an n-type semiconductor layer, an i-type semiconductor layer, and a p-type semiconductor layer formed on the surface. Deposition chamber 100
Take it out from within 1.

[0069]

EXAMPLES The present invention will be explained in more detail with reference to Examples below, but the present invention is not limited thereto. (Example 1) Non-monocrystalline silicon solar cell 201 (Fig. 2
(see) was produced as follows.

An n-type semiconductor layer 203, an i-type semiconductor layer 205, and a p-type semiconductor layer 206 made of non-monocrystalline silicon were formed on a substrate 202 by microwave CVD. To form each semiconductor layer, microwave CV as shown in FIG.
D apparatus was used.

In this embodiment, the substrate 202 is a stainless steel (SUS304) plate with a size of 100 mm square and a thickness of 1.0 mm, and whose surface is mirror-finished, and the layer thickness is about 0.3 mm.
An unspecified silver (Ag) layer with a thickness of 1.0 μm is formed using a normal DC sputtering method, and a zinc oxide (ZnO) layer (not shown) with a thickness of about 1.0 μm is preliminarily formed on this layer using a normal RF sputtering method. The formed one was used. In this example, the silver layer is a metal constituting the substrate surface, and aggregates over time due to the heat applied in the substrate heating process, which causes a change in the roughness ratio of the substrate surface.

In this embodiment, each gas cylinder 10 in FIG. 4 is sealed with raw material gas for forming each semiconductor layer.
Among 71 to 1076, 1071 is SiH4 gas (
99.99% purity) cylinder, 1072 is H2 gas (
1073 is a PH3 gas (purity 99.99%) diluted to 10% with H2 gas.
9%, hereinafter abbreviated as "PH3/H2") cylinder,
1074 is a BF3 gas (purity 99.999%, hereinafter abbreviated as "BF3/H2") diluted to 10% with H2 gas, and 1075 is N2 gas (purity 99.999%).
99%) cylinder and 1076 is Ar gas (purity 99%).
．． 999%) cylinder.

When installing gas cylinders 1071 to 1076, SiH4 gas is supplied from gas cylinder 1071, H2 gas is supplied from gas cylinder 1072, and gas cylinder 1073 is supplied with SiH4 gas.
From PH3 /H2 gas, from gas cylinder 1074 B
F3 /H2 gas, N2 gas from gas cylinder 1075, Ar gas from gas cylinder 1076, valve 1
051 to 1056 were opened, the gas was introduced into each gas pipe from inlet valves 1031 to 1036, and the gas pressure in each pipe was adjusted to 2 kg/cm2 by pressure regulators 1061 to 1066.

Next, inflow valves 1031 to 1036
Check that the leak valve 1009 of the deposition chamber 1001 is closed, check that the outflow valves 1041 to 1046 and the auxiliary valve 1008 are open, and conductance (butterfly type) valve 1.
007 is fully opened, and the deposition chamber 1001 and the gas piping are evacuated using a vacuum pump (not shown). Vacuum gauge 1006
When the reading reaches approximately 1×10 −4 Torr, auxiliary valve 1008 and outflow valves 1041 to 1046 are closed.

Next, the inlet valves 1031 to 1036 were gradually opened to introduce each gas into the mass flow controllers 1021 to 1026.

After preparations for film formation are completed as described above,
A heating process and a surface roughness ratio optimization process for the substrate 1004 are performed simultaneously, and then an n-type semiconductor layer 203, an i-type semiconductor layer 205, a p-type semiconductor layer 206, and a transparent electrode 207 are formed on the substrate 1004.
, the formation of the current collecting electrode 208 was performed sequentially as follows.

The substrate 1004 is heated to and maintained at 300° C. by a heater 1005. The rotatable mesh grid 1014 rotates to rotate the substrate 100.
4, the white light irradiation and reflected light receiving portion 1015 for roughness measurement is scanned in the vicinity of the surface of the substrate 1004 parallel to the surface using a driving device (not shown), and the rough surface of the surface of the substrate 1004 is scanned. Start measuring the rate.

When the average spacing of the irregularities on the substrate surface, which change over time, reaches approximately 1 μm and the average height difference reaches 0.5 μm, the white light irradiation and reflected light receiving portion 1015 and the optical transmission line 1016 are removed from the vicinity of the substrate. The rotatable mesh grid 1014 is placed near the substrate 1004 by rotating it. In this example, since the substrate heating step and the roughness ratio optimization step were performed in the deposition chamber, it was possible to proceed to the formation of the semiconductor layer immediately after the heating step, and the roughness ratio of the substrate 1004 was set to the desired value. The substrate heating step was completed when the temperature reached . The time required to optimize the surface roughness after the substrate temperature was set to 300° C. was 23 minutes.

To form the n-type semiconductor layer 203 on the substrate 1004 whose surface roughness has been optimized as described above, the substrate 1004 is heated for 30 minutes using a heater 1005.
The gas outflow valves 1041, 10 are held at 0°C.
42, 1043 and the auxiliary valve 1008 to gradually open SiH4 gas, H2 gas and PH3/H2.
Gas was flowed into the deposition chamber 1001 through the gas introduction pipe 1003. At this time, the SiH4 gas flow rate was 10sc.
cm, H2 gas flow rate is 100sccm and PH3
/H2 Mass flow controllers 1021, 1022 and 1 so that the gas flow rate is 1.0 sccm.
Adjusted with 023. The pressure inside the deposition chamber 1001 is 5 mT.
While checking the vacuum gauge 1006, the opening of the conductance valve 1007 was adjusted so that the result was 0.0 orr. Next, a +100V DC bias from a DC power supply 1011 was applied to the bias application electrode 1013. Thereafter, the power of a microwave power source (not shown) is set to 400 W, and microwave power is introduced into the deposition chamber 1001 through a waveguide (not shown), a waveguide section 1010, and a dielectric window 1002 to generate a microwave glow discharge. The formation of an n-type semiconductor layer on the substrate 1004 was started.

After forming the n-type semiconductor layer 203 with a thickness of 200 Å, the microwave glow discharge is stopped, the output of the DC power supply 1011 is turned off, and the gas outlet valve 1041 is turned off.
, 1042, 1043 and the auxiliary valve 1008 were closed to stop the gas from flowing into the deposition chamber 1001, and the formation of the n-type semiconductor layer 203 was completed. Next, the i-type semiconductor layer 20
5, the substrate 1004 is heated by a heater 100.
5, and the outflow valve 1041 and the auxiliary valve 1008 were gradually opened to allow SiH4 gas to flow into the deposition chamber 1001 through the gas introduction pipe 1003. At this time, the SiH4 gas flow rate was 150 sccm.
It was adjusted using the mass flow controller 1021 so that The opening of the conductance valve 1007 was adjusted while checking the vacuum gauge 1006 so that the pressure inside the deposition chamber 1001 was 5 mTorr.

Next, the rotatable mesh grid 10
14 is rotated and removed from the vicinity of the substrate 1004, and the sum of the +60V DC bias from the DC power supply 1011 and the 100W high frequency power (frequency 13.56MHz) from the high frequency power supply 1012 is applied to the bias applying electrode 1013.
was applied to. Thereafter, the power of a microwave power source (not shown) is set to 300 W, and microwave power is introduced into the deposition chamber 1001 through a waveguide (not shown), a waveguide section 1010, and a dielectric window 1002 to generate a microwave glow discharge. let me,
Formation of the i-type semiconductor layer is started on the n-type semiconductor layer, and when the i-type semiconductor layer 205 with a thickness of approximately 4000 Å is formed, the microwave glow discharge is stopped, the output of the DC power supply 1011 and the high frequency power supply 1012 is cut off, and the outflow is started. The valve 1041 and the auxiliary 1008 were closed to stop the gas from flowing into the deposition chamber 1001, and the formation of the i-type semiconductor layer 205 was completed.

Next, to form the p-type semiconductor layer 206, the substrate 1004 is heated to 200° C. by the heating heater 1005.
gas outlet valves 1041, 1042, 104
4 gradually open and add SiH4 gas, H2 gas, BF.
3/H2 into the deposition chamber 10 through the gas introduction pipe 1003.
01. At this time, the SiH4 gas flow rate was 10 sccm, the H2 gas flow rate was 100 sccm, and the BF
3/H2 Each mass flow controller 1021, 1022, 102 so that the gas flow rate is 1 sccm.
Adjusted with 4. The pressure inside the deposition chamber 1001 is 5mTor.
The opening of the conductance valve 1007 was adjusted while watching the vacuum gauge 1006 so that the value was r.

Next, +100V from DC power supply 1011
A direct current bias of 100.degree. C. was applied to the bias application electrode 1013. Thereafter, the power of a microwave power source (not shown) is set to 400 W, and microwave power is introduced into the deposition chamber 1001 through a waveguide (not shown), a waveguide section 1010, and a dielectric window 1002 to generate a microwave glow discharge. Then, formation of a p-type semiconductor layer was started on the i-type semiconductor layer, and a p-type semiconductor layer with a layer thickness of 100 Å was
After forming the type semiconductor layer 206, the microwave glow discharge is stopped, the output of the DC power supply 1011 is cut off, and the outflow valves 1041, 1042, 1044 and the auxiliary valve 1008 are closed to stop the gas from flowing into the deposition chamber 1001. , the formation of the p-type semiconductor layer 206 has been completed.

Table 1 shows the conditions for manufacturing the solar cell described above.

[0085]

[Table 1] It goes without saying that when forming each layer, the outflow valves 1041 to 1046 for gases other than the necessary gases are completely closed, and each gas is
01, from the outflow valves 1041 to 1046 to the deposition chamber 1
001, the outflow valves 1041 to 1046 are closed, and the auxiliary valve 10
08 was opened, and the conductance valve 1007 was fully opened to temporarily evacuate the system to a high vacuum, as necessary.

Next, inflow valves 1031 to 1036,
Confirm that the leak valve 1009 of the deposition chamber 1001 is closed, and also close the outflow valves 1041 to 104.
6. Confirm that the auxiliary valve 1008 is open, fully open the conductance (butterfly type) valve 1007, evacuate the deposition chamber 1001 and gas piping with a vacuum pump (not shown), and check the reading on the vacuum gauge 1006. is about 1
When the temperature reaches ×10-4 Torr, the outflow valve 1041
1046 to 1046 and the auxiliary valve 1008 are closed, the leak valve 1009 is opened to leak the inside of the deposition chamber 1001,
A substrate 1004 on which an n-type semiconductor layer, a diffusion prevention layer, an i-type semiconductor layer, and a p-type semiconductor layer are formed is placed in a deposition chamber 10.
I took it out from inside 01.

Next, a transparent electrode 207 with a thickness of 700 mm is formed on the p-type semiconductor layer 206 of the non-monocrystalline silicon solar cell.
ITO (In2O3 +SnO2) with a thickness of 1.5 μm was vacuum-deposited using a known resistance heating vacuum evaporation method, and then Al with a layer thickness of 2 μm was deposited as a current collecting electrode 208 using a known resistance heating vacuum evaporation method. A monocrystalline silicon solar cell (Battery No. 1) was manufactured.

(Comparative Example 1) The same manufacturing conditions and method as in Example 1 were used, except that the roughness ratio was not optimized in the substrate heating process and the n-type semiconductor layer was formed immediately after heating the substrate. A non-monocrystalline silicon solar cell (Battery No.
Comparison 1) was manufactured.

First, the photoelectric conversion efficiency η of the solar cells manufactured in Example 1 (Battery No. Actual 1) and Comparative Example 1 (Battery No. Ratio 1) = {Maximum generated power per unit area (mW
/cm2)/incident light intensity per unit area (mW/c
m2)} was evaluated.

The solar cells of Example 1 (Battery No. Real 1) and Comparative Example 1 (Battery No. Ratio 1) were subjected to simulated sunlight (AM-1.5) using a solar simulator (Yamashita Denso, YSS-150). , 100 mW/cm2), a DC voltage was applied to the extraction electrode 209, the current-voltage characteristics were measured, and the open circuit voltage, short circuit current, fill factor, and photoelectric conversion efficiency η were evaluated. Comparative Example 1 ( Compared to the solar cell of cell No. 1), the solar cell of Example 1 (battery No. 1) had a short circuit current value of 1.26 times on average, and a photoelectric conversion efficiency η of 1 on average. .23 times better.

Next, the surfaces of the solar cells produced in Example 1 (Battery No. 1) and Comparative Example 1 (Battery No. 1) were observed using a scanning electron microscope (Hitachi, S-530). However, in Example 1 (Battery No. 1), the uneven surface had a generally uniform uneven surface with an average interval of 1 μm and an average height difference of 0.5 μm, and the optimized rough surface of the substrate surface. It was found that the solar cells were formed almost faithfully. In contrast, Comparative Example 1 (Battery No. 1
), the solar cell surface was almost flat, but some irregular irregularities were observed. The difference in short-circuit current, and thus the difference in conversion efficiency, between both solar cells is thought to be due to the difference in light confinement effect caused by this unevenness.

(Example 2) A non-monocrystalline silicon solar cell was manufactured using the same manufacturing conditions and method as in Example 1, except that the substrate temperature in the substrate heating process and substrate surface roughness optimization process was changed to 400°C. (Battery No. 2) was manufactured.

In the case of this example, the time required for the substrate heating step and the substrate surface roughness ratio optimization step was 11 minutes, and after the substrate heating step and the substrate surface roughness ratio optimization step, the substrate heating The substrate temperature was adjusted and maintained at 300° C. using the heater 1005 before proceeding to the next step.

The characteristics of the non-single crystalline silicon solar cell (Battery No. 2) produced in this example were measured in the same manner as in Comparative Example 1. Compared to a high-quality silicon solar cell (battery No. 1), the short-circuit current value is on average 1.25 times higher, and the photoelectric conversion efficiency η
was 1.22 times better on average, and the characteristics were almost the same as those of the non-monocrystalline silicon solar cell of Example 1 (Battery No. 1).

Next, when the surface of the solar cell produced in Example 2 (Battery No. 2) was observed in the same manner as Comparative Example 1, it was found that the average uneven structure of Example 2 (Battery No. 2) was It was found that the solar cell had a generally uniform uneven surface with an interval of 1 μm and an average height difference of 0.5 μm, and that the solar cell was formed almost faithfully to the optimized rough surface of the substrate surface.

Furthermore, 10 lots of non-monocrystalline silicon solar cells (Battery No. 2) were fabricated using the same method as the non-monocrystalline silicon solar cell (Battery No. 2) produced in this example. -1) to (Battery No. 2-10) were manufactured. However, the time required for the substrate heating step and substrate surface roughness ratio optimization step in the production of each non-monocrystalline silicon solar cell was distributed in the range of 9 minutes to 15 minutes. When we measured the conversion efficiency of non-monocrystalline silicon solar cells (Battery No. 2-1) to (Battery No. 2-10) and investigated the dispersion, it was within 2% of the average value. . On the other hand, 10 lots of non-monocrystalline silicon solar cells (battery No. ratio 1-1) manufactured under the same conditions and method as the non-monocrystalline silicon solar cells (battery No. ratio 1-1) manufactured in Comparative Example 1 were used. . Ratio 1-1) ~ (Battery No.
．． Similar measurements were made for the ratio 1-10) to examine the variation in conversion efficiency, and it was found that the variation in conversion efficiency was spread around 10% around the average value.

[0097] For these reasons, it is possible that the substrate temperature in the substrate heating process and the substrate surface roughness ratio optimization process may vary for some reason, or that the substrate surface roughness in the substrate heating process may vary due to the use of a substrate with a different material or surface roughness. Even if the roughness ratio changes over time, it is possible to always optimize the roughness ratio of the substrate surface by using the method of the present invention.
It has been found that it is possible to dramatically improve the efficiency, uniformity, and reproducibility of non-monocrystalline silicon solar cells produced by this method.

(Example 3) In this example, a multi-bandgap non-single crystal silicon solar cell having the configuration shown in FIG. 3 was manufactured. The size of the substrate 302 is 1.
A stainless steel (SUS304) plate measuring 1.0 mm square and 1.0 mm thick with a mirror finish on the surface was used.

The stainless steel substrate was subjected to a substrate heating process and a substrate surface roughness ratio optimization process at a substrate temperature of 380℃.
It was set at ℃. In this example, the substrate heating process and the substrate surface roughness ratio optimization process required 23 minutes.

[0100] Following the substrate heating process and substrate surface roughness optimization process, a first n-type semiconductor layer 3 is formed on the substrate 302.
03, first i-type semiconductor layer 305, first p-type semiconductor layer 30
7. Second n-type semiconductor layer 309, second i-type semiconductor layer 311
, the second p-type semiconductor layer 313, the transparent electrode 314, and the current collecting electrode 315 were formed in this order. The n-type semiconductor layer, i-type semiconductor layer, p-type semiconductor layer, transparent electrode and Using a current collecting electrode,
A non-monocrystalline silicon solar cell (Battery No. 3) was produced.

[0101]

[Table 2] (Comparative Example 2) The same manufacturing conditions and method as in Example 3 were used, except that the roughness ratio was not optimized in the substrate heating process and the n-type semiconductor layer was formed immediately after heating the substrate. A non-monocrystalline silicon solar cell (cell No. 2) with the following configuration was manufactured.

First, the characteristics of the solar cells of Example 3 (Battery No. 3) and Comparative Example 2 (Battery No. Ratio 2) were measured in the same manner as those of Comparative Example 1.
Battery No. The conversion efficiency of the solar cell of Example 3 (Battery No. 3) was 1.29 times higher than that of the solar cell of Ratio 2).

[0103] Next, when the surface of the solar cell produced in Example 3 (cell No. 3) was observed in the same manner as in Comparative Example 1, it was found that the average interval of the uneven structure was 0.2 μm, and the average height difference was 0. It was found that the solar cell had a roughly uniform uneven surface of .2 μm, and that the solar cell was formed almost faithfully to the optimized rough surface of the substrate surface.

(Example 4) In this example, the structure shown in FIG. 3 was prepared in the same manner as in Example 3 except that the ordinary RFCVD method was used instead of the microwave CVD method when manufacturing each layer of the top cell. We fabricated a multi-bandgap non-single-crystalline silicon solar cell.

The characteristics of the non-single crystal silicon solar cell (Battery No. 4) produced in this example were measured in the same manner as in Comparative Example 1, and the characteristics of the non-single crystal silicon solar cell produced in Comparative Example 2 were measured in the same manner as in Comparative Example 1. When compared with a high quality silicon solar cell (Battery No. 2), the photoelectric conversion efficiency η was 1.19 times better on average.

[0106]

[Effects of the Invention] By using the method of the present invention as described in detail above, the following effects were obtained.

[0107] It has become possible to provide a high-performance solar cell without deteriorating the solar cell characteristics due to etching residue or fine particles remaining on the substrate.

[0108] Furthermore, the present invention provides a high-performance solar cell without causing peeling of the semiconductor layer or deterioration of electrical characteristics during the process in which the distortion of the substrate that occurs when forming irregularities on the substrate surface is alleviated over time. It also made it possible to

[0109] Furthermore, although the present invention uses the microwave CVD method which requires a relatively high substrate temperature, it is possible to monitor on the spot the change in roughness caused by the growth of grain boundaries of metal constituting the substrate surface. This also made it possible to provide a solar cell with highly reproducible output characteristics.

Furthermore, in the present invention, by performing the substrate heating step and the substrate surface roughness ratio optimization step simultaneously, the roughness ratio of the substrate surface can be determined at the stage when the semiconductor layer is actually formed. By understanding the relationship between the surface roughness of the substrate surface and the characteristics of the solar cell, it is easy to determine the optimum surface roughness, reducing the number of trials and errors required to determine the manufacturing conditions for solar cells, and as a result, improving the quality of solar cells. It also made it possible to provide it at a low price.

[Brief explanation of the drawing]

FIG. 1 is a schematic configuration diagram for explaining an example of performing a substrate heating step and a substrate surface roughness ratio optimization step using the method of the present invention.

FIG. 2 is a schematic diagram for explaining an example of a solar cell manufactured using the method of the present invention.

FIG. 3 is a schematic configuration diagram for explaining another example of a solar cell manufactured using the method of the present invention.

FIG. 4 is a schematic configuration diagram for explaining an apparatus for forming a non-monocrystalline silicon semiconductor layer by a microwave CVD method used in the method of the present invention.

[Explanation of symbols]

101 Substrate 102 Heater 103 for heating the substrate Sensor 104 Optical transmission line 105 Light reflectance measurement device 106 Computers 107 and 108 for data analysis and various equipment control Interface 201
Solar cell 202 Conductive substrate 203 N-type semiconductor layer 205 I-type semiconductor layer 206 P-type semiconductor layer 207 Transparent electrode 208 Current collecting electrode 209 Output electrode 301 Solar cell 302 Conductive substrate 303 First n-type semiconductor layer 305 First i-type semiconductor layer 307 first p-type semiconductor layer 309 second n-type semiconductor layer 311 second i-type semiconductor layer 313 second p-type semiconductor layer 304 transparent electrode 315 current collecting electrode 316 extraction electrode 1001 deposition chamber 1002 dielectric window 1003 gas introduction tube 1004 substrate 1005 heater 1006 Vacuum gauge 1007 Conductance valve 1008
Auxiliary valve 1009 Leak valve 1010 Waveguide 1011 DC power supply 1012 High frequency power supply 1013 Electrode 1014 Grid 1015 Sensor 1016 Optical transmission lines 1021 to 1026 Mass flow controllers 1031 to 1036 Gas inflow valve 104
1 to 1046 Gas outflow valves 1051 to 1
056 Valve

Claims (3)

[Claims] 1. A doped semiconductor layer having a first conductivity type, an i-type semiconductor layer, and a doped semiconductor layer having a conductivity type different from the first conductivity type are sequentially stacked on a substrate. In the method for manufacturing a solar cell obtained by a method of manufacturing a solar cell, in the substrate heating step when forming the doped semiconductor layer having the first conductivity type, the change in roughness of the substrate surface with time is observed optically. 1. A method for manufacturing a solar cell, which comprises adjusting substrate heating time while observing using a physical measuring means. 2. A doped semiconductor layer having the first conductivity type, the i-type semiconductor layer, and a doped semiconductor layer having a conductivity type different from the first conductivity type,
2. The method for manufacturing a solar cell according to claim 1, wherein each non-single crystal semiconductor containing silicon is used. 3. Among the doped semiconductor layer having the first conductivity type, the i-type semiconductor layer, and the doped semiconductor layer having a conductivity type different from the first conductivity type,
Microwave CVD as a method of forming at least one layer
2. The method of manufacturing a solar cell according to claim 1, wherein a method is used.