JPH04326221A - Scrambling/descrambling device - Google Patents

Abstract

PURPOSE:To improve safety from illegal descramble by preventing a pseudo random signal from synchronizing step-out by losing a packet while preventing bit error from being propagated and facilitating a high-speed operation. CONSTITUTION:In packet data composed of a scrambling area and an out-of- scrambling area excepting for the scrambling area, a correcting word composed of all the parts or a part of the out-of-scrambling area is held by a correcting word holding register 6 and based on the held correcting word, a scrambling key is corrected by a scrambling key correcting circuit 4. Based on initialization for each packet due to the corrected scramble key, the pseudo random signal is generated by a pseudo random signal generating circuit 3, and the generated pseudo random signal is added to the scrambling area of the relevant packet data by an adder 1 with '2' as a divisor.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a scrambling/descrambling device for scrambling or descrambling packet-format data.

0002

SUMMARY OF THE INVENTION The present invention provides a scrambling/descrambling device for scrambling or descrambling data in a packet format. It holds a modified word consisting of bits, modifies the scramble key based on the stored modified word, generates a pseudo-random number signal based on initialization for each packet using the modified scramble key, and generates a pseudo-random number signal. By adding 2 modulo to the scramble area of the packet data, it prevents the propagation of bit errors, facilitates high-speed operation, prevents synchronization of pseudo-random number signals due to packet loss, and prevents unauthorized descrambling. This is designed to increase safety against.

0003

[Prior Art] Conventionally, the following methods (1) to (3) are used to scramble or descramble packet data.
method was considered.

(1) A method of encrypting or decoding packet data using a scramble key, (2) A method of adding a pseudo-random number signal modulo 2 to the packet data.
A method in which the pseudo-random number signal is initialized using a scrambling key only once at the start of scrambling of the first packet, and (3) a method in which the pseudo-random number signal is added modulo 2 to the packet data. A method of repeatedly initializing each packet at the start of scrambling.

[0005]

[Problem to be solved by the invention] However, the above (
In method 1), a single bit error in the transmission path is
Although it depends on the usage mode of the cipher, there is a problem in that it propagates over a range of one cipher block or more. Furthermore, cryptographic devices generally consist of a combination of multi-stage permutation and substitution circuits, and require a certain amount of difficult circuit technology to achieve high throughput.

[0006] Although the above method (2) has the characteristics that bit error propagation does not occur and high-speed operation is easy, when a packet loss occurs, the pseudo-random number signal becomes out of synchronization, and the subsequent A major problem is that packet descrambling becomes impossible.

In method (3) above, in addition to the characteristics that bit error propagation does not occur and high-speed operation is easy, there is no problem of synchronization due to packet loss. Since the pattern is the same for all packets, it is significantly less secure against unauthorized descrambling.

The purpose of the present invention is to solve the above-mentioned problems and to (a) prevent propagation of bit errors, (b) facilitate high-speed operation, and (c) prevent pseudo-random number signals caused by packet loss. An object of the present invention is to provide a packet data scrambling/descrambling device that does not cause synchronization shift and (d) has high security against unauthorized descrambling.

[0009]

[Means for Solving the Problems] In order to achieve the above object, the present invention provides a data processing system that consists of all or a part of the bits of the non-scrambled area, out of the packet data that consists of the scrambled area and the other non-scrambled area. a holding means for holding a modified word; a modifying means for modifying a scramble key based on the modified word held by the retaining means; and a pseudo-random number signal based on initialization for each packet using the scramble key modified by the modifying means. The present invention is characterized by comprising a pseudo-random number signal generation means for generating a pseudo-random number signal, and an addition means for adding the pseudo-random number signal from the pseudo-random number signal generation means to a scramble area of the packet data modulo 2.

The present invention also provides a holding means for holding a modified word consisting of all or part of the bits of the non-scrambled area out of packet data consisting of the scrambled area and the other non-scrambled area; Detection means for detecting a carry of a continuity index indicating the transmission order when a plurality of packets are included among the retained modified words; a storage means for storing the number of detections detected by the detection means; and the storage means. key modification means for modifying the scramble key based on the number of detections stored by and the modification word held by the holding means; and a pseudo-random number signal based on initialization for each packet using the scramble key modified by the key modification means. The present invention is characterized by comprising a pseudo-random number signal generation means for generating a pseudo-random number signal, and an addition means for adding the pseudo-random number signal from the pseudo-random number signal generation means to a scramble area of the packet data modulo 2.

Further, the present invention includes a scramble key holding means that holds a scramble key and updates the scramble key in accordance with key update timing, and the scramble key holding means is configured to hold a scramble key when there is a carry of the continuity index. It is characterized by consisting of a feedback shift register that is shifted when

0012

[Operation] According to the present invention, among packet data consisting of a scrambled area and a non-scrambled area, a modified word consisting of all or a part of the bits of the non-scrambled area is held by the holding means; A scramble key is modified by a modification means based on the modification word, a pseudo-random number signal is generated by a pseudo-random number signal generation means based on the initialization of each packet by the scramble key modified by the modification means, and a pseudo-random number signal is generated by a pseudo-random number signal generation means. A random number signal is added modulo 2 to the scramble area of the packet data by an adding means.

Further, in the present invention, among packet data consisting of a scrambled area and a non-scrambled area, a modified word consisting of all or part of the bits of the non-scrambled area is held by the holding means; The detecting means detects a carry of a continuity index representing the transmission order when a plurality of packets are transmitted among the corrected words, the storage means stores the number of detections detected by the detecting means, and the storage means stores the number of detections detected by the detecting means. A scramble key is modified by a key modification means based on the number of detections and the modification word held by the storage means, and a pseudorandom number is generated by a pseudorandom number signal generation means based on initialization for each packet using the scramble key modified by the key modification means. A signal is generated, and the pseudo random number signal from the pseudo random number signal generating means is added to the scramble area of the packet data by an adding means modulo 2.

Furthermore, in the present invention, the scramble key is held by the scramble key holding means and updated in accordance with the key update timing, and the scramble key holding means is shifted when the continuity index carries over. It has the function of modifying the scramble key based on the number of times a carry of the continuity index is detected.

[0015]

Embodiments Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

First embodiment FIG. 1 shows a first embodiment of the invention.

In the figure, reference numeral 6 denotes a modified word holding register, which is composed of a shift register and holds all or part of the area other than the scramble area (area where no scrambling is applied) of the packet data input. 4
1 is a scramble key modification circuit, which is constituted by a general combinational logic circuit, and modifies the scramble key using a modification word from the modification word holding register 6. 3 is a pseudo-random number signal generation circuit, which is configured by combining a linear feedback shift register with non-linear logic, generates a pseudo-random number signal, and outputs the initialization word from the scramble key modification circuit 4 at the timing specified by the initialization timing signal. It is initialized by . The pseudorandom number signal generation circuit 3 may be constituted by a linear feedback shift register, a nonlinear feedback shift register, or the like. The initialization timing signal is a signal that is generated at a constant timing after the modification word is determined for each packet and before the release of the gate signal. 2 is an AND gate, and pseudo random number signal generation circuit 3
The pseudo-random number signal from the 1st page is gated with a gate signal that indicates the range to be scrambled. Reference numeral 1 denotes an adder which adds a pseudo-random number signal gated by AND gate 2 to the packet data input modulo 2.

Next, the operation will be explained.

All or a portion of the non-scrambled area of the packet data input is held in a modified word holding register 6 and guided to the scramble key modification circuit 4 as a modified word. On the other hand, after the scramble key is modified by the modification word in the scramble key modification circuit 4, it is led to the pseudorandom number signal generation circuit 3 as an initialization word. Then, the pseudo random number signal generation circuit 3 is initialized by this initialization word at the timing specified by the initialization timing signal.

After the pseudo-random number signal from the pseudo-random number signal generation circuit 3 is gated with a gate signal instructing the range to be scrambled, it is added modulo 2 to the packet data input by the adder 1, and the packet data is I get the output.

Therefore, if unscrambled packet data is input as packet data, scrambled packet data will be output as the packet data output. That is, a scrambling operation is performed.

On the other hand, if scrambled packet data is input as packet data, unscrambled packet data will be output as the packet data output. That is, a descrambling operation is performed.

Next, the relationship between the scramble area and the modified word will be explained according to the packet format shown in FIG. This packet format is an example of the format in a data channel of satellite television broadcast or high definition television broadcast.

[0024] A packet has a length of 288 bits and has a length of 1
It consists of a 6-bit header section and a 272-bit data section.

i. The header section consists of 5 bits for service identification and 11 redundant bits.

[0026] The service identification functions as a so-called packet address value.

ii. The first 14 bits of the data section are a prefix, and are composed of 6 bits for sub logical channel identification, 4 bits for continuity indicator, 2 bits for scrambling control, and 2 bits for data group control.

The sub logical channel identification functions as a so-called packet address value.

The continuity index is given a value incremented by 1 modulo 16 in the sending order in order to confirm the continuity of the packets on the receiving side.

It is assumed that the scramble area has a data portion of 258 bits excluding the prefix. When a shortened difference set cyclic code (272, 190) is used as an error correction code for the data part, the last 82 bits become redundant bits. In FIG. 2, the redundant bits are included in the scramble area, but there is virtually no difference whether the redundant bits are included in the scramble area or not. This is because on the transmitting side, after scrambling, the redundant bit part is replaced with the calculated value, and on the receiving side, the redundant bit part is finally discarded.

It should be noted that a total of 30 bits outside the scramble area, including service identification, header redundant bits, sub logical channel identification, continuity index, scrambling control, and data group control, can be used as modification words. You can use all of them as correction words,
You may use a portion. Here, an example is shown in which a total of 15 bits, including service identification, sub logical channel identification, and continuity index, are used as modification words.

Next, an example of a modification method using the scramble key modification circuit 4 will be given. The width of the scramble key is n1 bits, the width of the modification word is n2 bits, and the width of the initialization word is n3 bits.

In the case of n1+n2=n3, a simple concatenation of bits, a combination of bit concatenation and bit swapping, and furthermore, a concatenation of bits through an n3-bit input/output function can be considered.

When n1+n2<n3, bit concatenation and assigning constants to missing bits, bit concatenation combined with bit extension, bit concatenation combined with a function of n1+n2 bit input and n3 bit output. A combination of these is possible.

When n1+n2>n3, it is conceivable to use a data compression function with n1+n2 bits input and n3 bits output.

Although this embodiment has been explained using the example of the packet format shown in FIG. 2, it goes without saying that the present invention can be applied to any other packet format. In that case, all or part (optional) of the data other than the scramble area is used as a modified word.

[0037] When targeting an arbitrary packet format,
It is also possible that some of the modified words are after or between the scrambled regions. In this case, taking the above embodiment as an example, there is no timing that satisfies the conditions of the initialization timing signal, that is, after the modification word is determined and before the gate signal is released. However, in FIG. 1, this problem can be solved by inserting a suitable delay circuit between the packet data input and the XOR circuit, that is, the adder 1.

In this embodiment, since the pseudorandom number signals are added modulo 2, that is, exclusive OR (XOR) is performed for each bit, errors in bits in the transmission path can be avoided. There is no propagation to the bits.

Furthermore, since the pseudorandom number signal generation circuit 3 is initialized for each packet, synchronization errors due to packet loss do not occur. In other words, all packets other than those that were lost are correctly restored.

Furthermore, since the pseudo-random number signal generation circuit 3 is initialized with the initialization word modified by the modified word containing the continuity index, the pseudo-random number signal generation circuit 3 is initialized with the initialization word modified by the modification word containing the continuity index. Scrambled with random number signal. In other words, security against unauthorized restoration is increased.

Since the present embodiment is constructed as described above, a complicated circuit such as an encryption circuit is not required, and a clock rate exceeding the shift clock of packet data is not required. In other words, the circuit can be easily realized.

In addition to this effect, when data corresponding to a so-called packet address is included in the modified word, the generated pseudo-random number signals will be different depending on the packet address. Therefore, even if the same scrambling key is used for different packet addresses, it is possible to prevent fraudulent attempts to descramble non-contracted services by tampering with packet addresses.

Second embodiment FIG. 3 shows a second embodiment of the invention.

In FIG. 3, 1, 2, 3, and 6 indicate the same parts as in FIG. A detection circuit 7 determines whether a carry has occurred in the continuity index included in the modified word from the modified word holding register 6. A carry counter 8 counts the carry signal outputted every time a carry is detected by the detection circuit 7. Note that the carry counter 8 is reset by the key update timing signal, and synchronization between scrambling and descrambling is established. The count value of the carry counter 8 extends the continuity index, and this count value will be referred to as an extended continuity index. A scramble key holding register 5 holds the scramble key until the next key update. 34 is a scramble key modification circuit that modifies the scramble key from the scramble key holding register 5 using the modification word from the modification word storage register 6 and the extended continuity index from the carry counter 8 to generate an initialization word. It is something.

This embodiment differs from the first embodiment in the method of modifying the scramble key. That is, in the first embodiment, the scramble key is modified by the scramble key modification circuit 4 using the modified word from the modified word holding register 6, but in this embodiment, the scramble key from the scramble key holding register 5 is modified by the scramble key The modification circuit 34 performs modification using the modification word from the modification word holding register 6 and the extended continuity index from the carry counter 8. Therefore, the security against unauthorized restoration is even higher.

Next, the carry detection method by the detection circuit 7 will be explained in detail.

The simplest carry detection method is to determine that a carry has occurred when the current continuity index is 0. According to this method, if a packet with a continuity index of 0 is lost, In this case, there is a problem that the carry count fails.

FIG. 4 shows an example of a detection circuit that solves these problems.

This detection circuit stores the previous continuity index (referred to as the previous continuity index) in the continuity index storage register 41, and compares the magnitude relationship between the previous continuity index and the continuity index using the comparator 42. As a result of the comparison, if the continuity index is smaller than the previous continuity index, it is determined that there has been a carry and the carry signal is activated.

According to this detection circuit, even if 2n -1 consecutive packets are lost in accordance with the number n of bits of the continuity index, a carry count can be performed.

Third embodiment FIG. 5 shows a third embodiment of the invention.

This embodiment is different from the second embodiment in the counting and storage of carry of the continuity index and in the method of modifying the scramble key.

That is, in the second embodiment, the carry counter 8 counts and stores the carry of the continuity index, and the scramble key is modified using the count value, that is, the extended continuity index. This is done in circuit 34. On the other hand, in this embodiment, the scramble key holding register 55 is constituted by an initializable feedback shift register, and is initialized by the timing of the key update timing signal, and is shifted when the carry signal is active. . Therefore,
In this embodiment, the scramble key holding register 55 simultaneously counts and stores the continuity index and modifies the scramble key.

Note that the scramble key holding register 55 of this embodiment may be a linear feedback shift register, a nonlinear feedback shift register, or a counter. However, from the viewpoint of safety, it is preferable to use a feedback shift register that has a different feedback coefficient from the feedback shift register used in the pseudo-random number signal generation circuit 3.

Since the present embodiment is configured as described above, the circuit configuration is simpler than that of the second embodiment, and the number of registers can be saved by the number of bits of the carry counter. can. Moreover, the same effect as securing the number of extended continuity index bits equal to the number of bits of the scramble key can be obtained.

[0056]

[Effects of the Invention] As explained above, according to the present invention,
With the above configuration, (a) bit error propagation does not occur, (b) high-speed operation is easy, (c) pseudo-random number signal synchronization shift due to packet loss does not occur, (d
) It is possible to provide a scrambling/descrambling device that is highly secure against unauthorized descrambling.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a first embodiment of the present invention.

FIG. 2 is a diagram showing an example of a packet format.

FIG. 3 is a block diagram showing a second embodiment of the invention.

FIG. 4 is a block diagram showing a configuration example of the detection circuit shown in FIG. 2;

FIG. 5 is a block diagram showing a third embodiment of the present invention.

[Explanation of symbols]

1 Adder 2 AND gate 3 Pseudo-random number signal generation circuit 4 Scramble key modification circuit 6 Modified word holding register

Claims (3)

[Claims] 1. Holding means for holding a modified word consisting of all or part of the bits of a non-scrambled area out of packet data consisting of a scrambled area and a non-scrambled area, and a modified word held by the holding means. a modifying means for modifying a scramble key based on a word; a pseudo-random number signal generating means for generating a pseudo-random number signal based on the initialization of each packet by the scramble key modified by the modifying means; A scrambling/descrambling device comprising: an adding means for adding a pseudo-random number signal modulo 2 to a scramble area of the packet data. 2. Holding means for holding a modified word made up of all or some bits of a non-scrambled area out of packet data made up of a scrambled area and a non-scrambled area, and a modified word held by the holding means. a detection means for detecting a carry of a continuity index representing the transmission order when a plurality of packets are included in a word; a storage means for storing the number of times of detection detected by the detection means;
key modification means for modifying the scramble key based on the number of detections stored by the storage means and modification words held by the storage means; A scrambling device characterized by comprising a pseudo-random number signal generation means for generating a random number signal, and an addition means for adding the pseudo-random number signal from the pseudo-random number signal generation means to a scramble area of the packet data modulo 2. Descrambling device. 3. The scramble key holding means according to claim 2, further comprising a scramble key holding means that holds a scramble key and updates the scramble key in accordance with key update timing, and the scramble key holding means is arranged such that the carry of the continuity index is A scrambling/descrambling device comprising a feedback shift register that is shifted when a signal is present.