JPH04325824A - Ground fault detector - Google Patents

Ground fault detector

Info

Publication number
JPH04325824A
JPH04325824A JP12472691A JP12472691A JPH04325824A JP H04325824 A JPH04325824 A JP H04325824A JP 12472691 A JP12472691 A JP 12472691A JP 12472691 A JP12472691 A JP 12472691A JP H04325824 A JPH04325824 A JP H04325824A
Authority
JP
Japan
Prior art keywords
zero
current
sequence
section
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP12472691A
Other languages
Japanese (ja)
Other versions
JP3009069B2 (en
Inventor
Masao Otsuka
正雄 大塚
Taku Furuta
卓 古田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yaskawa Electric Corp
Original Assignee
Yaskawa Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yaskawa Electric Corp filed Critical Yaskawa Electric Corp
Priority to JP3124726A priority Critical patent/JP3009069B2/en
Publication of JPH04325824A publication Critical patent/JPH04325824A/en
Application granted granted Critical
Publication of JP3009069B2 publication Critical patent/JP3009069B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

PURPOSE:To prevent erroneous detection of grounding direction by employing a detection signal subjected to vector operation if the zero-phase voltage or current in a distribution line is lower than a set level otherwise employing a detection signal not subjected to vector operation. CONSTITUTION:Zero-phase voltage and current detected from a distribution line are fed through a lowpass filter 1 and an A/D converter 2 to a first level deciding section 3. The first level deciding section 3 compares the detected zero-phase voltage and current with set levels and feeds them through a bandpass filter 4 to a vector operating section 5 if they are lower than the set levels. A subtractor 54 outputs zero-phase voltage and current, from which residual components are removed, to a second level deciding section 6. The second level deciding section 6 outputs the zero-phase voltage and current to an output section 9 if they are lower than set levels otherwise outputs a prestored detection signal, prior to ground fault, through a tap switch 53 to the subtractor 54 and directly to a duration deciding section 7.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】本発明は、配電線路の地絡事故検
出装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a ground fault detection device for power distribution lines.

【0002】0002

【従来の技術】従来の地絡事故検出装置は、配電線路の
各相に設けた電流変成器で検出した電流を加算して零相
電流を検出し、各相の対地電圧を静電結合したコンデン
サ分圧器により取り出し低圧側コンデンサにより各対地
電圧の加算を行って、零相電圧を検出している。これら
の零相電流および零相電圧は零相電流レベル判定部およ
び零相電圧レベル判定部へ入力し、それぞれのレベルが
しきい値以上であるか否かを判定し、しきい値レベル以
上であるときアンド回路に入力し、その出力があらかじ
め設定した時間以上であるか否かを持続時間判定部によ
り検出し、設定した時間以上であるとき地絡事故発生と
判定していた。また地絡事故が発生していると位相判定
部において、零相電流と零相電圧の位相差を調べること
により地絡事故点が負荷側にあるか、電源側にあるかの
方向を判定していた。
[Prior Art] A conventional ground fault detection device detects a zero-sequence current by adding the currents detected by current transformers installed in each phase of a distribution line, and capacitively couples the ground voltage of each phase. The zero-sequence voltage is detected by taking out the voltage using a capacitor voltage divider and adding each ground voltage using the low-voltage side capacitor. These zero-sequence currents and zero-sequence voltages are input to the zero-sequence current level determination section and the zero-sequence voltage level determination section, and it is determined whether each level is above the threshold level. At some point, an input signal is input to an AND circuit, and a duration determining section detects whether or not the output is longer than a preset time, and when the output is longer than a preset time, it is determined that a ground fault has occurred. In addition, when a ground fault occurs, the phase determination section determines whether the ground fault point is on the load side or the power supply side by checking the phase difference between the zero-sequence current and zero-sequence voltage. was.

【0003】0003

【発明が解決しようとする課題】従来の地絡事故検出装
置は、配電線路に地絡事故が発生していないときでも対
地静電容量の三相のばらつきによりわずかながらの零相
電圧いわゆる残留電圧が発生しており、零相電流いわゆ
る残留電流も発生している。配電線路の電気量を測定す
る電流変成器、コンデンサ分圧器の三相分の特性のばら
つきによる残留電圧、残留電流も配電線路の残留分にベ
クトル的に加算されて検出することになっており測定誤
差が生じていた。このため、配電線路より検出された電
気量を所定の周期でサンプリングし、現時刻より前のに
検出し記憶部に記憶しているサンプル値と、現時刻のサ
ンプル値とを比較して、残留成分の影響を受けない零相
電流、零相電圧を検出するようにしたものもあるが、零
相電流、零相電圧が大きくなると、A/D変換器で変換
するとき入力部でオーバレンジするため、位相角の測定
誤差を生じ地絡方向の誤検出が生じやすい。また、零相
電流、零相電圧が漸増する場合には、すなわち現時刻の
サンプル値から記憶しているサンプル値を減算して得ら
れる値が所定の値より小さい場合、絶対値が大きくなる
にもかかわらず、従来の方法では検出できなかった。
[Problems to be Solved by the Invention] Conventional ground fault detection devices produce a slight zero-sequence voltage, so-called residual voltage, due to variations in ground capacitance among the three phases even when no ground fault has occurred on the distribution line. is occurring, and a zero-sequence current, so-called residual current, is also occurring. Residual voltage and residual current due to variations in the characteristics of the three phases of the current transformer and capacitor voltage divider that measure the amount of electricity on the distribution line are added vectorially to the residual amount on the distribution line and are detected. An error had occurred. For this reason, the amount of electricity detected from the distribution line is sampled at a predetermined period, and the sample value detected before the current time and stored in the storage unit is compared with the sample value at the current time, and the remaining Some devices are designed to detect zero-sequence current and zero-sequence voltage that are not affected by components, but when the zero-sequence current and zero-sequence voltage become large, overrange occurs at the input section when converted by the A/D converter. Therefore, a measurement error in the phase angle is caused, and the ground fault direction is likely to be erroneously detected. In addition, when the zero-sequence current and zero-sequence voltage gradually increase, that is, when the value obtained by subtracting the stored sample value from the sample value at the current time is smaller than a predetermined value, as the absolute value increases, However, it could not be detected using conventional methods.

【0004】0004

【課題を解決するための手段】配電線路に設けた零相電
圧検出手段および零相電流検出手段で検出した現時刻の
検出信号から現時刻より前に検出し、一時記憶部に記憶
している検出信号を減算して得られる信号から地絡事故
を検出するようにした地絡事故検出装置において、零相
電圧検出手段および零相電流検出手段で検出した零相電
圧および零相電流の大きさを比較する第1のレベル判定
部と、第1のレベル判定部で設定値以下のときは現時刻
の検出信号から現時刻より前に検出した記憶部に記憶し
ている検出信号を減算して得られる信号を出力し、設定
値以上のときは現時刻の検出信号を出力するベクトル演
算部と、ベクトル演算部の出力と設定している設定値と
を比較する第2レベル判定部と、設定値以下のときは出
力部に出力させず設定値以上のとき持続時間を計測し設
定時間を超えたとき出力する持続時間判定部と、前記持
続時間判定部の零相電圧と零相電流から位相差を演算し
出力部に位相差を出力するようにしている。
[Means for solving the problem] A detection signal at the current time detected by a zero-sequence voltage detection means and a zero-sequence current detection means provided on the distribution line is detected before the current time, and is stored in a temporary storage unit. In a ground fault detection device that detects a ground fault from a signal obtained by subtracting a detection signal, the magnitude of the zero-sequence voltage and zero-sequence current detected by the zero-sequence voltage detection means and the zero-sequence current detection means and a first level determination section that compares the detection signal stored in the storage section that was detected before the current time from the detection signal at the current time when the first level determination section is below the set value. a vector calculation unit that outputs the obtained signal and outputs a detection signal at the current time when the signal is equal to or greater than a set value; a second level determination unit that compares the output of the vector calculation unit with the set value; A duration determination section that does not output the output when the value is below the set value, measures the duration when the set value is exceeded, and outputs the output when the set time is exceeded; The phase difference is calculated and outputted to the output section.

【0005】[0005]

【作用】したがって、配電線路の零相電圧あるいは零相
電流が設定値以下であればベクトル演算を行った検出信
号を用い、設定値以上であればベクトル演算を行わない
検出信号を用いて零相電圧、零相電流および位相差を演
算するようにしている。
[Function] Therefore, if the zero-sequence voltage or zero-sequence current of the power distribution line is less than the set value, the detection signal that has been subjected to vector calculation is used, and if it is greater than the set value, the detection signal that is not subjected to vector calculation is used to The voltage, zero-sequence current, and phase difference are calculated.

【0006】[0006]

【実施例】以下、本発明を図1に示す実施例について説
明する。1はサンプリング周波数fの1/2以下の周波
数成分のみが通過するようにしたローパスフィルタ、2
はローパスフィルタ1を通過したアナログ信号をディジ
タル信号に変換するA/D変換器、3はA/D変換され
た零相電圧および零相電流を所定のアルゴリズムにより
演算し、設定値と比較する第1のレベル判定部、4は信
号の基本波成分のみを通過するようにバンドパスフィル
タ、5は零相電圧、零相電流の変化分を演算するベクト
ル演算部、6はベクトル演算部5からの出力を所定のア
ルゴリズムにより演算し、設定値と比較する第2のレベ
ル判定部、7は第2のレベル判定部6において設定値を
超えている時間を検出すつ持続時間判定部、8は零相電
圧と零相電流の位相差を演算する位相差演算部、9は演
算結果を出力する出力部である。なお、ベクトル演算部
5は、遅延回路51、遅延回路52、タップチェンジス
イッチ53および減算器54で構成されている。次に動
作について説明する。図示しない零相電圧検出手段およ
び零相電流検出手段で配電線路から検出した零相電圧V
O 、零相電流IO はローパスフィルタ1を通過した
後、A/D変換器2でディジタル値に変換され、第1の
レベル判定部3へ出力される。第1のレベル判定部3で
は所定のアルゴリズムにより演算した結果を設定された
零相電圧VO2、零相電流IO2と比較し、この設定値
以下であればバンドパスフィルタ4を経てベクトル演算
部5のそれぞれの遅延回路51、52に出力する。ベク
トル演算部の遅延回路51は現時刻より前に検出した零
相電圧、零相電流をタップチェンジスイッチ53に出力
し、タップチェンジスイッチの出力と第1のレベル判定
部の出力をバンドパスフィルタ4を経て減算器54に出
力する。 前記減算器54は残留成分を除去した零相電圧、零相電
流を第2のレベル判定部6に出力する。第2のレベル判
定部は零相電圧、零相電流が設定した零相電圧VO1、
零相電流IO1より小さいときは、出力部9に出力し、
演算結果を出力しないようにする。第2のレベル判定部
6で零相電圧V0 、零相電流I0 が設定した零相電
圧VO1、零相電流IO1より大きいときは、遅延回路
51に切替え、遅延回路52のシフトレジスタが停止し
、記憶している地絡事故前の検出信号をタップチェンジ
スイッチ53より減算器54に出力するとともに、持続
時間判定部7に出力する。持続時間判定部7は零相電圧
、零相電流が設定した時間より長く継続すると零相電圧
、零相電流を位相差演算部8に出力し、位相差演算部8
は、入力した零相電圧、零相電流から位相を演算し、そ
の位相と零相電圧、零相電流を出力部9に出力する。こ
の状態を図2の領域Aに示す。すなわち零相電圧V0 
が設定された零相電圧VO1より大きく、VO2より小
さく、零相電流が設定された零相電流IO1より大きく
IO2より小さい場合である。つぎに、配電線路から検
出した零相電圧VO 、零相電流IO が、第1のレベ
ル判定部3に設定した零相電圧VO2、零相電流IO2
より大きいときは、第1のレベル判定部3からベクトル
演算部5のタップチェンジスイッチ51を経て減算器5
4に出力する。減算器54は、第1のレベル判定部3の
出力をそのまま第2のレベル判定部6に出力する。第2
のレベル判定部は設定している零相電圧VO1、零相電
流IO1と減算器54からの零相電圧VO 、零相電流
IO を比較し、減算器からの零相電圧、零相電流を持
続時間判定部に出力し、零相電圧、零相電流が一定時間
継続すると位相差演算回路に出力する。位相差演算回路
は零相電圧、零相電流から位相差を演算し、この位相差
と零相電圧、零相電流を出力部に出力する。この状態を
図2の領域Bに示す。すなわち零相電圧VO が設定さ
れた零相電圧VO2より大きく、零相電流IO が設定
された零相電流IO2より大きい場合である。つぎに、
配電線路から検出した零相電圧VO が設定された零相
電圧VO1より大きく、VO2より小さく零相電流IO
 が設定された零相電流IO2より大きいときは、零相
電圧VO はベクトル演算を行い、零相電流IO はベ
クトル演算を行わずに出力部に出力する。その状態を図
2の領域Cに示す。零相電圧VO が設定された零相電
圧VO2より大きく、零相電流IO が設定された零相
電流IO1より大きくIO2より小さいときは零相電圧
VO はベクトル演算を行わず、零相電流IO はベク
トル演算を行って、出力部に出力する。その状態を図2
の領域Dに示す。
[Embodiment] The present invention will be described below with reference to an embodiment shown in FIG. 1 is a low-pass filter that allows only frequency components below 1/2 of the sampling frequency f to pass; 2
3 is an A/D converter that converts the analog signal passed through the low-pass filter 1 into a digital signal. 1 is a level determination unit, 4 is a band pass filter that passes only the fundamental wave component of the signal, 5 is a vector calculation unit that calculates changes in the zero-sequence voltage and zero-sequence current, and 6 is a vector calculation unit that calculates changes in the zero-sequence voltage and zero-sequence current. a second level determination unit that calculates the output using a predetermined algorithm and compares it with a set value; 7 is a duration determination unit that detects the time period in which the second level determination unit 6 exceeds the set value; 8 is zero; A phase difference calculation section 9 calculates the phase difference between the phase voltage and the zero-phase current, and 9 is an output section that outputs the calculation result. The vector calculation unit 5 includes a delay circuit 51, a delay circuit 52, a tap change switch 53, and a subtracter 54. Next, the operation will be explained. Zero-sequence voltage V detected from the distribution line by zero-sequence voltage detection means and zero-sequence current detection means (not shown)
After passing through the low-pass filter 1 , the zero-phase current IO 2 is converted into a digital value by the A/D converter 2 and output to the first level determination section 3 . The first level determination section 3 compares the results calculated by a predetermined algorithm with the set zero-sequence voltage VO2 and zero-sequence current IO2. It is output to each delay circuit 51, 52. The delay circuit 51 of the vector calculation section outputs the zero-sequence voltage and zero-sequence current detected before the current time to the tap change switch 53, and outputs the output of the tap change switch and the output of the first level determination section to the bandpass filter 4. The signal is output to the subtracter 54 through the subtracter 54. The subtracter 54 outputs the zero-sequence voltage and zero-sequence current from which residual components have been removed to the second level determination section 6. The second level determination section determines the zero-sequence voltage, the zero-sequence voltage VO1 set by the zero-sequence current,
When the zero-sequence current is smaller than IO1, it is output to the output section 9,
Do not output the calculation result. When the zero-sequence voltage V0 and the zero-sequence current I0 are larger than the set zero-sequence voltage VO1 and zero-sequence current IO1 in the second level determination section 6, switching is made to the delay circuit 51, the shift register of the delay circuit 52 is stopped, The stored detection signal before the ground fault is output from the tap change switch 53 to the subtracter 54 and also to the duration determination section 7. When the zero-sequence voltage and zero-sequence current continue longer than the set time, the duration determination section 7 outputs the zero-sequence voltage and zero-sequence current to the phase difference calculation section 8,
calculates the phase from the input zero-sequence voltage and zero-sequence current, and outputs the phase, zero-sequence voltage, and zero-sequence current to the output section 9. This state is shown in area A of FIG. That is, zero-sequence voltage V0
is larger than the set zero-sequence voltage VO1 and smaller than VO2, and the zero-sequence current is larger than the set zero-sequence current IO1 and smaller than IO2. Next, the zero-sequence voltage VO and zero-sequence current IO detected from the power distribution line are determined to be the zero-sequence voltage VO2 and zero-sequence current IO2 set in the first level determination section 3.
When it is larger, the subtracter 5 passes from the first level determination section 3 to the tap change switch 51 of the vector calculation section 5.
Output to 4. The subtracter 54 outputs the output of the first level determining section 3 as is to the second level determining section 6. Second
The level determination unit compares the set zero-sequence voltage VO1 and zero-sequence current IO1 with the zero-sequence voltage VO and zero-sequence current IO from the subtracter 54, and maintains the zero-sequence voltage and zero-sequence current from the subtracter. It is output to the time determination section, and when the zero-sequence voltage and zero-sequence current continue for a certain period of time, it is output to the phase difference calculation circuit. The phase difference calculation circuit calculates a phase difference from the zero-sequence voltage and zero-sequence current, and outputs this phase difference, the zero-sequence voltage, and the zero-sequence current to an output section. This state is shown in region B of FIG. That is, this is a case where the zero-sequence voltage VO is larger than the set zero-sequence voltage VO2, and the zero-sequence current IO is larger than the set zero-sequence current IO2. next,
If the zero-sequence voltage VO detected from the distribution line is greater than the set zero-sequence voltage VO1 and smaller than VO2, the zero-sequence current IO
When is larger than the set zero-sequence current IO2, the zero-sequence voltage VO is subjected to vector calculation, and the zero-sequence current IO is outputted to the output section without performing vector calculation. This state is shown in area C of FIG. When the zero-sequence voltage VO is larger than the set zero-sequence voltage VO2 and the zero-sequence current IO is larger than the set zero-sequence current IO1 and smaller than IO2, the zero-sequence voltage VO is not subjected to vector calculation, and the zero-sequence current IO is Performs vector operations and outputs to the output section. The situation is shown in Figure 2.
It is shown in area D of .

【0007】[0007]

【発明の効果】本発明は配電線路の零相電圧あるいは零
相電圧が小さい領域から大きい領域にわたって誤検出す
ることなく信頼性の高い検出ができる。また、第1のレ
ベル判定部の設定値VO2とIO2をあらゆる配電線路
の残留零相電圧と残留零相電流以上に設定しておけば、
すべてのフィーダ電柱で高感度検出ができる。
Effects of the Invention The present invention enables highly reliable detection without erroneous detection over a region where the zero-sequence voltage or zero-sequence voltage of a power distribution line is small to large. Furthermore, if the set values VO2 and IO2 of the first level determination section are set to be higher than the residual zero-sequence voltage and residual zero-sequence current of all distribution lines,
High-sensitivity detection is possible on all feeder poles.

【図面の簡単な説明】[Brief explanation of drawings]

【図1】本発明の実施例を示す回路図[Fig. 1] Circuit diagram showing an embodiment of the present invention

【図2】図1の実施例を説明するための図[Fig. 2] Diagram for explaining the embodiment of Fig. 1

【符号の説明】[Explanation of symbols]

1  ローパスフィルタ 2  A/D変換器 3  第1のレベル判定部 4  バンドパスフィルタ 5  ベクトル演算部 51  遅延回路 52  遅延回路 53  タップチェンジスイッチ 54  減算器 6  第2のレベル判定部 7  持続時間判定部 8  位相差演算部 9  出力部 1 Low pass filter 2 A/D converter 3 First level determination section 4 Bandpass filter 5 Vector calculation section 51 Delay circuit 52 Delay circuit 53 Tap change switch 54 Subtractor 6 Second level determination section 7 Duration determination section 8 Phase difference calculation section 9 Output section

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】  配電線路に設けた零相電圧検出手段お
よび零相電流検出手段で検出した現時刻の検出信号から
、現時刻より前に検出し一時記憶部に記憶している検出
信号を減算して得られる信号から地絡事故を検出するよ
うにした地絡事故検出装置において、零相電圧検出手段
および零相電流検出手段で検出した零相電圧および零相
電流の大きさを比較する第1のレベル判定部と、第1の
レベル判定部で、設定値以下のときは現時刻の検出信号
から現時刻より前に検出した記憶部に記憶している検出
信号を減算して得られる信号を出力し、設定値以上のと
きは現時刻の検出信号を出力するベクトル演算部と、ベ
クトル演算部の出力と設定している設定値とを比較する
第2のレベル判定部と、第2のレベル判定部で設定値以
下のときは出力部に出力しないようコントロールし、設
定値以上のとき持続時間を計測し設定時間を超えたとき
出力する持続時間判定部と、前記持続時間判定部の零相
電圧と零相電流から位相差を演算し出力部に位相差を出
力する地絡事故検出装置。
[Claim 1] Subtracting a detection signal detected before the current time and stored in a temporary storage unit from a detection signal at the current time detected by a zero-sequence voltage detection means and a zero-sequence current detection means provided on the distribution line. In a ground fault detection device that detects a ground fault from a signal obtained by A signal obtained by subtracting a detection signal stored in the storage unit detected before the current time from the detection signal at the current time when the level judgment unit 1 and the first level judgment unit are below the set value. a vector calculation unit that outputs a detection signal at the current time when it is equal to or greater than a set value; a second level determination unit that compares the output of the vector calculation unit with a set value; A duration determination section that controls the level determination section so as not to output to the output section when the level is below a set value, measures the duration when the level is equal to or greater than the set value, and outputs the output when the set time is exceeded; A ground fault detection device that calculates the phase difference from the phase voltage and zero-sequence current and outputs the phase difference to the output section.
JP3124726A 1991-04-25 1991-04-25 Ground fault detection device Expired - Fee Related JP3009069B2 (en)

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Application Number Priority Date Filing Date Title
JP3124726A JP3009069B2 (en) 1991-04-25 1991-04-25 Ground fault detection device

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JPH04325824A true JPH04325824A (en) 1992-11-16
JP3009069B2 JP3009069B2 (en) 2000-02-14

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2017093069A (en) * 2015-11-05 2017-05-25 関西電力株式会社 Ground fault detector
JPWO2018221619A1 (en) * 2017-05-30 2019-11-07 株式会社 シーディエヌ Leakage detection method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2017093069A (en) * 2015-11-05 2017-05-25 関西電力株式会社 Ground fault detector
JPWO2018221619A1 (en) * 2017-05-30 2019-11-07 株式会社 シーディエヌ Leakage detection method

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