JPH04312350A - Input voltage drop detecting circuit - Google Patents

Input voltage drop detecting circuit

Info

Publication number
JPH04312350A
JPH04312350A JP10662591A JP10662591A JPH04312350A JP H04312350 A JPH04312350 A JP H04312350A JP 10662591 A JP10662591 A JP 10662591A JP 10662591 A JP10662591 A JP 10662591A JP H04312350 A JPH04312350 A JP H04312350A
Authority
JP
Japan
Prior art keywords
input voltage
circuit
voltage drop
input
switching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10662591A
Other languages
Japanese (ja)
Inventor
▲高▼村 晶資
Akisuke Takamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Computertechno Ltd
Original Assignee
NEC Computertechno Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Computertechno Ltd filed Critical NEC Computertechno Ltd
Priority to JP10662591A priority Critical patent/JPH04312350A/en
Publication of JPH04312350A publication Critical patent/JPH04312350A/en
Pending legal-status Critical Current

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  • Control Of Voltage And Current In General (AREA)
  • Dc-Dc Converters (AREA)
  • Power Conversion In General (AREA)

Abstract

PURPOSE:To prolong output voltage ensuring time at input voltage drop under light load and to lower power dissipation in an input voltage drop detecting circuit for a switching power supply. CONSTITUTION:Switching pulses (a) for a performing ON/OFF control of a switching element are integrated through an integrating circuit 6. An integrated output (c) and a reference voltage (b) are then subjected to level comparison through a comparator 7. Input voltage drop is detected based on the comparison result (d). Since the saw-tooth signal (c) obtained through integration of the switching pulse (a) is subjected to level comparison with the reference voltage (b), time for reaching the reference level is prolonged when the load is light even if the input voltage drops and thereby the output voltage ensuring time is prolonged. Both the integrating circuit and the comparing circuit are constituted to dissipate low power.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【技術分野】本発明は入力電圧低下検出回路に関し、特
にスイッチング電源の入力電圧の低下を検出する入力電
圧低下検出回路に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an input voltage drop detection circuit, and more particularly to an input voltage drop detection circuit for detecting a drop in input voltage of a switching power supply.

【0002】0002

【従来技術】従来の安定化直流電源の入力電圧の低下を
検出する入力電圧低下検出回路は図3に示す構成となっ
ている。入力端子1,2から交流電圧が入力され、出力
端子4,5へ安定化直流電圧を出力する安定化電源回路
3と、交流入力端子1,2からの交流入力を整流して平
滑化する整流平滑回路9と、この平滑化出力を内蔵の基
準電圧と比較して入力交流電圧が低下するに伴い、平滑
化出力が低下して基準電圧を下回ったときに入力電圧低
下異常信号8を出力する入力電源低下検出回路10とを
含んでいる。
2. Description of the Related Art A conventional input voltage drop detection circuit for detecting a drop in input voltage of a stabilized DC power supply has a configuration shown in FIG. A stabilized power supply circuit 3 receives AC voltage from input terminals 1 and 2 and outputs a stabilized DC voltage to output terminals 4 and 5, and a rectifier circuit rectifies and smoothes the AC input from AC input terminals 1 and 2. A smoothing circuit 9 compares this smoothed output with a built-in reference voltage and outputs an input voltage drop abnormality signal 8 when the smoothed output decreases and falls below the reference voltage as the input AC voltage decreases. The input power supply drop detection circuit 10 includes an input power supply drop detection circuit 10.

【0003】図4は図3に示す回路の動作波形図であり
、交流入力電圧が低下して断となると、整流平滑回路9
の平滑出力電圧も低下する。この平滑出力電圧が基準電
圧以下となると、レベル比較回路10はこれを検出して
、例えば高レベルの入力電圧低下異常信号8を出力する
ものである。
FIG. 4 is an operating waveform diagram of the circuit shown in FIG.
The smoothed output voltage also decreases. When this smoothed output voltage becomes lower than the reference voltage, the level comparison circuit 10 detects this and outputs, for example, a high level input voltage drop abnormality signal 8.

【0004】通常、電源に要求される入力電源瞬断時の
出力電圧保証時間を確保するために、安定化電源回路3
の最低入力電圧と内蔵のコンデンサ容量とを決めている
が、従来の入力電源低下検出回路は、安定化電源回路3
内の平滑回路の電圧とは独立に動作するようになってい
る。
[0004] Normally, in order to secure the output voltage guarantee time in the event of instantaneous input power interruption required for a power supply, a stabilizing power supply circuit 3 is provided.
The minimum input voltage and built-in capacitor capacity of the conventional input power supply drop detection circuit are determined by the stabilized power supply circuit 3.
It operates independently of the voltage of the internal smoothing circuit.

【0005】すなわち、安定化電源回路の負荷の大小に
かかわらず、交流入力電圧の整流平滑レベルのみで入力
電圧異常検出を行っているので、正確な入力電圧低下検
出ができないという欠点がある。更に、検出回路の入力
電圧が高いために消費電力が大きいという問題がある。
That is, regardless of the magnitude of the load on the stabilized power supply circuit, input voltage abnormality detection is performed only based on the rectification and smoothing level of the AC input voltage, so there is a drawback that accurate input voltage drop detection cannot be performed. Furthermore, since the input voltage of the detection circuit is high, there is a problem that power consumption is large.

【0006】[0006]

【発明の目的】本発明の目的は、回路の負荷の大小をも
考慮して正確な入力電圧低下検出が可能でかつ微少電力
で構成可能な入力電圧低下検出回路を提供することであ
る。
OBJECTS OF THE INVENTION An object of the present invention is to provide an input voltage drop detection circuit that can accurately detect an input voltage drop while taking into account the magnitude of the load on the circuit and can be configured with very little power.

【0007】[0007]

【発明の構成】本発明によれば、スイッチング素子のオ
ンオフ制御をなすスイッチングパルスのパルス幅制御に
より直流安定化電圧を出力するスイッチング電源の入力
電圧低下検出回路であって、前記スイッチングパルスを
積分して鉅歯状波信号を生成する積分器と、この鉅歯状
波信号と基準電圧とをレベル比較する比較器とを含み、
この比較出力により入力電圧の低下を検出するようにし
たことを特徴とする入力電圧低下検出回路が得られる。
According to the present invention, there is provided an input voltage drop detection circuit for a switching power supply that outputs a DC stabilized voltage by controlling the pulse width of a switching pulse that controls on/off of a switching element, and which integrates the switching pulse. an integrator that generates a tooth-shaped wave signal, and a comparator that compares the levels of the tooth-shaped wave signal and a reference voltage;
An input voltage drop detection circuit is obtained, which is characterized in that a drop in input voltage is detected by this comparison output.

【0008】[0008]

【実施例】本発明の実施例について図面を参照して説明
する。
Embodiments Examples of the present invention will be described with reference to the drawings.

【0009】図1は本発明の一実施例のブロック図であ
る。安定化電源回路3は、内蔵のパルス幅制御回路の働
きにより交流または非安定定直流を入力端子1,2より
入力し出力端子4,5へ安定化直流を出力すると共に、
内部のスイッチング素子を導通させるオンパルスと同一
のタイミングのオンパルスaを出力する。
FIG. 1 is a block diagram of one embodiment of the present invention. The stabilized power supply circuit 3 inputs alternating current or unstable constant direct current from input terminals 1 and 2 and outputs stabilized direct current to output terminals 4 and 5 by the action of a built-in pulse width control circuit.
An on-pulse a having the same timing as the on-pulse that makes the internal switching element conductive is output.

【0010】積分回路6はこのオンパルスを積分して、
この積分された鉅歯状波形を比較回路7の非反転入力端
子に入力する。また、基準電圧bが比較回路7の反転入
力端子に入力されており、比較回路7は積分回路6の出
力cの電圧値が基準電圧値より大の時入力電圧低下異常
信号を送出する。
The integration circuit 6 integrates this on-pulse,
This integrated claw-tooth waveform is input to the non-inverting input terminal of the comparator circuit 7. Further, the reference voltage b is input to the inverting input terminal of the comparator circuit 7, and the comparator circuit 7 sends out an input voltage drop abnormality signal when the voltage value of the output c of the integrating circuit 6 is greater than the reference voltage value.

【0011】図2は図1の回路動作を示すタイムチャー
トであり、入力電源が低下した時、安定化電源回路3内
のスイッチング素子のオンパルスの幅は増加し、安定化
電源回路3の最低入力電圧値まで低下した時、オンパル
スaの幅は最大になり、入力電圧低下異常信号が送出さ
れる。
FIG. 2 is a time chart showing the operation of the circuit shown in FIG. 1. When the input power supply decreases, the width of the on-pulse of the switching element in the stabilized power supply circuit 3 increases, and the minimum input of the stabilized power supply circuit 3 increases. When the voltage drops to the voltage value, the width of the on-pulse a becomes maximum, and an input voltage drop abnormal signal is sent out.

【0012】負荷が軽い時は、入力電圧低下が発生して
も最低入力電圧に到達するまでの時間が長くなるため、
出力電圧の保証時間が長くなり、負荷の大小を考慮した
正確な電圧低下検出が行えるのである。
When the load is light, even if the input voltage drops, it takes a long time to reach the minimum input voltage.
The guaranteed time for the output voltage is extended, and accurate voltage drop detection can be performed taking into account the size of the load.

【0013】[0013]

【発明の効果】以上説明したように本発明によれば、入
力電圧低下が発生した時、安定化電源回路の最低入力電
圧値まで入力電圧低下異常信号を送出しないので、軽負
荷時入力電圧低下時の出力電圧保証時間が長くでき、ま
た積分回路、比較回路等の検出回路が微少電力で構成で
きるという効果を有する。
As explained above, according to the present invention, when an input voltage drop occurs, the input voltage drop abnormal signal is not sent until the lowest input voltage value of the stabilized power supply circuit. This has the advantage that the output voltage guarantee time can be extended, and detection circuits such as an integrating circuit and a comparator circuit can be configured with very little power.

【図面の簡単な説明】[Brief explanation of drawings]

【図1】本発明の実施例の回路ブロック図である。FIG. 1 is a circuit block diagram of an embodiment of the present invention.

【図2】図1の実施例回路の動作を示すタイミングチャ
ートである。
FIG. 2 is a timing chart showing the operation of the embodiment circuit of FIG. 1;

【図3】従来の入力電圧低下検出回路のブロック図であ
る。
FIG. 3 is a block diagram of a conventional input voltage drop detection circuit.

【符号の説明】[Explanation of symbols]

3  安定化電源回路 6  積分回路 7  比較回路 3 Stabilized power supply circuit 6 Integral circuit 7 Comparison circuit

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】  スイッチング素子のオンオフ制御をな
すスイッチングパルスのパルス幅制御により直流安定化
電圧を出力するスイッチング電源の入力電圧低下検出回
路であって、前記スイッチングパルスを積分して鉅歯状
波信号を生成する積分器と、この鉅歯状波信号と基準電
圧とをレベル比較する比較器とを含み、この比較出力に
より入力電圧の低下を検出するようにしたことを特徴と
する入力電圧低下検出回路。
1. An input voltage drop detection circuit for a switching power supply that outputs a DC stabilized voltage by controlling the pulse width of a switching pulse that controls on/off of a switching element, the circuit integrating the switching pulse and generating a hook-tooth wave signal. An input voltage drop detection device comprising: an integrator that generates a signal, and a comparator that compares the levels of this tooth-tooth wave signal with a reference voltage, and detects a drop in input voltage based on the comparison output. circuit.
JP10662591A 1991-04-11 1991-04-11 Input voltage drop detecting circuit Pending JPH04312350A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10662591A JPH04312350A (en) 1991-04-11 1991-04-11 Input voltage drop detecting circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10662591A JPH04312350A (en) 1991-04-11 1991-04-11 Input voltage drop detecting circuit

Publications (1)

Publication Number Publication Date
JPH04312350A true JPH04312350A (en) 1992-11-04

Family

ID=14438295

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10662591A Pending JPH04312350A (en) 1991-04-11 1991-04-11 Input voltage drop detecting circuit

Country Status (1)

Country Link
JP (1) JPH04312350A (en)

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